bcm53xx_pax.c revision 1.7.2.2 1 1.7.2.2 yamt /*-
2 1.7.2.2 yamt * Copyright (c) 2012 The NetBSD Foundation, Inc.
3 1.7.2.2 yamt * All rights reserved.
4 1.7.2.2 yamt *
5 1.7.2.2 yamt * This code is derived from software contributed to The NetBSD Foundation
6 1.7.2.2 yamt * by Matt Thomas of 3am Software Foundry.
7 1.7.2.2 yamt *
8 1.7.2.2 yamt * Redistribution and use in source and binary forms, with or without
9 1.7.2.2 yamt * modification, are permitted provided that the following conditions
10 1.7.2.2 yamt * are met:
11 1.7.2.2 yamt * 1. Redistributions of source code must retain the above copyright
12 1.7.2.2 yamt * notice, this list of conditions and the following disclaimer.
13 1.7.2.2 yamt * 2. Redistributions in binary form must reproduce the above copyright
14 1.7.2.2 yamt * notice, this list of conditions and the following disclaimer in the
15 1.7.2.2 yamt * documentation and/or other materials provided with the distribution.
16 1.7.2.2 yamt *
17 1.7.2.2 yamt * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
18 1.7.2.2 yamt * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
19 1.7.2.2 yamt * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
20 1.7.2.2 yamt * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
21 1.7.2.2 yamt * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
22 1.7.2.2 yamt * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
23 1.7.2.2 yamt * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
24 1.7.2.2 yamt * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
25 1.7.2.2 yamt * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
26 1.7.2.2 yamt * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
27 1.7.2.2 yamt * POSSIBILITY OF SUCH DAMAGE.
28 1.7.2.2 yamt */
29 1.7.2.2 yamt
30 1.7.2.2 yamt #define _ARM32_BUS_DMA_PRIVATE
31 1.7.2.2 yamt #define PCIE_PRIVATE
32 1.7.2.2 yamt
33 1.7.2.2 yamt #include "locators.h"
34 1.7.2.2 yamt
35 1.7.2.2 yamt #include <sys/cdefs.h>
36 1.7.2.2 yamt
37 1.7.2.2 yamt __KERNEL_RCSID(1, "$NetBSD: bcm53xx_pax.c,v 1.7.2.2 2012/10/30 17:18:59 yamt Exp $");
38 1.7.2.2 yamt
39 1.7.2.2 yamt #include <sys/bus.h>
40 1.7.2.2 yamt #include <sys/device.h>
41 1.7.2.2 yamt #include <sys/extent.h>
42 1.7.2.2 yamt #include <sys/intr.h>
43 1.7.2.2 yamt #include <sys/kmem.h>
44 1.7.2.2 yamt #include <sys/systm.h>
45 1.7.2.2 yamt
46 1.7.2.2 yamt #include <dev/pci/pcireg.h>
47 1.7.2.2 yamt #include <dev/pci/pcivar.h>
48 1.7.2.2 yamt #include <dev/pci/pciconf.h>
49 1.7.2.2 yamt
50 1.7.2.2 yamt #include <arm/broadcom/bcm53xx_reg.h>
51 1.7.2.2 yamt #include <arm/broadcom/bcm53xx_var.h>
52 1.7.2.2 yamt
53 1.7.2.2 yamt #ifndef __HAVE_PCI_CONF_HOOK
54 1.7.2.2 yamt #error __HAVE_PCI_CONF_HOOK must be defined
55 1.7.2.2 yamt #endif
56 1.7.2.2 yamt
57 1.7.2.2 yamt static const struct {
58 1.7.2.2 yamt paddr_t owin_base;
59 1.7.2.2 yamt psize_t owin_size;
60 1.7.2.2 yamt } bcmpax_owins[] = {
61 1.7.2.2 yamt [0] = { BCM53XX_PCIE0_OWIN_PBASE, BCM53XX_PCIE0_OWIN_SIZE },
62 1.7.2.2 yamt [1] = { BCM53XX_PCIE1_OWIN_PBASE, BCM53XX_PCIE1_OWIN_SIZE },
63 1.7.2.2 yamt [2] = { BCM53XX_PCIE2_OWIN_PBASE, BCM53XX_PCIE2_OWIN_SIZE },
64 1.7.2.2 yamt };
65 1.7.2.2 yamt
66 1.7.2.2 yamt static int bcmpax_ccb_match(device_t, cfdata_t, void *);
67 1.7.2.2 yamt static void bcmpax_ccb_attach(device_t, device_t, void *);
68 1.7.2.2 yamt
69 1.7.2.2 yamt struct bcmpax_intrhand {
70 1.7.2.2 yamt TAILQ_ENTRY(bcmpax_intrhand) ih_link;
71 1.7.2.2 yamt int (*ih_func)(void *);
72 1.7.2.2 yamt void *ih_arg;
73 1.7.2.2 yamt int ih_ipl;
74 1.7.2.2 yamt };
75 1.7.2.2 yamt
76 1.7.2.2 yamt TAILQ_HEAD(bcmpax_ihqh, bcmpax_intrhand);
77 1.7.2.2 yamt
78 1.7.2.2 yamt struct bcmpax_softc {
79 1.7.2.2 yamt device_t sc_dev;
80 1.7.2.2 yamt bus_space_tag_t sc_bst;
81 1.7.2.2 yamt bus_space_handle_t sc_bsh;
82 1.7.2.2 yamt bus_dma_tag_t sc_dmat;
83 1.7.2.2 yamt kmutex_t *sc_lock;
84 1.7.2.2 yamt kmutex_t *sc_cfg_lock;
85 1.7.2.2 yamt bool sc_linkup;
86 1.7.2.2 yamt int sc_pba_flags;
87 1.7.2.2 yamt uint32_t sc_intrgen;
88 1.7.2.2 yamt struct arm32_pci_chipset sc_pc;
89 1.7.2.2 yamt struct bcmpax_ihqh sc_intrs;
90 1.7.2.2 yamt void *sc_ih[6];
91 1.7.2.2 yamt int sc_port;
92 1.7.2.2 yamt char sc_intrstring[4][32];
93 1.7.2.2 yamt };
94 1.7.2.2 yamt
95 1.7.2.2 yamt static inline uint32_t
96 1.7.2.2 yamt bcmpax_read_4(struct bcmpax_softc *sc, bus_size_t o)
97 1.7.2.2 yamt {
98 1.7.2.2 yamt return bus_space_read_4(sc->sc_bst, sc->sc_bsh, o);
99 1.7.2.2 yamt }
100 1.7.2.2 yamt
101 1.7.2.2 yamt static inline void
102 1.7.2.2 yamt bcmpax_write_4(struct bcmpax_softc *sc, bus_size_t o, uint32_t v)
103 1.7.2.2 yamt {
104 1.7.2.2 yamt bus_space_write_4(sc->sc_bst, sc->sc_bsh, o, v);
105 1.7.2.2 yamt }
106 1.7.2.2 yamt
107 1.7.2.2 yamt static void bcmpax_attach_hook(device_t, device_t, struct pcibus_attach_args *);
108 1.7.2.2 yamt static int bcmpax_bus_maxdevs(void *, int);
109 1.7.2.2 yamt static pcitag_t bcmpax_make_tag(void *, int, int, int);
110 1.7.2.2 yamt static void bcmpax_decompose_tag(void *, pcitag_t, int *, int *, int *);
111 1.7.2.2 yamt static pcireg_t bcmpax_conf_read(void *, pcitag_t, int);
112 1.7.2.2 yamt static void bcmpax_conf_write(void *, pcitag_t, int, pcireg_t);
113 1.7.2.2 yamt
114 1.7.2.2 yamt static int bcmpax_intr_map(const struct pci_attach_args *, pci_intr_handle_t *);
115 1.7.2.2 yamt static const char *bcmpax_intr_string(void *, pci_intr_handle_t);
116 1.7.2.2 yamt static const struct evcnt *bcmpax_intr_evcnt(void *, pci_intr_handle_t);
117 1.7.2.2 yamt static void *bcmpax_intr_establish(void *, pci_intr_handle_t, int,
118 1.7.2.2 yamt int (*)(void *), void *);
119 1.7.2.2 yamt static void bcmpax_intr_disestablish(void *, void *);
120 1.7.2.2 yamt
121 1.7.2.2 yamt static int bcmpax_conf_hook(void *, int, int, int, pcireg_t);
122 1.7.2.2 yamt static void bcmpax_conf_interrupt(void *, int, int, int, int, int *);
123 1.7.2.2 yamt
124 1.7.2.2 yamt static int bcmpax_intr(void *);
125 1.7.2.2 yamt
126 1.7.2.2 yamt CFATTACH_DECL_NEW(bcmpax_ccb, sizeof(struct bcmpax_softc),
127 1.7.2.2 yamt bcmpax_ccb_match, bcmpax_ccb_attach, NULL, NULL);
128 1.7.2.2 yamt
129 1.7.2.2 yamt static int
130 1.7.2.2 yamt bcmpax_ccb_match(device_t parent, cfdata_t cf, void *aux)
131 1.7.2.2 yamt {
132 1.7.2.2 yamt struct bcmccb_attach_args * const ccbaa = aux;
133 1.7.2.2 yamt const struct bcm_locators * const loc = &ccbaa->ccbaa_loc;
134 1.7.2.2 yamt
135 1.7.2.2 yamt if (strcmp(cf->cf_name, loc->loc_name))
136 1.7.2.2 yamt return 0;
137 1.7.2.2 yamt
138 1.7.2.2 yamt #ifdef DIAGNOSTIC
139 1.7.2.2 yamt const int port = cf->cf_loc[BCMCCBCF_PORT];
140 1.7.2.2 yamt #endif
141 1.7.2.2 yamt KASSERT(port == BCMCCBCF_PORT_DEFAULT || port == loc->loc_port);
142 1.7.2.2 yamt
143 1.7.2.2 yamt return 1;
144 1.7.2.2 yamt }
145 1.7.2.2 yamt
146 1.7.2.2 yamt static int
147 1.7.2.2 yamt bcmpax_iwin_init(struct bcmpax_softc *sc)
148 1.7.2.2 yamt {
149 1.7.2.2 yamt #if 0
150 1.7.2.2 yamt uint32_t megs = (physical_end + 0xfffff - physical_start) >> 20;
151 1.7.2.2 yamt uint32_t iwin_megs = min(256, megs);
152 1.7.2.2 yamt #if 1
153 1.7.2.2 yamt bus_addr_t iwin1_start = physical_start;
154 1.7.2.2 yamt #else
155 1.7.2.2 yamt bus_addr_t iwin1_start = 0;
156 1.7.2.2 yamt #endif
157 1.7.2.2 yamt #if 1
158 1.7.2.2 yamt bcmpax_write_4(sc, PCIE_IARR_1_LOWER, iwin1_start | min(megs, 128));
159 1.7.2.2 yamt bcmpax_write_4(sc, PCIE_FUNC0_IMAP1, iwin1_start | 1);
160 1.7.2.2 yamt #else
161 1.7.2.2 yamt bcmpax_write_4(sc, PCIE_FUNC0_IMAP1, iwin1_start | min(megs, 128));
162 1.7.2.2 yamt bcmpax_write_4(sc, PCIE_IARR_1_LOWER, iwin1_start | 1);
163 1.7.2.2 yamt #endif
164 1.7.2.2 yamt bcmpax_conf_write(sc, 0, PCI_MAPREG_START+4, iwin1_start);
165 1.7.2.2 yamt if (iwin_megs > 128) {
166 1.7.2.2 yamt bus_addr_t iwin2_start = iwin1_start + 128*1024*1024;
167 1.7.2.2 yamt #if 1
168 1.7.2.2 yamt bcmpax_write_4(sc, PCIE_IARR_2_LOWER, iwin2_start | min(megs - 128, 128));
169 1.7.2.2 yamt bcmpax_write_4(sc, PCIE_FUNC0_IMAP2, iwin2_start | 1);
170 1.7.2.2 yamt #else
171 1.7.2.2 yamt bcmpax_write_4(sc, PCIE_FUNC0_IMAP2, iwin2_start | min(megs - 128, 128));
172 1.7.2.2 yamt bcmpax_write_4(sc, PCIE_IARR_2_LOWER, iwin2_start | 1);
173 1.7.2.2 yamt #endif
174 1.7.2.2 yamt bcmpax_conf_write(sc, 0, PCI_MAPREG_START+8, iwin2_start);
175 1.7.2.2 yamt }
176 1.7.2.2 yamt
177 1.7.2.2 yamt if (megs <= iwin_megs) {
178 1.7.2.2 yamt /*
179 1.7.2.2 yamt * We could can DMA to all of memory so we don't need to subregion!
180 1.7.2.2 yamt */
181 1.7.2.2 yamt return 0;
182 1.7.2.2 yamt }
183 1.7.2.2 yamt
184 1.7.2.2 yamt return bus_dmatag_subregion(sc->sc_dmat, physical_start,
185 1.7.2.2 yamt physical_start + (iwin_megs << 20) - 1, &sc->sc_dmat, 0);
186 1.7.2.2 yamt #else
187 1.7.2.2 yamt bcmpax_write_4(sc, PCIE_IARR_1_LOWER, 0);
188 1.7.2.2 yamt bcmpax_write_4(sc, PCIE_FUNC0_IMAP1, 0);
189 1.7.2.2 yamt bcmpax_write_4(sc, PCIE_IARR_2_LOWER, 0);
190 1.7.2.2 yamt bcmpax_write_4(sc, PCIE_FUNC0_IMAP2, 0);
191 1.7.2.2 yamt return 0;
192 1.7.2.2 yamt #endif
193 1.7.2.2 yamt }
194 1.7.2.2 yamt
195 1.7.2.2 yamt static void
196 1.7.2.2 yamt bcmpax_ccb_attach(device_t parent, device_t self, void *aux)
197 1.7.2.2 yamt {
198 1.7.2.2 yamt struct bcmpax_softc * const sc = device_private(self);
199 1.7.2.2 yamt struct bcmccb_attach_args * const ccbaa = aux;
200 1.7.2.2 yamt const struct bcm_locators * const loc = &ccbaa->ccbaa_loc;
201 1.7.2.2 yamt const char * const xname = device_xname(self);
202 1.7.2.2 yamt
203 1.7.2.2 yamt sc->sc_dev = self;
204 1.7.2.2 yamt //sc->sc_dmat = ccbaa->ccbaa_dmat;
205 1.7.2.2 yamt sc->sc_dmat = &bcm53xx_coherent_dma_tag;
206 1.7.2.2 yamt
207 1.7.2.2 yamt for (u_int i = 0; i < 4; i++) {
208 1.7.2.2 yamt snprintf(sc->sc_intrstring[i], sizeof(sc->sc_intrstring[i]),
209 1.7.2.2 yamt "%s int%c", xname, 'a' + i);
210 1.7.2.2 yamt }
211 1.7.2.2 yamt
212 1.7.2.2 yamt sc->sc_bst = ccbaa->ccbaa_ccb_bst;
213 1.7.2.2 yamt bus_space_subregion(sc->sc_bst, ccbaa->ccbaa_ccb_bsh,
214 1.7.2.2 yamt loc->loc_offset, loc->loc_size, &sc->sc_bsh);
215 1.7.2.2 yamt
216 1.7.2.2 yamt /*
217 1.7.2.2 yamt * Kick the hardware into RC mode.
218 1.7.2.2 yamt */
219 1.7.2.2 yamt bcmpax_write_4(sc, PCIE_CLK_CONTROL, 3);
220 1.7.2.2 yamt delay(250);
221 1.7.2.2 yamt bcmpax_write_4(sc, PCIE_CLK_CONTROL, 1);
222 1.7.2.2 yamt
223 1.7.2.2 yamt uint32_t v = bcmpax_read_4(sc, PCIE_STRAP_STATUS);
224 1.7.2.2 yamt const bool enabled = (v & STRAP_PCIE_IF_ENABLE) != 0;
225 1.7.2.2 yamt const bool is_v2_p = (v & STRAP_PCIE_USER_FOR_CE_GEN1) == 0;
226 1.7.2.2 yamt const bool is_x2_p = (v & STRAP_PCIE_USER_FOR_CE_1LANE) == 0;
227 1.7.2.2 yamt const bool is_rc_p = (v & STRAP_PCIE_USER_RC_MODE) != 0;
228 1.7.2.2 yamt
229 1.7.2.2 yamt aprint_naive("\n");
230 1.7.2.2 yamt aprint_normal(": PCI Express V%u %u-lane %s Controller%s\n",
231 1.7.2.2 yamt is_v2_p ? 2 : 1,
232 1.7.2.2 yamt is_x2_p ? 2 : 1,
233 1.7.2.2 yamt is_rc_p ? "RC" : "EP",
234 1.7.2.2 yamt enabled ? "" : "(disabled)");
235 1.7.2.2 yamt if (!enabled || !is_rc_p)
236 1.7.2.2 yamt return;
237 1.7.2.2 yamt
238 1.7.2.2 yamt sc->sc_lock = mutex_obj_alloc(MUTEX_DEFAULT, IPL_VM);
239 1.7.2.2 yamt sc->sc_cfg_lock = mutex_obj_alloc(MUTEX_DEFAULT, IPL_VM);
240 1.7.2.2 yamt
241 1.7.2.2 yamt TAILQ_INIT(&sc->sc_intrs);
242 1.7.2.2 yamt
243 1.7.2.2 yamt sc->sc_pc.pc_conf_v = sc;
244 1.7.2.2 yamt sc->sc_pc.pc_attach_hook = bcmpax_attach_hook;
245 1.7.2.2 yamt sc->sc_pc.pc_bus_maxdevs = bcmpax_bus_maxdevs;
246 1.7.2.2 yamt sc->sc_pc.pc_make_tag = bcmpax_make_tag;
247 1.7.2.2 yamt sc->sc_pc.pc_decompose_tag = bcmpax_decompose_tag;
248 1.7.2.2 yamt sc->sc_pc.pc_conf_read = bcmpax_conf_read;
249 1.7.2.2 yamt sc->sc_pc.pc_conf_write = bcmpax_conf_write;
250 1.7.2.2 yamt
251 1.7.2.2 yamt sc->sc_pc.pc_intr_v = sc;
252 1.7.2.2 yamt sc->sc_pc.pc_intr_map = bcmpax_intr_map;
253 1.7.2.2 yamt sc->sc_pc.pc_intr_string = bcmpax_intr_string;
254 1.7.2.2 yamt sc->sc_pc.pc_intr_evcnt = bcmpax_intr_evcnt;
255 1.7.2.2 yamt sc->sc_pc.pc_intr_establish = bcmpax_intr_establish;
256 1.7.2.2 yamt sc->sc_pc.pc_intr_disestablish = bcmpax_intr_disestablish;
257 1.7.2.2 yamt
258 1.7.2.2 yamt sc->sc_pc.pc_conf_hook = bcmpax_conf_hook;
259 1.7.2.2 yamt sc->sc_pc.pc_conf_interrupt = bcmpax_conf_interrupt;
260 1.7.2.2 yamt
261 1.7.2.2 yamt sc->sc_pba_flags |= PCI_FLAGS_MRL_OKAY;
262 1.7.2.2 yamt sc->sc_pba_flags |= PCI_FLAGS_MRM_OKAY;
263 1.7.2.2 yamt sc->sc_pba_flags |= PCI_FLAGS_MWI_OKAY;
264 1.7.2.2 yamt // sc->sc_pba_flags |= PCI_FLAGS_MSI_OKAY;
265 1.7.2.2 yamt // sc->sc_pba_flags |= PCI_FLAGS_MSIX_OKAY;
266 1.7.2.2 yamt
267 1.7.2.2 yamt for (size_t i = 0; i < loc->loc_nintrs; i++) {
268 1.7.2.2 yamt sc->sc_ih[i] = intr_establish(loc->loc_intrs[0] + i, IPL_VM,
269 1.7.2.2 yamt IST_LEVEL, bcmpax_intr, sc);
270 1.7.2.2 yamt if (sc->sc_ih[i] == NULL) {
271 1.7.2.2 yamt aprint_error_dev(self,
272 1.7.2.2 yamt "failed to establish interrupt #%zu (%zu)\n", i,
273 1.7.2.2 yamt loc->loc_intrs[0] + i);
274 1.7.2.2 yamt while (i-- > 0) {
275 1.7.2.2 yamt intr_disestablish(sc->sc_ih[i]);
276 1.7.2.2 yamt }
277 1.7.2.2 yamt return;
278 1.7.2.2 yamt }
279 1.7.2.2 yamt }
280 1.7.2.2 yamt aprint_normal_dev(self, "interrupting on irqs %d-%d\n",
281 1.7.2.2 yamt loc->loc_intrs[0], loc->loc_intrs[0] + loc->loc_nintrs - 1);
282 1.7.2.2 yamt
283 1.7.2.2 yamt /*
284 1.7.2.2 yamt * Enable INTA-INTD
285 1.7.2.2 yamt */
286 1.7.2.2 yamt bcmpax_write_4(sc, PCIE_SYS_RC_INTX_EN, 0x0f);
287 1.7.2.2 yamt
288 1.7.2.2 yamt int offset;
289 1.7.2.2 yamt const bool ok = pci_get_capability(&sc->sc_pc, 0, PCI_CAP_PCIEXPRESS,
290 1.7.2.2 yamt &offset, NULL);
291 1.7.2.2 yamt KASSERT(ok);
292 1.7.2.2 yamt
293 1.7.2.2 yamt /*
294 1.7.2.2 yamt * This will force the device to negotiate to a max of gen1.
295 1.7.2.2 yamt */
296 1.7.2.2 yamt if (device_cfdata(self)->cf_flags & 1) {
297 1.7.2.2 yamt bcmpax_conf_write(sc, 0, offset + PCI_PCIE_LCSR2, 1);
298 1.7.2.2 yamt }
299 1.7.2.2 yamt
300 1.7.2.2 yamt /*
301 1.7.2.2 yamt * Now we wait (.25 sec) for the link to come up.
302 1.7.2.2 yamt */
303 1.7.2.2 yamt offset += PCI_PCIE_LCSR;
304 1.7.2.2 yamt for (size_t timo = 0;; timo++) {
305 1.7.2.2 yamt const pcireg_t lcsr = bcmpax_conf_read(sc, 0, offset);
306 1.7.2.2 yamt sc->sc_linkup = __SHIFTOUT(lcsr, PCI_PCIE_LCSR_NLW) != 0
307 1.7.2.2 yamt && (1 || (lcsr & PCI_PCIE_LCSR_DLACTIVE) != 0);
308 1.7.2.2 yamt if (sc->sc_linkup || timo == 250) {
309 1.7.2.2 yamt aprint_debug_dev(self,
310 1.7.2.2 yamt "lcsr=%#x nlw=%jd linkup=%d, timo=%zu\n",
311 1.7.2.2 yamt lcsr, __SHIFTOUT(lcsr, PCI_PCIE_LCSR_NLW),
312 1.7.2.2 yamt sc->sc_linkup, timo);
313 1.7.2.2 yamt break;
314 1.7.2.2 yamt }
315 1.7.2.2 yamt DELAY(1000);
316 1.7.2.2 yamt }
317 1.7.2.2 yamt
318 1.7.2.2 yamt if (sc->sc_linkup) {
319 1.7.2.2 yamt /*
320 1.7.2.2 yamt * Enable the inbound (device->memory) map.
321 1.7.2.2 yamt */
322 1.7.2.2 yamt int error = bcmpax_iwin_init(sc);
323 1.7.2.2 yamt if (error) {
324 1.7.2.2 yamt aprint_error_dev(sc->sc_dev,
325 1.7.2.2 yamt "failed to subregion dma tag: %d\n", error);
326 1.7.2.2 yamt return;
327 1.7.2.2 yamt }
328 1.7.2.2 yamt
329 1.7.2.2 yamt aprint_normal_dev(self, "iwin[1]=%#x/%#x iwin[2]=%#x/%#x\n",
330 1.7.2.2 yamt bcmpax_read_4(sc, PCIE_FUNC0_IMAP1),
331 1.7.2.2 yamt bcmpax_read_4(sc, PCIE_IARR_1_LOWER),
332 1.7.2.2 yamt bcmpax_read_4(sc, PCIE_FUNC0_IMAP2),
333 1.7.2.2 yamt bcmpax_read_4(sc, PCIE_IARR_2_LOWER));
334 1.7.2.2 yamt
335 1.7.2.2 yamt paddr_t base = bcmpax_owins[loc->loc_port].owin_base;
336 1.7.2.2 yamt psize_t size = bcmpax_owins[loc->loc_port].owin_size;
337 1.7.2.2 yamt KASSERT((size & ~PCIE_OARR_ADDR) == 0);
338 1.7.2.2 yamt if (size > 0) {
339 1.7.2.2 yamt bcmpax_write_4(sc, PCIE_OARR_0, base);
340 1.7.2.2 yamt bcmpax_write_4(sc, PCIE_OMAP_0_LOWER, base | 1);
341 1.7.2.2 yamt }
342 1.7.2.2 yamt if (size > __LOWEST_SET_BIT(PCIE_OARR_ADDR)) {
343 1.7.2.2 yamt paddr_t base1 = base + __LOWEST_SET_BIT(PCIE_OARR_ADDR);
344 1.7.2.2 yamt bcmpax_write_4(sc, PCIE_OARR_1, base1);
345 1.7.2.2 yamt bcmpax_write_4(sc, PCIE_OMAP_1_LOWER, base1 | 1);
346 1.7.2.2 yamt }
347 1.7.2.2 yamt
348 1.7.2.2 yamt struct extent *memext = extent_create("pcimem", base,
349 1.7.2.2 yamt base + size, NULL, 0, EX_NOWAIT);
350 1.7.2.2 yamt
351 1.7.2.2 yamt error = pci_configure_bus(&sc->sc_pc,
352 1.7.2.2 yamt NULL, memext, NULL, 0, arm_pcache.dcache_line_size);
353 1.7.2.2 yamt
354 1.7.2.2 yamt extent_destroy(memext);
355 1.7.2.2 yamt
356 1.7.2.2 yamt if (error) {
357 1.7.2.2 yamt aprint_normal_dev(self, "configuration failed\n");
358 1.7.2.2 yamt return;
359 1.7.2.2 yamt }
360 1.7.2.2 yamt }
361 1.7.2.2 yamt
362 1.7.2.2 yamt struct pcibus_attach_args pba;
363 1.7.2.2 yamt memset(&pba, 0, sizeof(pba));
364 1.7.2.2 yamt
365 1.7.2.2 yamt pba.pba_flags = sc->sc_pba_flags;
366 1.7.2.2 yamt pba.pba_flags |= PCI_FLAGS_MEM_OKAY;
367 1.7.2.2 yamt pba.pba_memt = sc->sc_bst;
368 1.7.2.2 yamt pba.pba_dmat = sc->sc_dmat;
369 1.7.2.2 yamt pba.pba_pc = &sc->sc_pc;
370 1.7.2.2 yamt pba.pba_bus = 0;
371 1.7.2.2 yamt
372 1.7.2.2 yamt config_found_ia(self, "pcibus", &pba, pcibusprint);
373 1.7.2.2 yamt }
374 1.7.2.2 yamt
375 1.7.2.2 yamt static void
376 1.7.2.2 yamt bcmpax_attach_hook(device_t parent, device_t self,
377 1.7.2.2 yamt struct pcibus_attach_args *pba)
378 1.7.2.2 yamt {
379 1.7.2.2 yamt }
380 1.7.2.2 yamt
381 1.7.2.2 yamt static int
382 1.7.2.2 yamt bcmpax_bus_maxdevs(void *v, int bus)
383 1.7.2.2 yamt {
384 1.7.2.2 yamt struct bcmpax_softc * const sc = v;
385 1.7.2.2 yamt
386 1.7.2.2 yamt if (__predict_true(sc->sc_linkup))
387 1.7.2.2 yamt return bus > 1 ? 32 : 1;
388 1.7.2.2 yamt
389 1.7.2.2 yamt return bus ? 0 : 1;
390 1.7.2.2 yamt }
391 1.7.2.2 yamt
392 1.7.2.2 yamt static void
393 1.7.2.2 yamt bcmpax_decompose_tag(void *v, pcitag_t tag, int *busp, int *devp, int *funcp)
394 1.7.2.2 yamt {
395 1.7.2.2 yamt if (busp)
396 1.7.2.2 yamt *busp = __SHIFTOUT(tag, CFG_ADDR_BUS);
397 1.7.2.2 yamt if (devp)
398 1.7.2.2 yamt *devp = __SHIFTOUT(tag, CFG_ADDR_DEV);
399 1.7.2.2 yamt if (funcp)
400 1.7.2.2 yamt *funcp = __SHIFTOUT(tag, CFG_ADDR_FUNC);
401 1.7.2.2 yamt }
402 1.7.2.2 yamt
403 1.7.2.2 yamt static pcitag_t
404 1.7.2.2 yamt bcmpax_make_tag(void *v, int bus, int dev, int func)
405 1.7.2.2 yamt {
406 1.7.2.2 yamt return __SHIFTIN(bus, CFG_ADDR_BUS)
407 1.7.2.2 yamt | __SHIFTIN(dev, CFG_ADDR_DEV)
408 1.7.2.2 yamt | __SHIFTIN(func, CFG_ADDR_FUNC)
409 1.7.2.2 yamt | (bus == 0 ? CFG_ADDR_TYPE0 : CFG_ADDR_TYPE1);
410 1.7.2.2 yamt }
411 1.7.2.2 yamt
412 1.7.2.2 yamt static inline bus_size_t
413 1.7.2.2 yamt bcmpax_conf_addr_write(struct bcmpax_softc *sc, pcitag_t tag)
414 1.7.2.2 yamt {
415 1.7.2.2 yamt if ((tag & (CFG_ADDR_BUS|CFG_ADDR_DEV)) == 0) {
416 1.7.2.2 yamt uint32_t reg = __SHIFTOUT(tag, CFG_ADDR_REG);
417 1.7.2.2 yamt uint32_t func = __SHIFTOUT(tag, CFG_ADDR_FUNC);
418 1.7.2.2 yamt bcmpax_write_4(sc, PCIE_CFG_IND_ADDR,
419 1.7.2.2 yamt __SHIFTIN(func, CFG_IND_ADDR_FUNC)
420 1.7.2.2 yamt | __SHIFTIN(reg, CFG_IND_ADDR_REG));
421 1.7.2.2 yamt __asm __volatile("dsb");
422 1.7.2.2 yamt return PCIE_CFG_IND_DATA;
423 1.7.2.2 yamt }
424 1.7.2.2 yamt if (sc->sc_linkup) {
425 1.7.2.2 yamt bcmpax_write_4(sc, PCIE_CFG_ADDR, tag);
426 1.7.2.2 yamt __asm __volatile("dsb");
427 1.7.2.2 yamt return PCIE_CFG_DATA;
428 1.7.2.2 yamt }
429 1.7.2.2 yamt return 0;
430 1.7.2.2 yamt }
431 1.7.2.2 yamt
432 1.7.2.2 yamt static pcireg_t
433 1.7.2.2 yamt bcmpax_conf_read(void *v, pcitag_t tag, int reg)
434 1.7.2.2 yamt {
435 1.7.2.2 yamt struct bcmpax_softc * const sc = v;
436 1.7.2.2 yamt
437 1.7.2.2 yamt /*
438 1.7.2.2 yamt * Even in RC mode, the PCI Express Root Complex return itself
439 1.7.2.2 yamt * as BCM Ethernet Controller!. We could change ppb.c to match it
440 1.7.2.2 yamt * but we'll just lie and say we are a PPB bridge.
441 1.7.2.2 yamt */
442 1.7.2.2 yamt if ((tag & (CFG_ADDR_BUS|CFG_ADDR_DEV|CFG_ADDR_FUNC)) == 0
443 1.7.2.2 yamt && reg == PCI_CLASS_REG) {
444 1.7.2.2 yamt return PCI_CLASS_CODE(PCI_CLASS_BRIDGE,
445 1.7.2.2 yamt PCI_SUBCLASS_BRIDGE_PCI, 0);
446 1.7.2.2 yamt }
447 1.7.2.2 yamt
448 1.7.2.2 yamt //printf("%s: tag %#lx reg %#x:", __func__, tag, reg);
449 1.7.2.2 yamt
450 1.7.2.2 yamt mutex_enter(sc->sc_cfg_lock);
451 1.7.2.2 yamt bus_size_t data_reg = bcmpax_conf_addr_write(sc, tag | reg);
452 1.7.2.2 yamt
453 1.7.2.2 yamt //printf(" [from %#lx]:\n", data_reg);
454 1.7.2.2 yamt
455 1.7.2.2 yamt pcireg_t rv;
456 1.7.2.2 yamt if (data_reg)
457 1.7.2.2 yamt rv = bcmpax_read_4(sc, data_reg);
458 1.7.2.2 yamt else
459 1.7.2.2 yamt rv = 0xffffffff;
460 1.7.2.2 yamt
461 1.7.2.2 yamt mutex_exit(sc->sc_cfg_lock);
462 1.7.2.2 yamt
463 1.7.2.2 yamt //printf(" %#x\n", rv);
464 1.7.2.2 yamt
465 1.7.2.2 yamt return rv;
466 1.7.2.2 yamt }
467 1.7.2.2 yamt
468 1.7.2.2 yamt static void
469 1.7.2.2 yamt bcmpax_conf_write(void *v, pcitag_t tag, int reg, pcireg_t val)
470 1.7.2.2 yamt {
471 1.7.2.2 yamt struct bcmpax_softc * const sc = v;
472 1.7.2.2 yamt
473 1.7.2.2 yamt mutex_enter(sc->sc_cfg_lock);
474 1.7.2.2 yamt bus_size_t data_reg = bcmpax_conf_addr_write(sc, tag | reg);
475 1.7.2.2 yamt
476 1.7.2.2 yamt //printf("%s: tag %#lx reg %#x:", __func__, tag, reg);
477 1.7.2.2 yamt
478 1.7.2.2 yamt if (data_reg) {
479 1.7.2.2 yamt //printf(" [to %#lx]:\n", data_reg);
480 1.7.2.2 yamt bcmpax_write_4(sc, data_reg, val);
481 1.7.2.2 yamt //printf(" %#x\n", val);
482 1.7.2.2 yamt }
483 1.7.2.2 yamt
484 1.7.2.2 yamt mutex_exit(sc->sc_cfg_lock);
485 1.7.2.2 yamt }
486 1.7.2.2 yamt
487 1.7.2.2 yamt static void
488 1.7.2.2 yamt bcmpax_conf_interrupt(void *v, int bus, int dev, int ipin, int swiz, int *ilinep)
489 1.7.2.2 yamt {
490 1.7.2.2 yamt *ilinep = 5; /* (ipin + swiz) & 3; */
491 1.7.2.2 yamt }
492 1.7.2.2 yamt
493 1.7.2.2 yamt static int
494 1.7.2.2 yamt bcmpax_conf_hook(void *v, int bus, int dev, int func, pcireg_t id)
495 1.7.2.2 yamt {
496 1.7.2.2 yamt if (func > 0)
497 1.7.2.2 yamt return 0;
498 1.7.2.2 yamt
499 1.7.2.2 yamt return PCI_CONF_ENABLE_MEM | PCI_CONF_MAP_MEM | PCI_CONF_ENABLE_BM;
500 1.7.2.2 yamt }
501 1.7.2.2 yamt
502 1.7.2.2 yamt static int
503 1.7.2.2 yamt bcmpax_intr(void *v)
504 1.7.2.2 yamt {
505 1.7.2.2 yamt struct bcmpax_softc * const sc = v;
506 1.7.2.2 yamt
507 1.7.2.2 yamt while (bcmpax_read_4(sc, PCIE_SYS_RC_INTX_CSR)) {
508 1.7.2.2 yamt struct bcmpax_intrhand *ih;
509 1.7.2.2 yamt mutex_enter(sc->sc_lock);
510 1.7.2.2 yamt const uint32_t lastgen = sc->sc_intrgen;
511 1.7.2.2 yamt TAILQ_FOREACH(ih, &sc->sc_intrs, ih_link) {
512 1.7.2.2 yamt int (* const func)(void *) = ih->ih_func;
513 1.7.2.2 yamt void * const arg = ih->ih_arg;
514 1.7.2.2 yamt mutex_exit(sc->sc_lock);
515 1.7.2.2 yamt int rv = (*func)(arg);
516 1.7.2.2 yamt if (rv) {
517 1.7.2.2 yamt return rv;
518 1.7.2.2 yamt }
519 1.7.2.2 yamt mutex_enter(sc->sc_lock);
520 1.7.2.2 yamt /*
521 1.7.2.2 yamt * Check to see if the interrupt list changed.
522 1.7.2.2 yamt * If so, restart from the beginning.
523 1.7.2.2 yamt */
524 1.7.2.2 yamt if (lastgen != sc->sc_intrgen)
525 1.7.2.2 yamt break;
526 1.7.2.2 yamt }
527 1.7.2.2 yamt mutex_exit(sc->sc_lock);
528 1.7.2.2 yamt }
529 1.7.2.2 yamt
530 1.7.2.2 yamt return 0;
531 1.7.2.2 yamt }
532 1.7.2.2 yamt
533 1.7.2.2 yamt static int
534 1.7.2.2 yamt bcmpax_intr_map(const struct pci_attach_args *pa, pci_intr_handle_t *pihp)
535 1.7.2.2 yamt {
536 1.7.2.2 yamt if (pa->pa_intrpin == 0)
537 1.7.2.2 yamt return EINVAL;
538 1.7.2.2 yamt
539 1.7.2.2 yamt *pihp = pa->pa_intrpin;
540 1.7.2.2 yamt return 0;
541 1.7.2.2 yamt }
542 1.7.2.2 yamt
543 1.7.2.2 yamt static const char *
544 1.7.2.2 yamt bcmpax_intr_string(void *v, pci_intr_handle_t pih)
545 1.7.2.2 yamt {
546 1.7.2.2 yamt struct bcmpax_softc * const sc = v;
547 1.7.2.2 yamt
548 1.7.2.2 yamt if (pih)
549 1.7.2.2 yamt return sc->sc_intrstring[pih - PCI_INTERRUPT_PIN_A];
550 1.7.2.2 yamt
551 1.7.2.2 yamt return NULL;
552 1.7.2.2 yamt }
553 1.7.2.2 yamt
554 1.7.2.2 yamt static const struct evcnt *
555 1.7.2.2 yamt bcmpax_intr_evcnt(void *v, pci_intr_handle_t pih)
556 1.7.2.2 yamt {
557 1.7.2.2 yamt return NULL;
558 1.7.2.2 yamt }
559 1.7.2.2 yamt
560 1.7.2.2 yamt static void *
561 1.7.2.2 yamt bcmpax_intr_establish(void *v, pci_intr_handle_t pih, int ipl,
562 1.7.2.2 yamt int (*func)(void *), void *arg)
563 1.7.2.2 yamt {
564 1.7.2.2 yamt struct bcmpax_softc * const sc = v;
565 1.7.2.2 yamt
566 1.7.2.2 yamt KASSERT(!cpu_intr_p());
567 1.7.2.2 yamt KASSERT(!cpu_softintr_p());
568 1.7.2.2 yamt KASSERT(ipl == IPL_VM);
569 1.7.2.2 yamt KASSERT(func != NULL);
570 1.7.2.2 yamt KASSERT(arg != NULL);
571 1.7.2.2 yamt
572 1.7.2.2 yamt if (pih == 0)
573 1.7.2.2 yamt return NULL;
574 1.7.2.2 yamt
575 1.7.2.2 yamt struct bcmpax_intrhand * const ih = kmem_alloc(sizeof(*ih), KM_SLEEP);
576 1.7.2.2 yamt
577 1.7.2.2 yamt ih->ih_func = func;
578 1.7.2.2 yamt ih->ih_arg = arg;
579 1.7.2.2 yamt
580 1.7.2.2 yamt mutex_enter(sc->sc_lock);
581 1.7.2.2 yamt TAILQ_INSERT_TAIL(&sc->sc_intrs, ih, ih_link);
582 1.7.2.2 yamt mutex_exit(sc->sc_lock);
583 1.7.2.2 yamt
584 1.7.2.2 yamt return ih;
585 1.7.2.2 yamt }
586 1.7.2.2 yamt
587 1.7.2.2 yamt static void
588 1.7.2.2 yamt bcmpax_intr_disestablish(void *v, void *vih)
589 1.7.2.2 yamt {
590 1.7.2.2 yamt struct bcmpax_softc * const sc = v;
591 1.7.2.2 yamt struct bcmpax_intrhand * const ih = vih;
592 1.7.2.2 yamt
593 1.7.2.2 yamt mutex_enter(sc->sc_lock);
594 1.7.2.2 yamt TAILQ_REMOVE(&sc->sc_intrs, ih, ih_link);
595 1.7.2.2 yamt sc->sc_intrgen++;
596 1.7.2.2 yamt mutex_exit(sc->sc_lock);
597 1.7.2.2 yamt
598 1.7.2.2 yamt kmem_free(ih, sizeof(*ih));
599 1.7.2.2 yamt }
600