bcmgen_space.c revision 1.4 1 1.4 matt /* $NetBSD: bcmgen_space.c,v 1.4 2013/10/28 22:51:16 matt Exp $ */
2 1.1 matt
3 1.1 matt /*-
4 1.1 matt * Copyright (c) 2012 The NetBSD Foundation, Inc.
5 1.1 matt * All rights reserved.
6 1.1 matt *
7 1.1 matt * This code is derived from software contributed to The NetBSD Foundation
8 1.1 matt * by Nick Hudson
9 1.1 matt *
10 1.1 matt * Redistribution and use in source and binary forms, with or without
11 1.1 matt * modification, are permitted provided that the following conditions
12 1.1 matt * are met:
13 1.1 matt * 1. Redistributions of source code must retain the above copyright
14 1.1 matt * notice, this list of conditions and the following disclaimer.
15 1.1 matt * 2. Redistributions in binary form must reproduce the above copyright
16 1.1 matt * notice, this list of conditions and the following disclaimer in the
17 1.1 matt * documentation and/or other materials provided with the distribution.
18 1.1 matt *
19 1.1 matt * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 1.1 matt * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 1.1 matt * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 1.1 matt * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 1.1 matt * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 1.1 matt * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 1.1 matt * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 1.1 matt * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 1.1 matt * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 1.1 matt * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 1.1 matt * POSSIBILITY OF SUCH DAMAGE.
30 1.1 matt */
31 1.1 matt
32 1.1 matt
33 1.1 matt #include <sys/cdefs.h>
34 1.4 matt __KERNEL_RCSID(0, "$NetBSD: bcmgen_space.c,v 1.4 2013/10/28 22:51:16 matt Exp $");
35 1.1 matt
36 1.1 matt #include <sys/param.h>
37 1.1 matt #include <sys/systm.h>
38 1.1 matt
39 1.1 matt #include <uvm/uvm_extern.h>
40 1.1 matt
41 1.1 matt #include <sys/bus.h>
42 1.4 matt #include <sys/endian.h>
43 1.1 matt
44 1.1 matt /* Prototypes for all the bus_space structure functions */
45 1.1 matt bs_protos(bcmgen);
46 1.1 matt bs_protos(generic);
47 1.1 matt bs_protos(generic_armv4);
48 1.1 matt bs_protos(bs_notimpl);
49 1.1 matt
50 1.4 matt #if BYTE_ORDER == BIG_ENDIAN
51 1.4 matt #define NSWAP(n) n ## _swap
52 1.4 matt #else
53 1.4 matt #define NSWAP(n) n
54 1.4 matt #endif
55 1.4 matt
56 1.1 matt struct bus_space bcmgen_bs_tag = {
57 1.1 matt /* cookie */
58 1.1 matt (void *) 0,
59 1.1 matt
60 1.1 matt /* mapping/unmapping */
61 1.1 matt bcmgen_bs_map,
62 1.1 matt bcmgen_bs_unmap,
63 1.1 matt bcmgen_bs_subregion,
64 1.1 matt
65 1.1 matt /* allocation/deallocation */
66 1.1 matt bcmgen_bs_alloc, /* not implemented */
67 1.1 matt bcmgen_bs_free, /* not implemented */
68 1.1 matt
69 1.1 matt /* get kernel virtual address */
70 1.1 matt bcmgen_bs_vaddr,
71 1.1 matt
72 1.1 matt /* mmap */
73 1.1 matt bs_notimpl_bs_mmap,
74 1.1 matt
75 1.1 matt /* barrier */
76 1.1 matt bcmgen_bs_barrier,
77 1.1 matt
78 1.1 matt /* read (single) */
79 1.1 matt generic_bs_r_1,
80 1.4 matt NSWAP(generic_armv4_bs_r_2),
81 1.4 matt NSWAP(generic_bs_r_4),
82 1.1 matt bs_notimpl_bs_r_8,
83 1.1 matt
84 1.1 matt /* read multiple */
85 1.1 matt generic_bs_rm_1,
86 1.4 matt NSWAP(generic_armv4_bs_rm_2),
87 1.4 matt NSWAP(generic_bs_rm_4),
88 1.1 matt bs_notimpl_bs_rm_8,
89 1.1 matt
90 1.1 matt /* read region */
91 1.1 matt generic_bs_rr_1,
92 1.4 matt NSWAP(generic_armv4_bs_rr_2),
93 1.4 matt NSWAP(generic_bs_rr_4),
94 1.1 matt bs_notimpl_bs_rr_8,
95 1.1 matt
96 1.1 matt /* write (single) */
97 1.1 matt generic_bs_w_1,
98 1.4 matt NSWAP(generic_armv4_bs_w_2),
99 1.4 matt NSWAP(generic_bs_w_4),
100 1.1 matt bs_notimpl_bs_w_8,
101 1.1 matt
102 1.1 matt /* write multiple */
103 1.1 matt generic_bs_wm_1,
104 1.4 matt NSWAP(generic_armv4_bs_wm_2),
105 1.4 matt NSWAP(generic_bs_wm_4),
106 1.1 matt bs_notimpl_bs_wm_8,
107 1.1 matt
108 1.1 matt /* write region */
109 1.1 matt generic_bs_wr_1,
110 1.4 matt NSWAP(generic_armv4_bs_wr_2),
111 1.4 matt NSWAP(generic_bs_wr_4),
112 1.1 matt bs_notimpl_bs_wr_8,
113 1.1 matt
114 1.1 matt /* set multiple */
115 1.1 matt bs_notimpl_bs_sm_1,
116 1.1 matt bs_notimpl_bs_sm_2,
117 1.1 matt bs_notimpl_bs_sm_4,
118 1.1 matt bs_notimpl_bs_sm_8,
119 1.1 matt
120 1.1 matt /* set region */
121 1.1 matt generic_bs_sr_1,
122 1.4 matt NSWAP(generic_armv4_bs_sr_2),
123 1.1 matt bs_notimpl_bs_sr_4,
124 1.1 matt bs_notimpl_bs_sr_8,
125 1.1 matt
126 1.1 matt /* copy */
127 1.1 matt bs_notimpl_bs_c_1,
128 1.1 matt generic_armv4_bs_c_2,
129 1.1 matt bs_notimpl_bs_c_4,
130 1.1 matt bs_notimpl_bs_c_8,
131 1.1 matt
132 1.1 matt #ifdef __BUS_SPACE_HAS_STREAM_METHODS
133 1.1 matt /* read (single) */
134 1.1 matt generic_bs_r_1,
135 1.4 matt NSWAP(generic_armv4_bs_r_2),
136 1.4 matt NSWAP(generic_bs_r_4),
137 1.1 matt bs_notimpl_bs_r_8,
138 1.1 matt
139 1.1 matt /* read multiple */
140 1.1 matt generic_bs_rm_1,
141 1.4 matt NSWAP(generic_armv4_bs_rm_2),
142 1.4 matt NSWAP(generic_bs_rm_4),
143 1.1 matt bs_notimpl_bs_rm_8,
144 1.1 matt
145 1.1 matt /* read region */
146 1.1 matt generic_bs_rr_1,
147 1.4 matt NSWAP(generic_armv4_bs_rr_2),
148 1.4 matt NSWAP(generic_bs_rr_4),
149 1.1 matt bs_notimpl_bs_rr_8,
150 1.1 matt
151 1.1 matt /* write (single) */
152 1.1 matt generic_bs_w_1,
153 1.4 matt NSWAP(generic_armv4_bs_w_2),
154 1.4 matt NSWAP(generic_bs_w_4),
155 1.1 matt bs_notimpl_bs_w_8,
156 1.1 matt
157 1.1 matt /* write multiple */
158 1.1 matt generic_bs_wm_1,
159 1.4 matt NSWAP(generic_armv4_bs_wm_2),
160 1.4 matt NSWAP(generic_bs_wm_4),
161 1.1 matt bs_notimpl_bs_wm_8,
162 1.1 matt
163 1.1 matt /* write region */
164 1.1 matt generic_bs_wr_1,
165 1.4 matt NSWAP(generic_armv4_bs_wr_2),
166 1.4 matt NSWAP(generic_bs_wr_4),
167 1.1 matt bs_notimpl_bs_wr_8,
168 1.1 matt #endif
169 1.1 matt };
170 1.1 matt
171 1.1 matt int
172 1.1 matt bcmgen_bs_map(void *t, bus_addr_t bpa, bus_size_t size, int flag,
173 1.1 matt bus_space_handle_t *bshp)
174 1.1 matt {
175 1.1 matt u_long startpa, endpa, pa;
176 1.1 matt const struct pmap_devmap *pd;
177 1.1 matt vaddr_t va;
178 1.1 matt
179 1.1 matt if ((pd = pmap_devmap_find_pa(bpa, size)) != NULL) {
180 1.1 matt /* Device was statically mapped. */
181 1.1 matt *bshp = pd->pd_va + (bpa - pd->pd_pa);
182 1.1 matt return 0;
183 1.1 matt }
184 1.1 matt
185 1.1 matt startpa = trunc_page(bpa);
186 1.1 matt endpa = round_page(bpa + size);
187 1.1 matt
188 1.1 matt /* XXX use extent manager to check duplicate mapping */
189 1.1 matt
190 1.1 matt va = uvm_km_alloc(kernel_map, endpa - startpa, 0,
191 1.2 matt UVM_KMF_VAONLY | UVM_KMF_NOWAIT | UVM_KMF_COLORMATCH);
192 1.1 matt if (!va)
193 1.1 matt return ENOMEM;
194 1.1 matt
195 1.1 matt *bshp = (bus_space_handle_t)(va + (bpa - startpa));
196 1.1 matt
197 1.2 matt const int pmapflags =
198 1.2 matt (flag & (BUS_SPACE_MAP_CACHEABLE|BUS_SPACE_MAP_PREFETCHABLE))
199 1.2 matt ? 0
200 1.2 matt : PMAP_NOCACHE;
201 1.1 matt for (pa = startpa; pa < endpa; pa += PAGE_SIZE, va += PAGE_SIZE) {
202 1.1 matt pmap_kenter_pa(va, pa, VM_PROT_READ | VM_PROT_WRITE, pmapflags);
203 1.1 matt }
204 1.1 matt pmap_update(pmap_kernel());
205 1.1 matt
206 1.1 matt return 0;
207 1.1 matt }
208 1.1 matt
209 1.1 matt void
210 1.1 matt bcmgen_bs_unmap(void *t, bus_space_handle_t bsh, bus_size_t size)
211 1.1 matt {
212 1.1 matt vaddr_t va;
213 1.1 matt vsize_t sz;
214 1.1 matt
215 1.1 matt if (pmap_devmap_find_va(bsh, size) != NULL) {
216 1.1 matt /* Device was statically mapped; nothing to do. */
217 1.1 matt return;
218 1.1 matt }
219 1.1 matt
220 1.1 matt va = trunc_page(bsh);
221 1.1 matt sz = round_page(bsh + size) - va;
222 1.1 matt
223 1.1 matt pmap_kremove(va, sz);
224 1.1 matt pmap_update(pmap_kernel());
225 1.1 matt uvm_km_free(kernel_map, va, sz, UVM_KMF_VAONLY);
226 1.1 matt }
227 1.1 matt
228 1.1 matt
229 1.1 matt int
230 1.1 matt bcmgen_bs_subregion(void *t, bus_space_handle_t bsh, bus_size_t offset,
231 1.1 matt bus_size_t size, bus_space_handle_t *nbshp)
232 1.1 matt {
233 1.1 matt
234 1.1 matt *nbshp = bsh + offset;
235 1.1 matt return (0);
236 1.1 matt }
237 1.1 matt
238 1.1 matt void
239 1.1 matt bcmgen_bs_barrier(void *t, bus_space_handle_t bsh, bus_size_t offset,
240 1.1 matt bus_size_t len, int flags)
241 1.1 matt {
242 1.1 matt flags &= BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE;
243 1.1 matt
244 1.1 matt if (flags) {
245 1.1 matt /* Issue an ARM11 Data Syncronisation Barrier (DSB) */
246 1.1 matt #ifdef _ARM_ARCH_7
247 1.1 matt __asm __volatile("dsb");
248 1.1 matt #else
249 1.1 matt __asm__ __volatile__ ("mcr p15, 0, %0, c7, c10, 4" : : "r" (0)
250 1.1 matt : "memory");
251 1.1 matt #endif
252 1.1 matt return;
253 1.1 matt }
254 1.1 matt
255 1.1 matt }
256 1.1 matt
257 1.1 matt void *
258 1.1 matt bcmgen_bs_vaddr(void *t, bus_space_handle_t bsh)
259 1.1 matt {
260 1.1 matt
261 1.1 matt return (void *)bsh;
262 1.1 matt }
263 1.1 matt
264 1.3 matt paddr_t
265 1.3 matt bcmgen_bs_mmap(void *t, bus_addr_t bpa, off_t offset, int prot, int flags)
266 1.3 matt {
267 1.3 matt paddr_t bus_flags = 0;
268 1.3 matt
269 1.3 matt if (flags & BUS_SPACE_MAP_PREFETCHABLE)
270 1.3 matt bus_flags |= ARM32_MMAP_WRITECOMBINE;
271 1.3 matt
272 1.3 matt return (arm_btop(bpa + offset) | bus_flags);
273 1.3 matt }
274 1.1 matt
275 1.1 matt int
276 1.1 matt bcmgen_bs_alloc(void *t, bus_addr_t rstart, bus_addr_t rend,
277 1.1 matt bus_size_t size, bus_size_t alignment, bus_size_t boundary, int flags,
278 1.1 matt bus_addr_t *bpap, bus_space_handle_t *bshp)
279 1.1 matt {
280 1.1 matt
281 1.1 matt panic("%s(): not implemented\n", __func__);
282 1.1 matt }
283 1.1 matt
284 1.1 matt void
285 1.1 matt bcmgen_bs_free(void *t, bus_space_handle_t bsh, bus_size_t size)
286 1.1 matt {
287 1.1 matt
288 1.1 matt panic("%s(): not implemented\n", __func__);
289 1.1 matt }
290