a9ptmr.c revision 1.2.10.2
1 1.2.10.2 martin /* $NetBSD: a9ptmr.c,v 1.2.10.2 2020/04/13 08:03:33 martin Exp $ */ 2 1.2.10.2 martin 3 1.2.10.2 martin /*- 4 1.2.10.2 martin * Copyright (c) 2019 The NetBSD Foundation, Inc. 5 1.2.10.2 martin * All rights reserved. 6 1.2.10.2 martin * 7 1.2.10.2 martin * This code is derived from software contributed to The NetBSD Foundation 8 1.2.10.2 martin * by Nick Hudson 9 1.2.10.2 martin * 10 1.2.10.2 martin * Redistribution and use in source and binary forms, with or without 11 1.2.10.2 martin * modification, are permitted provided that the following conditions 12 1.2.10.2 martin * are met: 13 1.2.10.2 martin * 1. Redistributions of source code must retain the above copyright 14 1.2.10.2 martin * notice, this list of conditions and the following disclaimer. 15 1.2.10.2 martin * 2. Redistributions in binary form must reproduce the above copyright 16 1.2.10.2 martin * notice, this list of conditions and the following disclaimer in the 17 1.2.10.2 martin * documentation and/or other materials provided with the distribution. 18 1.2.10.2 martin * 19 1.2.10.2 martin * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 1.2.10.2 martin * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 1.2.10.2 martin * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 1.2.10.2 martin * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 1.2.10.2 martin * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 1.2.10.2 martin * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 1.2.10.2 martin * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 1.2.10.2 martin * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 1.2.10.2 martin * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 1.2.10.2 martin * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 1.2.10.2 martin * POSSIBILITY OF SUCH DAMAGE. 30 1.2.10.2 martin */ 31 1.2.10.2 martin 32 1.2.10.2 martin #include <sys/cdefs.h> 33 1.2.10.2 martin __KERNEL_RCSID(0, "$NetBSD: a9ptmr.c,v 1.2.10.2 2020/04/13 08:03:33 martin Exp $"); 34 1.2.10.2 martin 35 1.2.10.2 martin #include <sys/param.h> 36 1.2.10.2 martin #include <sys/bus.h> 37 1.2.10.2 martin #include <sys/cpu.h> 38 1.2.10.2 martin #include <sys/device.h> 39 1.2.10.2 martin #include <sys/kernel.h> 40 1.2.10.2 martin 41 1.2.10.2 martin #include <prop/proplib.h> 42 1.2.10.2 martin 43 1.2.10.2 martin #include <arm/cortex/a9tmr_reg.h> 44 1.2.10.2 martin #include <arm/cortex/a9ptmr_var.h> 45 1.2.10.2 martin 46 1.2.10.2 martin #include <arm/cortex/mpcore_var.h> 47 1.2.10.2 martin 48 1.2.10.2 martin static struct a9ptmr_softc *a9ptmr_sc; 49 1.2.10.2 martin 50 1.2.10.2 martin static int a9ptmr_match(device_t, cfdata_t, void *); 51 1.2.10.2 martin static void a9ptmr_attach(device_t, device_t, void *); 52 1.2.10.2 martin 53 1.2.10.2 martin struct a9ptmr_softc { 54 1.2.10.2 martin device_t sc_dev; 55 1.2.10.2 martin bus_space_tag_t sc_memt; 56 1.2.10.2 martin bus_space_handle_t sc_memh; 57 1.2.10.2 martin 58 1.2.10.2 martin uint32_t sc_ctl; 59 1.2.10.2 martin uint32_t sc_freq; 60 1.2.10.2 martin uint32_t sc_load; 61 1.2.10.2 martin 62 1.2.10.2 martin uint32_t sc_prescaler; 63 1.2.10.2 martin }; 64 1.2.10.2 martin 65 1.2.10.2 martin 66 1.2.10.2 martin CFATTACH_DECL_NEW(arma9ptmr, sizeof(struct a9ptmr_softc), 67 1.2.10.2 martin a9ptmr_match, a9ptmr_attach, NULL, NULL); 68 1.2.10.2 martin 69 1.2.10.2 martin static bool attached; 70 1.2.10.2 martin 71 1.2.10.2 martin static inline uint32_t 72 1.2.10.2 martin a9ptmr_read(struct a9ptmr_softc *sc, bus_size_t o) 73 1.2.10.2 martin { 74 1.2.10.2 martin return bus_space_read_4(sc->sc_memt, sc->sc_memh, o); 75 1.2.10.2 martin } 76 1.2.10.2 martin 77 1.2.10.2 martin static inline void 78 1.2.10.2 martin a9ptmr_write(struct a9ptmr_softc *sc, bus_size_t o, uint32_t v) 79 1.2.10.2 martin { 80 1.2.10.2 martin bus_space_write_4(sc->sc_memt, sc->sc_memh, o, v); 81 1.2.10.2 martin } 82 1.2.10.2 martin 83 1.2.10.2 martin /* ARGSUSED */ 84 1.2.10.2 martin static int 85 1.2.10.2 martin a9ptmr_match(device_t parent, cfdata_t cf, void *aux) 86 1.2.10.2 martin { 87 1.2.10.2 martin struct mpcore_attach_args * const mpcaa = aux; 88 1.2.10.2 martin 89 1.2.10.2 martin if (attached) 90 1.2.10.2 martin return 0; 91 1.2.10.2 martin 92 1.2.10.2 martin if (!CPU_ID_CORTEX_A9_P(curcpu()->ci_arm_cpuid) && 93 1.2.10.2 martin !CPU_ID_CORTEX_A5_P(curcpu()->ci_arm_cpuid)) 94 1.2.10.2 martin return 0; 95 1.2.10.2 martin 96 1.2.10.2 martin if (strcmp(mpcaa->mpcaa_name, cf->cf_name) != 0) 97 1.2.10.2 martin return 0; 98 1.2.10.2 martin 99 1.2.10.2 martin #if 0 100 1.2.10.2 martin /* 101 1.2.10.2 martin * This isn't present on UP A9s (since CBAR isn't present). 102 1.2.10.2 martin */ 103 1.2.10.2 martin uint32_t mpidr = armreg_mpidr_read(); 104 1.2.10.2 martin if (mpidr == 0 || (mpidr & MPIDR_U)) 105 1.2.10.2 martin return 0; 106 1.2.10.2 martin #endif 107 1.2.10.2 martin 108 1.2.10.2 martin return 1; 109 1.2.10.2 martin } 110 1.2.10.2 martin 111 1.2.10.2 martin 112 1.2.10.2 martin static void 113 1.2.10.2 martin a9ptmr_attach(device_t parent, device_t self, void *aux) 114 1.2.10.2 martin { 115 1.2.10.2 martin struct a9ptmr_softc * const sc = device_private(self); 116 1.2.10.2 martin struct mpcore_attach_args * const mpcaa = aux; 117 1.2.10.2 martin prop_dictionary_t dict = device_properties(self); 118 1.2.10.2 martin char freqbuf[sizeof("XXX SHz")]; 119 1.2.10.2 martin const char *cpu_type; 120 1.2.10.2 martin 121 1.2.10.2 martin 122 1.2.10.2 martin sc->sc_dev = self; 123 1.2.10.2 martin sc->sc_memt = mpcaa->mpcaa_memt; 124 1.2.10.2 martin 125 1.2.10.2 martin bus_space_subregion(sc->sc_memt, mpcaa->mpcaa_memh, 126 1.2.10.2 martin mpcaa->mpcaa_off1, TMR_PRIVATE_SIZE, &sc->sc_memh); 127 1.2.10.2 martin 128 1.2.10.2 martin /* 129 1.2.10.2 martin * This runs at the ARM PERIPHCLOCK. 130 1.2.10.2 martin * The MD code should have setup our frequency for us. 131 1.2.10.2 martin */ 132 1.2.10.2 martin if (!prop_dictionary_get_uint32(dict, "frequency", &sc->sc_freq)) { 133 1.2.10.2 martin dict = device_properties(parent); 134 1.2.10.2 martin prop_dictionary_get_uint32(dict, "frequency", &sc->sc_freq); 135 1.2.10.2 martin } 136 1.2.10.2 martin 137 1.2.10.2 martin humanize_number(freqbuf, sizeof(freqbuf), sc->sc_freq, "Hz", 1000); 138 1.2.10.2 martin 139 1.2.10.2 martin a9ptmr_sc = sc; 140 1.2.10.2 martin sc->sc_dev = self; 141 1.2.10.2 martin sc->sc_memt = mpcaa->mpcaa_memt; 142 1.2.10.2 martin sc->sc_memh = mpcaa->mpcaa_memh; 143 1.2.10.2 martin 144 1.2.10.2 martin sc->sc_ctl = a9ptmr_read(sc, TMR_CTL); 145 1.2.10.2 martin 146 1.2.10.2 martin sc->sc_prescaler = 1; 147 1.2.10.2 martin #if 0 148 1.2.10.2 martin /* 149 1.2.10.2 martin * Let's hope the timer frequency isn't prime. 150 1.2.10.2 martin */ 151 1.2.10.2 martin for (size_t div = 256; div >= 2; div--) { 152 1.2.10.2 martin if (sc->sc_freq % div == 0) { 153 1.2.10.2 martin sc->sc_prescaler = div; 154 1.2.10.2 martin break; 155 1.2.10.2 martin } 156 1.2.10.2 martin } 157 1.2.10.2 martin sc->sc_freq /= sc->sc_prescaler; 158 1.2.10.2 martin #endif 159 1.2.10.2 martin 160 1.2.10.2 martin aprint_debug(": freq %d prescaler %d", sc->sc_freq, 161 1.2.10.2 martin sc->sc_prescaler); 162 1.2.10.2 martin sc->sc_ctl = TMR_CTL_INT_ENABLE | TMR_CTL_AUTO_RELOAD | TMR_CTL_ENABLE; 163 1.2.10.2 martin sc->sc_ctl |= __SHIFTIN(sc->sc_prescaler - 1, TMR_CTL_PRESCALER); 164 1.2.10.2 martin 165 1.2.10.2 martin sc->sc_load = (sc->sc_freq / hz) - 1; 166 1.2.10.2 martin 167 1.2.10.2 martin aprint_debug(": load %d ", sc->sc_load); 168 1.2.10.2 martin 169 1.2.10.2 martin a9ptmr_init_cpu_clock(curcpu()); 170 1.2.10.2 martin 171 1.2.10.2 martin aprint_naive("\n"); 172 1.2.10.2 martin if (CPU_ID_CORTEX_A5_P(curcpu()->ci_arm_cpuid)) { 173 1.2.10.2 martin cpu_type = "A5"; 174 1.2.10.2 martin } else { 175 1.2.10.2 martin cpu_type = "A9"; 176 1.2.10.2 martin } 177 1.2.10.2 martin aprint_normal(": %s Private Timer (%s)\n", cpu_type, freqbuf); 178 1.2.10.2 martin 179 1.2.10.2 martin attached = true; 180 1.2.10.2 martin } 181 1.2.10.2 martin 182 1.2.10.2 martin 183 1.2.10.2 martin 184 1.2.10.2 martin void 185 1.2.10.2 martin a9ptmr_delay(unsigned int n) 186 1.2.10.2 martin { 187 1.2.10.2 martin struct a9ptmr_softc * const sc = a9ptmr_sc; 188 1.2.10.2 martin 189 1.2.10.2 martin KASSERT(sc != NULL); 190 1.2.10.2 martin 191 1.2.10.2 martin uint32_t freq = sc->sc_freq ? sc->sc_freq : 192 1.2.10.2 martin curcpu()->ci_data.cpu_cc_freq / 2; 193 1.2.10.2 martin KASSERT(freq != 0); 194 1.2.10.2 martin 195 1.2.10.2 martin const uint64_t counts_per_usec = freq / 1000000; 196 1.2.10.2 martin uint32_t delta, usecs, last, curr; 197 1.2.10.2 martin 198 1.2.10.2 martin KASSERT(sc != NULL); 199 1.2.10.2 martin 200 1.2.10.2 martin last = a9ptmr_read(sc, TMR_CTR); 201 1.2.10.2 martin 202 1.2.10.2 martin delta = usecs = 0; 203 1.2.10.2 martin while (n > usecs) { 204 1.2.10.2 martin curr = a9ptmr_read(sc, TMR_CTR); 205 1.2.10.2 martin 206 1.2.10.2 martin /* Check to see if the timer has reloaded. */ 207 1.2.10.2 martin if (curr > last) 208 1.2.10.2 martin delta += (sc->sc_load - curr) + last; 209 1.2.10.2 martin else 210 1.2.10.2 martin delta += last - curr; 211 1.2.10.2 martin 212 1.2.10.2 martin last = curr; 213 1.2.10.2 martin 214 1.2.10.2 martin if (delta >= counts_per_usec) { 215 1.2.10.2 martin usecs += delta / counts_per_usec; 216 1.2.10.2 martin delta %= counts_per_usec; 217 1.2.10.2 martin } 218 1.2.10.2 martin } 219 1.2.10.2 martin } 220 1.2.10.2 martin 221 1.2.10.2 martin 222 1.2.10.2 martin void 223 1.2.10.2 martin a9ptmr_cpu_initclocks(void) 224 1.2.10.2 martin { 225 1.2.10.2 martin struct a9ptmr_softc * const sc __diagused = a9ptmr_sc; 226 1.2.10.2 martin 227 1.2.10.2 martin KASSERT(sc->sc_dev != NULL); 228 1.2.10.2 martin KASSERT(sc->sc_freq != 0); 229 1.2.10.2 martin 230 1.2.10.2 martin } 231 1.2.10.2 martin 232 1.2.10.2 martin void 233 1.2.10.2 martin a9ptmr_init_cpu_clock(struct cpu_info *ci) 234 1.2.10.2 martin { 235 1.2.10.2 martin struct a9ptmr_softc * const sc = a9ptmr_sc; 236 1.2.10.2 martin 237 1.2.10.2 martin /* Disable Private timer and acknowledge any event */ 238 1.2.10.2 martin a9ptmr_write(sc, TMR_CTL, 0); 239 1.2.10.2 martin a9ptmr_write(sc, TMR_INT, TMR_INT_EVENT); 240 1.2.10.2 martin 241 1.2.10.2 martin /* 242 1.2.10.2 martin * Provide the auto load value for the decrementing counter and 243 1.2.10.2 martin * start it. 244 1.2.10.2 martin */ 245 1.2.10.2 martin a9ptmr_write(sc, TMR_LOAD, sc->sc_load); 246 1.2.10.2 martin a9ptmr_write(sc, TMR_CTL, sc->sc_ctl); 247 1.2.10.2 martin 248 1.2.10.2 martin } 249 1.2.10.2 martin 250 1.2.10.2 martin 251 1.2.10.2 martin 252 1.2.10.2 martin /* 253 1.2.10.2 martin * a9ptmr_intr: 254 1.2.10.2 martin * 255 1.2.10.2 martin * Handle the hardclock interrupt. 256 1.2.10.2 martin */ 257 1.2.10.2 martin int 258 1.2.10.2 martin a9ptmr_intr(void *arg) 259 1.2.10.2 martin { 260 1.2.10.2 martin struct clockframe * const cf = arg; 261 1.2.10.2 martin struct a9ptmr_softc * const sc = a9ptmr_sc; 262 1.2.10.2 martin 263 1.2.10.2 martin a9ptmr_write(sc, TMR_INT, TMR_INT_EVENT); 264 1.2.10.2 martin hardclock(cf); 265 1.2.10.2 martin 266 1.2.10.2 martin return 1; 267 1.2.10.2 martin } 268
Indexes created Tue Sep 30 10:09:55 GMT 2025