armperiph.c revision 1.9 1 1.1 matt /*-
2 1.1 matt * Copyright (c) 2012 The NetBSD Foundation, Inc.
3 1.1 matt * All rights reserved.
4 1.1 matt *
5 1.1 matt * This code is derived from software contributed to The NetBSD Foundation
6 1.1 matt * by Matt Thomas of 3am Software Foundry.
7 1.1 matt *
8 1.1 matt * Redistribution and use in source and binary forms, with or without
9 1.1 matt * modification, are permitted provided that the following conditions
10 1.1 matt * are met:
11 1.1 matt * 1. Redistributions of source code must retain the above copyright
12 1.1 matt * notice, this list of conditions and the following disclaimer.
13 1.1 matt * 2. Redistributions in binary form must reproduce the above copyright
14 1.1 matt * notice, this list of conditions and the following disclaimer in the
15 1.1 matt * documentation and/or other materials provided with the distribution.
16 1.1 matt *
17 1.1 matt * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
18 1.1 matt * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
19 1.1 matt * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
20 1.1 matt * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
21 1.1 matt * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
22 1.1 matt * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
23 1.1 matt * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
24 1.1 matt * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
25 1.1 matt * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
26 1.1 matt * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
27 1.1 matt * POSSIBILITY OF SUCH DAMAGE.
28 1.1 matt */
29 1.1 matt
30 1.1 matt #include "locators.h"
31 1.1 matt
32 1.1 matt #include <sys/cdefs.h>
33 1.1 matt
34 1.9 skrll __KERNEL_RCSID(1, "$NetBSD: armperiph.c,v 1.9 2015/02/28 15:45:12 skrll Exp $");
35 1.1 matt
36 1.1 matt #include <sys/param.h>
37 1.1 matt #include <sys/device.h>
38 1.1 matt
39 1.1 matt #include "ioconf.h"
40 1.1 matt
41 1.1 matt #include <arm/mainbus/mainbus.h>
42 1.1 matt #include <arm/cortex/mpcore_var.h>
43 1.9 skrll #include <arm/cortex/gtmr_intr.h>
44 1.1 matt
45 1.1 matt static int armperiph_match(device_t, cfdata_t, void *);
46 1.1 matt static void armperiph_attach(device_t, device_t, void *);
47 1.1 matt
48 1.1 matt static bool attached;
49 1.1 matt
50 1.1 matt struct armperiph_softc {
51 1.1 matt device_t sc_dev;
52 1.1 matt bus_space_tag_t sc_memt;
53 1.1 matt bus_space_handle_t sc_memh;
54 1.1 matt };
55 1.1 matt
56 1.4 matt struct armperiph_info {
57 1.4 matt const char pi_name[12];
58 1.4 matt bus_size_t pi_off1;
59 1.4 matt bus_size_t pi_off2;
60 1.4 matt };
61 1.4 matt
62 1.2 matt #ifdef CPU_CORTEXA5
63 1.4 matt static const struct armperiph_info a5_devices[] = {
64 1.4 matt { "armscu", 0x0000, 0 },
65 1.4 matt { "armgic", 0x1000, 0x0100 },
66 1.4 matt { "a9tmr", 0x0200, 0 },
67 1.6 jmcneill { "a9wdt", 0x0600, 0 },
68 1.7 jmcneill { "arml2cc", 0, 0 }, /* external; needs "offset" property */
69 1.4 matt { "", 0, 0 },
70 1.1 matt };
71 1.1 matt #endif
72 1.1 matt
73 1.1 matt #ifdef CPU_CORTEXA7
74 1.4 matt static const struct armperiph_info a7_devices[] = {
75 1.4 matt { "armgic", 0x1000, 0x2000 },
76 1.4 matt { "armgtmr", 0, 0 },
77 1.4 matt { "", 0, 0 },
78 1.1 matt };
79 1.1 matt #endif
80 1.1 matt
81 1.1 matt #ifdef CPU_CORTEXA9
82 1.4 matt static const struct armperiph_info a9_devices[] = {
83 1.4 matt { "armscu", 0x0000, 0 },
84 1.4 matt { "arml2cc", 0x2000, 0 },
85 1.4 matt { "armgic", 0x1000, 0x0100 },
86 1.4 matt { "a9tmr", 0x0200, 0 },
87 1.4 matt { "a9wdt", 0x0600, 0 },
88 1.4 matt { "", 0, 0 },
89 1.1 matt };
90 1.1 matt #endif
91 1.1 matt
92 1.3 matt #ifdef CPU_CORTEXA15
93 1.4 matt static const struct armperiph_info a15_devices[] = {
94 1.4 matt { "armgic", 0x1000, 0x2000 },
95 1.4 matt { "armgtmr", 0, 0 },
96 1.4 matt { "", 0, 0 },
97 1.3 matt };
98 1.3 matt #endif
99 1.3 matt
100 1.3 matt
101 1.1 matt static const struct mpcore_config {
102 1.4 matt const struct armperiph_info *cfg_devices;
103 1.1 matt uint32_t cfg_cpuid;
104 1.1 matt uint32_t cfg_cbar_size;
105 1.1 matt } configs[] = {
106 1.1 matt #ifdef CPU_CORTEXA5
107 1.4 matt { a5_devices, 0x410fc050, 2*4096 },
108 1.1 matt #endif
109 1.1 matt #ifdef CPU_CORTEXA7
110 1.4 matt { a7_devices, 0x410fc070, 8*4096 },
111 1.1 matt #endif
112 1.1 matt #ifdef CPU_CORTEXA9
113 1.2 matt { a9_devices, 0x410fc090, 3*4096 },
114 1.1 matt #endif
115 1.1 matt #ifdef CPU_CORTEXA15
116 1.3 matt { a15_devices, 0x410fc0f0, 8*4096 },
117 1.1 matt #endif
118 1.1 matt };
119 1.1 matt
120 1.1 matt static const struct mpcore_config *
121 1.1 matt armperiph_find_config(void)
122 1.1 matt {
123 1.1 matt const uint32_t arm_cpuid = curcpu()->ci_arm_cpuid & 0xff0ff0f0;
124 1.1 matt for (size_t i = 0; i < __arraycount(configs); i++) {
125 1.1 matt if (arm_cpuid == configs[i].cfg_cpuid) {
126 1.1 matt return configs + i;
127 1.1 matt }
128 1.1 matt }
129 1.1 matt
130 1.1 matt return NULL;
131 1.1 matt }
132 1.1 matt
133 1.1 matt CFATTACH_DECL_NEW(armperiph, sizeof(struct armperiph_softc),
134 1.1 matt armperiph_match, armperiph_attach, NULL, NULL);
135 1.1 matt
136 1.1 matt static int
137 1.1 matt armperiph_match(device_t parent, cfdata_t cf, void *aux)
138 1.1 matt {
139 1.1 matt struct mainbus_attach_args * const mb = aux;
140 1.1 matt const int base = cf->cf_loc[MAINBUSCF_BASE];
141 1.1 matt const int size = cf->cf_loc[MAINBUSCF_SIZE];
142 1.1 matt const int dack = cf->cf_loc[MAINBUSCF_DACK];
143 1.1 matt const int irq = cf->cf_loc[MAINBUSCF_IRQ];
144 1.1 matt const int intrbase = cf->cf_loc[MAINBUSCF_INTRBASE];
145 1.1 matt
146 1.1 matt if (attached)
147 1.1 matt return 0;
148 1.1 matt
149 1.1 matt if (base != MAINBUSCF_BASE_DEFAULT || base != mb->mb_iobase
150 1.1 matt || size != MAINBUSCF_SIZE_DEFAULT || size != mb->mb_iosize
151 1.1 matt || dack != MAINBUSCF_DACK_DEFAULT || dack != mb->mb_drq
152 1.1 matt || irq != MAINBUSCF_IRQ_DEFAULT || irq != mb->mb_irq
153 1.1 matt || intrbase != MAINBUSCF_INTRBASE_DEFAULT
154 1.1 matt || intrbase != mb->mb_intrbase)
155 1.1 matt return 0;
156 1.1 matt
157 1.1 matt if (!CPU_ID_CORTEX_P(curcpu()->ci_arm_cpuid))
158 1.1 matt return 0;
159 1.1 matt
160 1.1 matt if (armreg_cbar_read() == 0)
161 1.1 matt return 0;
162 1.1 matt
163 1.1 matt if (armperiph_find_config() == NULL)
164 1.1 matt return 0;
165 1.1 matt
166 1.1 matt return 1;
167 1.1 matt }
168 1.1 matt
169 1.1 matt static void
170 1.1 matt armperiph_attach(device_t parent, device_t self, void *aux)
171 1.1 matt {
172 1.1 matt struct armperiph_softc * const sc = device_private(self);
173 1.1 matt struct mainbus_attach_args * const mb = aux;
174 1.1 matt bus_addr_t cbar = armreg_cbar_read();
175 1.1 matt const struct mpcore_config * const cfg = armperiph_find_config();
176 1.5 jmcneill prop_dictionary_t prop = device_properties(self);
177 1.5 jmcneill uint32_t cbar_override;
178 1.5 jmcneill
179 1.5 jmcneill if (prop_dictionary_get_uint32(prop, "cbar", &cbar_override))
180 1.5 jmcneill cbar = (bus_addr_t)cbar_override;
181 1.1 matt
182 1.1 matt /*
183 1.1 matt * The normal mainbus bus space will not work for us so the port's
184 1.1 matt * device_register must have replaced it with one that will work.
185 1.1 matt */
186 1.1 matt sc->sc_dev = self;
187 1.1 matt sc->sc_memt = mb->mb_iot;
188 1.1 matt
189 1.1 matt int error = bus_space_map(sc->sc_memt, cbar, cfg->cfg_cbar_size, 0,
190 1.1 matt &sc->sc_memh);
191 1.1 matt if (error) {
192 1.1 matt aprint_normal(": error mapping registers at %#lx: %d\n",
193 1.1 matt cbar, error);
194 1.1 matt return;
195 1.1 matt }
196 1.1 matt aprint_normal("\n");
197 1.1 matt
198 1.1 matt /*
199 1.1 matt * Let's try to attach any children we may have.
200 1.1 matt */
201 1.4 matt for (size_t i = 0; cfg->cfg_devices[i].pi_name[0] != 0; i++) {
202 1.1 matt struct mpcore_attach_args mpcaa = {
203 1.4 matt .mpcaa_name = cfg->cfg_devices[i].pi_name,
204 1.1 matt .mpcaa_memt = sc->sc_memt,
205 1.1 matt .mpcaa_memh = sc->sc_memh,
206 1.4 matt .mpcaa_off1 = cfg->cfg_devices[i].pi_off1,
207 1.4 matt .mpcaa_off2 = cfg->cfg_devices[i].pi_off2,
208 1.1 matt };
209 1.9 skrll #if defined(CPU_CORTEXA7) || defined(CPU_CORTEXA15)
210 1.8 skrll if (strcmp(mpcaa.mpcaa_name, "armgtmr") == 0) {
211 1.8 skrll mpcaa.mpcaa_irq = IRQ_GTMR_PPI_VTIMER;
212 1.8 skrll }
213 1.9 skrll #endif
214 1.1 matt
215 1.1 matt config_found(self, &mpcaa, NULL);
216 1.1 matt }
217 1.1 matt }
218