1 1.3 skrll /* $NetBSD: mpcore_var.h,v 1.3 2015/02/28 09:34:35 skrll Exp $ */ 2 1.1 matt /*- 3 1.1 matt * Copyright (c) 2012 The NetBSD Foundation, Inc. 4 1.1 matt * All rights reserved. 5 1.1 matt * 6 1.1 matt * This code is derived from software contributed to The NetBSD Foundation 7 1.1 matt * by Matt Thomas of 3am Software Foundry. 8 1.1 matt * 9 1.1 matt * Redistribution and use in source and binary forms, with or without 10 1.1 matt * modification, are permitted provided that the following conditions 11 1.1 matt * are met: 12 1.1 matt * 1. Redistributions of source code must retain the above copyright 13 1.1 matt * notice, this list of conditions and the following disclaimer. 14 1.1 matt * 2. Redistributions in binary form must reproduce the above copyright 15 1.1 matt * notice, this list of conditions and the following disclaimer in the 16 1.1 matt * documentation and/or other materials provided with the distribution. 17 1.1 matt * 18 1.1 matt * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 19 1.1 matt * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 20 1.1 matt * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 21 1.1 matt * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 22 1.1 matt * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 23 1.1 matt * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24 1.1 matt * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25 1.1 matt * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 26 1.1 matt * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27 1.1 matt * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 28 1.1 matt * POSSIBILITY OF SUCH DAMAGE. 29 1.1 matt */ 30 1.1 matt 31 1.1 matt #ifndef _ARM_CORTEX_MPCORE_VAR_H_ 32 1.1 matt #define _ARM_CORTEX_MPCORE_VAR_H_ 33 1.1 matt 34 1.1 matt struct mpcore_attach_args { 35 1.1 matt const char *mpcaa_name; 36 1.1 matt bus_space_tag_t mpcaa_memt; 37 1.1 matt bus_space_handle_t mpcaa_memh; 38 1.2 matt bus_size_t mpcaa_off1; 39 1.2 matt bus_size_t mpcaa_off2; 40 1.3 skrll int mpcaa_irq; 41 1.1 matt }; 42 1.1 matt 43 1.1 matt #endif /* _ARM_CORTEX_MPCORE_VAR_H_ */ 44