am335x-ufw.dts revision 1.1
1 /* $NetBSD: am335x-ufw.dts,v 1.1 2026/10/27 20:06:33 yurix Exp $ */ 2 3 /*- 4 * Copyright (c) 2016, 2017 Rubicon Communications, LLC (Netgate) 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 * 28 */ 29 30 /dts-v1/; 31 32 #include "ti/omap/am33xx.dtsi" 33 34 / { 35 model = "AM335x uFW"; 36 compatible = "ti,am335x-ufw", "ti,am335x-ubmc", "ti,am33xx"; 37 38 memory { 39 device_type = "memory"; 40 reg = <0x80000000 0x20000000>; /* 512 MB */ 41 }; 42 43 vmmcsd_fixed: fixedregulator@0 { 44 compatible = "regulator-fixed"; 45 regulator-name = "vmmcsd_fixed"; 46 regulator-min-microvolt = <3300000>; 47 regulator-max-microvolt = <3300000>; 48 }; 49 }; 50 51 &am33xx_pinmux { 52 pinctrl-names = "default"; 53 pinctrl-0 = <&clkout2_pin>; 54 55 i2c0_pins: pinmux_i2c0_pins { 56 pinctrl-single,pins = < 57 AM33XX_IOPAD(0x988, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */ 58 AM33XX_IOPAD(0x98c, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */ 59 >; 60 }; 61 62 i2c1_pins: pinmux_i2c1_pins { 63 pinctrl-single,pins = < 64 AM33XX_IOPAD(0x968, PIN_INPUT_PULLUP | MUX_MODE3) /* uart0_ctsn.i2c1_sda */ 65 AM33XX_IOPAD(0x96c, PIN_INPUT_PULLUP | MUX_MODE3) /* uart0_rtsn.i2c1_scl */ 66 >; 67 }; 68 69 uart0_pins: pinmux_uart0_pins { 70 pinctrl-single,pins = < 71 AM33XX_IOPAD(0x970, PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */ 72 AM33XX_IOPAD(0x974, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */ 73 >; 74 }; 75 76 clkout2_pin: pinmux_clkout2_pin { 77 pinctrl-single,pins = < 78 AM33XX_IOPAD(0x9b4, PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr1.clkout2 */ 79 >; 80 }; 81 82 cpsw_default: cpsw_default { 83 pinctrl-single,pins = < 84 /* Slave 1 */ 85 AM33XX_IOPAD(0x914, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txen.rgmii_1_txen */ 86 AM33XX_IOPAD(0x918, PIN_INPUT_PULLUP | MUX_MODE2) /* mii1_rxdv.rgmii_1_rxdv */ 87 AM33XX_IOPAD(0x91c, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd3.rgmii_1_txd3 */ 88 AM33XX_IOPAD(0x920, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd2.rgmii_1_txd2 */ 89 AM33XX_IOPAD(0x924, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd1.rgmii_1_txd1 */ 90 AM33XX_IOPAD(0x928, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd0.rgmii_1_txd0 */ 91 AM33XX_IOPAD(0x92c, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txclk.rgmii_1_txclk */ 92 AM33XX_IOPAD(0x930, PIN_INPUT_PULLUP | MUX_MODE2) /* mii1_rxclk.rgmii_1_rxclk */ 93 AM33XX_IOPAD(0x934, PIN_INPUT_PULLUP | MUX_MODE2) /* mii1_rxd3.rgmii_1_rxd3 */ 94 AM33XX_IOPAD(0x938, PIN_INPUT_PULLUP | MUX_MODE2) /* mii1_rxd2.rgmii_1_rxd2 */ 95 AM33XX_IOPAD(0x93c, PIN_INPUT_PULLUP | MUX_MODE2) /* mii1_rxd1.rgmii_1_rxd1 */ 96 AM33XX_IOPAD(0x940, PIN_INPUT_PULLUP | MUX_MODE2) /* mii1_rxd0.rgmii_1_rxd0 */ 97 98 /* Slave 2 */ 99 AM33XX_IOPAD(0x840, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gmpc_a0.rgmii_2_txen */ 100 AM33XX_IOPAD(0x844, PIN_INPUT_PULLUP | MUX_MODE2) /* gmpc_a1.rgmii_2_rxdv */ 101 AM33XX_IOPAD(0x848, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gmpc_a2.rgmii_2_txd3 */ 102 AM33XX_IOPAD(0x84c, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gmpc_a3.rgmii_2_txd2 */ 103 AM33XX_IOPAD(0x850, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gmpc_a4.rgmii_2_txd1 */ 104 AM33XX_IOPAD(0x854, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gmpc_a5.rgmii_2_txd0 */ 105 AM33XX_IOPAD(0x858, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gmpc_a6.rgmii_2_txclk */ 106 AM33XX_IOPAD(0x85c, PIN_INPUT_PULLUP | MUX_MODE2) /* gmpc_a7.rgmii_2_rxclk */ 107 AM33XX_IOPAD(0x860, PIN_INPUT_PULLUP | MUX_MODE2) /* gmpc_a8.rgmii_2_rxd3 */ 108 AM33XX_IOPAD(0x864, PIN_INPUT_PULLUP | MUX_MODE2) /* gmpc_a9.rgmii_2_rxd2 */ 109 AM33XX_IOPAD(0x868, PIN_INPUT_PULLUP | MUX_MODE2) /* gmpc_a10.rgmii_2_rxd1 */ 110 AM33XX_IOPAD(0x86c, PIN_INPUT_PULLUP | MUX_MODE2) /* gmpc_a11.rgmii_2_rxd0 */ 111 >; 112 }; 113 114 cpsw_sleep: cpsw_sleep { 115 pinctrl-single,pins = < 116 /* Slave 1 reset value */ 117 AM33XX_IOPAD(0x914, PIN_INPUT_PULLDOWN | MUX_MODE7) 118 AM33XX_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE7) 119 AM33XX_IOPAD(0x91c, PIN_INPUT_PULLDOWN | MUX_MODE7) 120 AM33XX_IOPAD(0x920, PIN_INPUT_PULLDOWN | MUX_MODE7) 121 AM33XX_IOPAD(0x924, PIN_INPUT_PULLDOWN | MUX_MODE7) 122 AM33XX_IOPAD(0x928, PIN_INPUT_PULLDOWN | MUX_MODE7) 123 AM33XX_IOPAD(0x92c, PIN_INPUT_PULLDOWN | MUX_MODE7) 124 AM33XX_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE7) 125 AM33XX_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE7) 126 AM33XX_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE7) 127 AM33XX_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE7) 128 AM33XX_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE7) 129 130 /* Slave 2 reset value */ 131 AM33XX_IOPAD(0x840, PIN_INPUT_PULLDOWN | MUX_MODE7) 132 AM33XX_IOPAD(0x844, PIN_INPUT_PULLDOWN | MUX_MODE7) 133 AM33XX_IOPAD(0x848, PIN_INPUT_PULLDOWN | MUX_MODE7) 134 AM33XX_IOPAD(0x84c, PIN_INPUT_PULLDOWN | MUX_MODE7) 135 AM33XX_IOPAD(0x850, PIN_INPUT_PULLDOWN | MUX_MODE7) 136 AM33XX_IOPAD(0x854, PIN_INPUT_PULLDOWN | MUX_MODE7) 137 AM33XX_IOPAD(0x858, PIN_INPUT_PULLDOWN | MUX_MODE7) 138 AM33XX_IOPAD(0x85c, PIN_INPUT_PULLDOWN | MUX_MODE7) 139 AM33XX_IOPAD(0x860, PIN_INPUT_PULLDOWN | MUX_MODE7) 140 AM33XX_IOPAD(0x864, PIN_INPUT_PULLDOWN | MUX_MODE7) 141 AM33XX_IOPAD(0x868, PIN_INPUT_PULLDOWN | MUX_MODE7) 142 AM33XX_IOPAD(0x86c, PIN_INPUT_PULLDOWN | MUX_MODE7) 143 >; 144 }; 145 146 davinci_mdio_default: davinci_mdio_default { 147 pinctrl-single,pins = < 148 /* MDIO */ 149 AM33XX_IOPAD(0x948, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */ 150 AM33XX_IOPAD(0x94c, PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */ 151 >; 152 }; 153 154 davinci_mdio_sleep: davinci_mdio_sleep { 155 pinctrl-single,pins = < 156 /* MDIO reset value */ 157 AM33XX_IOPAD(0x948, PIN_INPUT_PULLDOWN | MUX_MODE7) 158 AM33XX_IOPAD(0x94c, PIN_INPUT_PULLDOWN | MUX_MODE7) 159 >; 160 }; 161 162 mmc1_pins: pinmux_mmc1_pins { 163 pinctrl-single,pins = < 164 AM33XX_IOPAD(0x8f0, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat3.mmc0_dat3 */ 165 AM33XX_IOPAD(0x8f4, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat2.mmc0_dat2 */ 166 AM33XX_IOPAD(0x8f8, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat1.mmc0_dat1 */ 167 AM33XX_IOPAD(0x8fc, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat0.mmc0_dat0 */ 168 AM33XX_IOPAD(0x900, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_clk.mmc0_clk */ 169 AM33XX_IOPAD(0x904, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_cmd.mmc0_cmd */ 170 AM33XX_IOPAD(0x960, PIN_INPUT_PULLUP | MUX_MODE5) /* spi0_cs1.mmc0_cd */ 171 >; 172 }; 173 174 emmc_pins: pinmux_emmc_pins { 175 pinctrl-single,pins = < 176 AM33XX_IOPAD(0x994, PIN_INPUT_PULLUP | MUX_MODE4) /* mcasp0_fsx.mmc1_cd */ 177 AM33XX_IOPAD(0x880, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn1.mmc1_clk */ 178 AM33XX_IOPAD(0x884, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn2.mmc1_cmd */ 179 AM33XX_IOPAD(0x800, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad0.mmc1_dat0 */ 180 AM33XX_IOPAD(0x804, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad1.mmc1_dat1 */ 181 AM33XX_IOPAD(0x808, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad2.mmc1_dat2 */ 182 AM33XX_IOPAD(0x80c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad3.mmc1_dat3 */ 183 AM33XX_IOPAD(0x810, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad4.mmc1_dat4 */ 184 AM33XX_IOPAD(0x814, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad5.mmc1_dat5 */ 185 AM33XX_IOPAD(0x818, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad6.mmc1_dat6 */ 186 AM33XX_IOPAD(0x81c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad7.mmc1_dat7 */ 187 >; 188 }; 189 }; 190 191 &uart0 { 192 pinctrl-names = "default"; 193 pinctrl-0 = <&uart0_pins>; 194 195 status = "okay"; 196 }; 197 198 &usb { 199 status = "okay"; 200 }; 201 202 &usb_ctrl_mod { 203 status = "okay"; 204 }; 205 206 &usb0_phy { 207 status = "okay"; 208 }; 209 210 &usb1_phy { 211 status = "okay"; 212 }; 213 214 &usb0 { 215 status = "okay"; 216 dr_mode = "host"; 217 }; 218 219 &usb1 { 220 status = "okay"; 221 dr_mode = "host"; 222 }; 223 224 &cppi41dma { 225 status = "okay"; 226 }; 227 228 &mac_sw { 229 status = "okay"; 230 pinctrl-names = "default", "sleep"; 231 pinctrl-0 = <&cpsw_default>; 232 pinctrl-1 = <&cpsw_sleep>; 233 }; 234 235 &cpsw_port1 { 236 phy-mode = "rgmii-id"; 237 phy-handle = <ðphy0>; 238 ti,dual-emac-pvid = <1>; 239 }; 240 241 &cpsw_port2 { 242 phy-mode = "rgmii-id"; 243 phy-handle = <ðphy1>; 244 ti,dual-emac-pvid = <2>; 245 }; 246 247 &davinci_mdio_sw { 248 pinctrl-names = "default", "sleep"; 249 pinctrl-0 = <&davinci_mdio_default>; 250 pinctrl-1 = <&davinci_mdio_sleep>; 251 status = "okay"; 252 253 ethphy0: ethernet-phy@1 { 254 reg = <1>; 255 }; 256 257 ethphy1: ethernet-phy@2 { 258 reg = <2>; 259 }; 260 }; 261 262 &aes { 263 status = "okay"; 264 }; 265 266 &sham { 267 status = "okay"; 268 }; 269 270 &mmc1 { 271 vmmc-supply = <&vmmcsd_fixed>; 272 pinctrl-names = "default"; 273 pinctrl-0 = <&mmc1_pins>; 274 bus-width = <4>; 275 non-removable; 276 wp-disable; 277 status = "okay"; 278 }; 279 280 &mmc2 { 281 vmmc-supply = <&vmmcsd_fixed>; 282 pinctrl-names = "default"; 283 pinctrl-0 = <&emmc_pins>; 284 bus-width = <8>; 285 ti,dual-volt; 286 non-removable; 287 status = "okay"; 288 }; 289 290 &i2c0 { 291 pinctrl-names = "default"; 292 pinctrl-0 = <&i2c0_pins>; 293 294 status = "okay"; 295 clock-frequency = <400000>; 296 297 baseboard_eeprom: baseboard_eeprom@50 { 298 compatible = "atmel,24c02"; 299 reg = <0x50>; 300 301 #address-cells = <1>; 302 #size-cells = <1>; 303 baseboard_data: baseboard_data@0 { 304 reg = <0 0x100>; 305 }; 306 }; 307 }; 308 309 &i2c1 { 310 pinctrl-names = "default"; 311 pinctrl-0 = <&i2c1_pins>; 312 313 status = "okay"; 314 }; 315
Indexes created Tue Nov 03 00:25:12 UTC 2026