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rk3399-rockpro64.dts revision 1.1
      1  1.1  jmcneill /*
      2  1.1  jmcneill  * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd
      3  1.1  jmcneill  *
      4  1.1  jmcneill  * This file is dual-licensed: you can use it either under the terms
      5  1.1  jmcneill  * of the GPL or the X11 license, at your option. Note that this dual
      6  1.1  jmcneill  * licensing only applies to this file, and not this project as a
      7  1.1  jmcneill  * whole.
      8  1.1  jmcneill  *
      9  1.1  jmcneill  *  a) This file is free software; you can redistribute it and/or
     10  1.1  jmcneill  *     modify it under the terms of the GNU General Public License as
     11  1.1  jmcneill  *     published by the Free Software Foundation; either version 2 of the
     12  1.1  jmcneill  *     License, or (at your option) any later version.
     13  1.1  jmcneill  *
     14  1.1  jmcneill  *     This file is distributed in the hope that it will be useful,
     15  1.1  jmcneill  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
     16  1.1  jmcneill  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
     17  1.1  jmcneill  *     GNU General Public License for more details.
     18  1.1  jmcneill  *
     19  1.1  jmcneill  * Or, alternatively,
     20  1.1  jmcneill  *
     21  1.1  jmcneill  *  b) Permission is hereby granted, free of charge, to any person
     22  1.1  jmcneill  *     obtaining a copy of this software and associated documentation
     23  1.1  jmcneill  *     files (the "Software"), to deal in the Software without
     24  1.1  jmcneill  *     restriction, including without limitation the rights to use,
     25  1.1  jmcneill  *     copy, modify, merge, publish, distribute, sublicense, and/or
     26  1.1  jmcneill  *     sell copies of the Software, and to permit persons to whom the
     27  1.1  jmcneill  *     Software is furnished to do so, subject to the following
     28  1.1  jmcneill  *     conditions:
     29  1.1  jmcneill  *
     30  1.1  jmcneill  *     The above copyright notice and this permission notice shall be
     31  1.1  jmcneill  *     included in all copies or substantial portions of the Software.
     32  1.1  jmcneill  *
     33  1.1  jmcneill  *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
     34  1.1  jmcneill  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
     35  1.1  jmcneill  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
     36  1.1  jmcneill  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
     37  1.1  jmcneill  *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
     38  1.1  jmcneill  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
     39  1.1  jmcneill  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
     40  1.1  jmcneill  *     OTHER DEALINGS IN THE SOFTWARE.
     41  1.1  jmcneill  */
     42  1.1  jmcneill 
     43  1.1  jmcneill /dts-v1/;
     44  1.1  jmcneill #include <dt-bindings/pwm/pwm.h>
     45  1.1  jmcneill #include <dt-bindings/input/input.h>
     46  1.1  jmcneill #include "rk3399.dtsi"
     47  1.1  jmcneill #include "rk3399-opp.dtsi"
     48  1.1  jmcneill 
     49  1.1  jmcneill / {
     50  1.1  jmcneill 	model = "Pine64 RockPro64";
     51  1.1  jmcneill 	compatible = "pine64,rockpro64", "rockchip,rk3399";
     52  1.1  jmcneill 
     53  1.1  jmcneill 	chosen {
     54  1.1  jmcneill 		bootargs = "earlycon=uart8250,mmio32,0xff1a0000 swiotlb=1";
     55  1.1  jmcneill 		stdout-path = "serial2:1500000n8";
     56  1.1  jmcneill 	};
     57  1.1  jmcneill 
     58  1.1  jmcneill 	reserved-memory {
     59  1.1  jmcneill 		#address-cells = <2>;
     60  1.1  jmcneill 		#size-cells = <2>;
     61  1.1  jmcneill 		ranges;
     62  1.1  jmcneill 
     63  1.1  jmcneill 		drm_logo: drm-logo@00000000 {
     64  1.1  jmcneill 			compatible = "rockchip,drm-logo";
     65  1.1  jmcneill 			reg = <0x0 0x0 0x0 0x0>;
     66  1.1  jmcneill 		};
     67  1.1  jmcneill 	};
     68  1.1  jmcneill 
     69  1.1  jmcneill 	/* first 64k(0xff8c0000~0xff8d0000) for ddr and suspend */
     70  1.1  jmcneill 	iram: sram@ff8d0000 {
     71  1.1  jmcneill 		compatible = "mmio-sram";
     72  1.1  jmcneill 		reg = <0x0 0xff8d0000 0x0 0x20000>; /* 128k */
     73  1.1  jmcneill 	};
     74  1.1  jmcneill 
     75  1.1  jmcneill 	aliases {
     76  1.1  jmcneill 		ethernet0 = &gmac;
     77  1.1  jmcneill 	};
     78  1.1  jmcneill 
     79  1.1  jmcneill 	dc_12v: dc-12v {
     80  1.1  jmcneill 		compatible = "regulator-fixed";
     81  1.1  jmcneill 		regulator-name = "dc_12v";
     82  1.1  jmcneill 		regulator-always-on;
     83  1.1  jmcneill 		regulator-boot-on;
     84  1.1  jmcneill 		regulator-min-microvolt = <12000000>;
     85  1.1  jmcneill 		regulator-max-microvolt = <12000000>;
     86  1.1  jmcneill 	};
     87  1.1  jmcneill 
     88  1.1  jmcneill 	vcc1v8_s0: vcc1v8-s0 {
     89  1.1  jmcneill 		compatible = "regulator-fixed";
     90  1.1  jmcneill 		regulator-name = "vcc1v8_s0";
     91  1.1  jmcneill 		regulator-min-microvolt = <1800000>;
     92  1.1  jmcneill 		regulator-max-microvolt = <1800000>;
     93  1.1  jmcneill 		regulator-always-on;
     94  1.1  jmcneill 	};
     95  1.1  jmcneill 
     96  1.1  jmcneill 	vcc_sys: vcc-sys {
     97  1.1  jmcneill 		compatible = "regulator-fixed";
     98  1.1  jmcneill 		regulator-name = "vcc_sys";
     99  1.1  jmcneill 		regulator-min-microvolt = <5000000>;
    100  1.1  jmcneill 		regulator-max-microvolt = <5000000>;
    101  1.1  jmcneill 		regulator-always-on;
    102  1.1  jmcneill 		vin-supply = <&dc_12v>;
    103  1.1  jmcneill 	};
    104  1.1  jmcneill 
    105  1.1  jmcneill 	vcc_phy: vcc-phy-regulator {
    106  1.1  jmcneill 		compatible = "regulator-fixed";
    107  1.1  jmcneill 		regulator-name = "vcc_phy";
    108  1.1  jmcneill 		regulator-always-on;
    109  1.1  jmcneill 		regulator-boot-on;
    110  1.1  jmcneill 	};
    111  1.1  jmcneill 
    112  1.1  jmcneill 	vcc3v3_sys: vcc3v3-sys {
    113  1.1  jmcneill 		compatible = "regulator-fixed";
    114  1.1  jmcneill 		regulator-name = "vcc3v3_sys";
    115  1.1  jmcneill 		regulator-min-microvolt = <3300000>;
    116  1.1  jmcneill 		regulator-max-microvolt = <3300000>;
    117  1.1  jmcneill 		regulator-always-on;
    118  1.1  jmcneill 		vin-supply = <&vcc_sys>;
    119  1.1  jmcneill 	};
    120  1.1  jmcneill 
    121  1.1  jmcneill 	vcc5v0_host: vcc5v0-host-regulator {
    122  1.1  jmcneill 		compatible = "regulator-fixed";
    123  1.1  jmcneill 		enable-active-high;
    124  1.1  jmcneill 		gpio = <&gpio4 RK_PD2 GPIO_ACTIVE_HIGH>;
    125  1.1  jmcneill 		pinctrl-names = "default";
    126  1.1  jmcneill 		pinctrl-0 = <&host_vbus_drv>;
    127  1.1  jmcneill 		regulator-name = "vcc5v0_host";
    128  1.1  jmcneill 		regulator-always-on;
    129  1.1  jmcneill 	};
    130  1.1  jmcneill 
    131  1.1  jmcneill 	vdd_log: vdd-log {
    132  1.1  jmcneill 		compatible = "pwm-regulator";
    133  1.1  jmcneill 		pwms = <&pwm2 0 25000 1>;
    134  1.1  jmcneill 		pwm-supply = <&vcc_sys>;
    135  1.1  jmcneill 		regulator-name = "vdd_log";
    136  1.1  jmcneill 		regulator-min-microvolt = <800000>;
    137  1.1  jmcneill 		regulator-max-microvolt = <1400000>;
    138  1.1  jmcneill 		regulator-always-on;
    139  1.1  jmcneill 		regulator-boot-on;
    140  1.1  jmcneill 
    141  1.1  jmcneill 		/* for rockchip boot on */
    142  1.1  jmcneill 		rockchip,pwm_id= <2>;
    143  1.1  jmcneill 		rockchip,pwm_voltage = <900000>;
    144  1.1  jmcneill 	};
    145  1.1  jmcneill 
    146  1.1  jmcneill 	clkin_gmac: external-gmac-clock {
    147  1.1  jmcneill 		compatible = "fixed-clock";
    148  1.1  jmcneill 		clock-frequency = <125000000>;
    149  1.1  jmcneill 		clock-output-names = "clkin_gmac";
    150  1.1  jmcneill 		#clock-cells = <0>;
    151  1.1  jmcneill 	};
    152  1.1  jmcneill 
    153  1.1  jmcneill 	spdif_out: spdif-out {
    154  1.1  jmcneill 		status = "okay";
    155  1.1  jmcneill 		compatible = "linux,spdif-dit";
    156  1.1  jmcneill 		#sound-dai-cells = <0>;
    157  1.1  jmcneill 	};
    158  1.1  jmcneill 
    159  1.1  jmcneill 	sdio_pwrseq: sdio-pwrseq {
    160  1.1  jmcneill 		compatible = "mmc-pwrseq-simple";
    161  1.1  jmcneill 		clocks = <&rk808 1>;
    162  1.1  jmcneill 		clock-names = "ext_clock";
    163  1.1  jmcneill 		pinctrl-names = "default";
    164  1.1  jmcneill 		pinctrl-0 = <&wifi_enable_h>;
    165  1.1  jmcneill 
    166  1.1  jmcneill 		/*
    167  1.1  jmcneill 		 * On the module itself this is one of these (depending
    168  1.1  jmcneill 		 * on the actual card populated):
    169  1.1  jmcneill 		 * - SDIO_RESET_L_WL_REG_ON
    170  1.1  jmcneill 		 * - PDN (power down when low)
    171  1.1  jmcneill 		 */
    172  1.1  jmcneill 		reset-gpios = <&gpio0 10 GPIO_ACTIVE_LOW>;
    173  1.1  jmcneill 	};
    174  1.1  jmcneill 
    175  1.1  jmcneill 	xin32k: xin32k {
    176  1.1  jmcneill 		compatible = "fixed-clock";
    177  1.1  jmcneill 		clock-frequency = <32768>;
    178  1.1  jmcneill 		clock-output-names = "xin32k";
    179  1.1  jmcneill 		#clock-cells = <0>;
    180  1.1  jmcneill 	};
    181  1.1  jmcneill 
    182  1.1  jmcneill 	wireless-wlan {
    183  1.1  jmcneill 		compatible = "wlan-platdata";
    184  1.1  jmcneill 		rockchip,grf = <&grf>;
    185  1.1  jmcneill 		wifi_chip_type = "ap6354";
    186  1.1  jmcneill 		sdio_vref = <1800>;
    187  1.1  jmcneill 		WIFI,host_wake_irq = <&gpio0 3 GPIO_ACTIVE_HIGH>;
    188  1.1  jmcneill 		status = "okay";
    189  1.1  jmcneill 	};
    190  1.1  jmcneill 
    191  1.1  jmcneill 	wireless-bluetooth {
    192  1.1  jmcneill 		compatible = "bluetooth-platdata";
    193  1.1  jmcneill 		clocks = <&rk808 1>;
    194  1.1  jmcneill 		clock-names = "ext_clock";
    195  1.1  jmcneill 		uart_rts_gpios = <&gpio2 19 GPIO_ACTIVE_LOW>;
    196  1.1  jmcneill 		pinctrl-names = "default", "rts_gpio";
    197  1.1  jmcneill 		pinctrl-0 = <&uart0_rts>;
    198  1.1  jmcneill 		pinctrl-1 = <&uart0_gpios>;
    199  1.1  jmcneill 		BT,reset_gpio    = <&gpio0 9 GPIO_ACTIVE_HIGH>;
    200  1.1  jmcneill 		BT,wake_gpio     = <&gpio2 27 GPIO_ACTIVE_HIGH>;
    201  1.1  jmcneill 		BT,wake_host_irq = <&gpio0 4 GPIO_ACTIVE_HIGH>;
    202  1.1  jmcneill 		status = "okay";
    203  1.1  jmcneill 	};
    204  1.1  jmcneill 
    205  1.1  jmcneill 	hdmi_dp_sound: hdmi-dp-sound {
    206  1.1  jmcneill 		status = "okay";
    207  1.1  jmcneill 		compatible = "rockchip,rk3399-hdmi-dp";
    208  1.1  jmcneill 		rockchip,cpu = <&i2s2>;
    209  1.1  jmcneill 		rockchip,codec = <&hdmi>, <&cdn_dp>;
    210  1.1  jmcneill 	};
    211  1.1  jmcneill 
    212  1.1  jmcneill 	test-power {
    213  1.1  jmcneill 		status = "okay";
    214  1.1  jmcneill 	};
    215  1.1  jmcneill 
    216  1.1  jmcneill 	leds {
    217  1.1  jmcneill 		status = "okay";
    218  1.1  jmcneill 		compatible = "gpio-leds";
    219  1.1  jmcneill 		work-led {
    220  1.1  jmcneill 			gpios = <&gpio0 11 GPIO_ACTIVE_HIGH>;
    221  1.1  jmcneill 			linux,default-trigger = "none";
    222  1.1  jmcneill 			default-state = "on";
    223  1.1  jmcneill 			mode = <0x23>;
    224  1.1  jmcneill 		};
    225  1.1  jmcneill 		diy-led {
    226  1.1  jmcneill 			gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
    227  1.1  jmcneill 			linux,default-trigger = "none";
    228  1.1  jmcneill 			default-state = "on";
    229  1.1  jmcneill 			mode = <0x23>;
    230  1.1  jmcneill 		};
    231  1.1  jmcneill 	};
    232  1.1  jmcneill 
    233  1.1  jmcneill 	fan0: pwm-fan {
    234  1.1  jmcneill 		compatible = "pwm-fan";
    235  1.1  jmcneill 		pwms = <&pwm1 0 20000000 0>;
    236  1.1  jmcneill 		cooling-min-state = <0>;
    237  1.1  jmcneill 		cooling-max-state = <3>;
    238  1.1  jmcneill 		#cooling-cells = <2>;
    239  1.1  jmcneill 		cooling-levels = <0 102 170 230>;
    240  1.1  jmcneill 	};
    241  1.1  jmcneill 
    242  1.1  jmcneill 	rk_key: rockchip-key {
    243  1.1  jmcneill 		compatible = "rockchip,key";
    244  1.1  jmcneill 		status = "okay";
    245  1.1  jmcneill 
    246  1.1  jmcneill 		io-channels = <&saradc 1>;
    247  1.1  jmcneill 
    248  1.1  jmcneill 		power-key {
    249  1.1  jmcneill 			gpios = <&gpio0 5 GPIO_ACTIVE_LOW>;
    250  1.1  jmcneill 			linux,code = <116>;
    251  1.1  jmcneill 			label = "power";
    252  1.1  jmcneill 			gpio-key,wakeup;
    253  1.1  jmcneill 		};
    254  1.1  jmcneill 	};
    255  1.1  jmcneill };
    256  1.1  jmcneill 
    257  1.1  jmcneill &sdmmc {
    258  1.1  jmcneill 	clock-frequency = <50000000>;
    259  1.1  jmcneill 	clock-freq-min-max = <400000 150000000>;
    260  1.1  jmcneill 	supports-sd;
    261  1.1  jmcneill 	bus-width = <4>;
    262  1.1  jmcneill 	cap-mmc-highspeed;
    263  1.1  jmcneill 	cap-sd-highspeed;
    264  1.1  jmcneill 	disable-wp;
    265  1.1  jmcneill 	num-slots = <1>;
    266  1.1  jmcneill 	sd-uhs-sdr104;
    267  1.1  jmcneill 	vqmmc-supply = <&vcc_sd>;
    268  1.1  jmcneill 	pinctrl-names = "default";
    269  1.1  jmcneill 	pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
    270  1.1  jmcneill 	card-detect-delay = <800>;
    271  1.1  jmcneill 	status = "okay";
    272  1.1  jmcneill };
    273  1.1  jmcneill 
    274  1.1  jmcneill &sdio0 {
    275  1.1  jmcneill 	clock-frequency = <50000000>;
    276  1.1  jmcneill 	clock-freq-min-max = <200000 50000000>;
    277  1.1  jmcneill 	supports-sdio;
    278  1.1  jmcneill 	bus-width = <4>;
    279  1.1  jmcneill 	disable-wp;
    280  1.1  jmcneill 	cap-sd-highspeed;
    281  1.1  jmcneill 	cap-sdio-irq;
    282  1.1  jmcneill 	keep-power-in-suspend;
    283  1.1  jmcneill 	mmc-pwrseq = <&sdio_pwrseq>;
    284  1.1  jmcneill 	non-removable;
    285  1.1  jmcneill 	num-slots = <1>;
    286  1.1  jmcneill 	pinctrl-names = "default";
    287  1.1  jmcneill 	pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
    288  1.1  jmcneill 	sd-uhs-sdr104;
    289  1.1  jmcneill 	status = "disabled";
    290  1.1  jmcneill };
    291  1.1  jmcneill 
    292  1.1  jmcneill &emmc_phy {
    293  1.1  jmcneill 	status = "okay";
    294  1.1  jmcneill };
    295  1.1  jmcneill 
    296  1.1  jmcneill &sdhci {
    297  1.1  jmcneill 	bus-width = <8>;
    298  1.1  jmcneill 	//mmc-hs400-1_8v;
    299  1.1  jmcneill 	mmc-hs200-1_8v;
    300  1.1  jmcneill 	supports-emmc;
    301  1.1  jmcneill 	non-removable;
    302  1.1  jmcneill 	keep-power-in-suspend;
    303  1.1  jmcneill 	//mmc-hs400-enhanced-strobe;
    304  1.1  jmcneill 	status = "okay";
    305  1.1  jmcneill };
    306  1.1  jmcneill 
    307  1.1  jmcneill &i2s0 {
    308  1.1  jmcneill 	status = "okay";
    309  1.1  jmcneill 	rockchip,i2s-broken-burst-len;
    310  1.1  jmcneill 	rockchip,playback-channels = <8>;
    311  1.1  jmcneill 	rockchip,capture-channels = <8>;
    312  1.1  jmcneill 	#sound-dai-cells = <0>;
    313  1.1  jmcneill };
    314  1.1  jmcneill 
    315  1.1  jmcneill &i2s1 {
    316  1.1  jmcneill 	status = "okay";
    317  1.1  jmcneill 	rockchip,i2s-broken-burst-len;
    318  1.1  jmcneill 	rockchip,playback-channels = <8>;
    319  1.1  jmcneill 	rockchip,capture-channels = <8>;
    320  1.1  jmcneill 	#sound-dai-cells = <0>;
    321  1.1  jmcneill };
    322  1.1  jmcneill 
    323  1.1  jmcneill &i2s2 {
    324  1.1  jmcneill 	status = "okay";
    325  1.1  jmcneill 	#sound-dai-cells = <0>;
    326  1.1  jmcneill };
    327  1.1  jmcneill 
    328  1.1  jmcneill &spdif {
    329  1.1  jmcneill 	pinctrl-0 = <&spdif_bus_1>;
    330  1.1  jmcneill 	status = "okay";
    331  1.1  jmcneill 	#sound-dai-cells = <0>;
    332  1.1  jmcneill };
    333  1.1  jmcneill 
    334  1.1  jmcneill &i2c0 {
    335  1.1  jmcneill 	status = "okay";
    336  1.1  jmcneill 	i2c-scl-rising-time-ns = <180>;
    337  1.1  jmcneill 	i2c-scl-falling-time-ns = <30>;
    338  1.1  jmcneill 	clock-frequency = <400000>;
    339  1.1  jmcneill 
    340  1.1  jmcneill 	vdd_cpu_b: syr827@40 {
    341  1.1  jmcneill 		compatible = "silergy,syr827";
    342  1.1  jmcneill 		reg = <0x40>;
    343  1.1  jmcneill 		regulator-compatible = "fan53555-reg";
    344  1.1  jmcneill 		pinctrl-0 = <&vsel1_gpio>;
    345  1.1  jmcneill 		vsel-gpios = <&gpio1 17 GPIO_ACTIVE_HIGH>;
    346  1.1  jmcneill 		regulator-name = "vdd_cpu_b";
    347  1.1  jmcneill 		regulator-min-microvolt = <712500>;
    348  1.1  jmcneill 		regulator-max-microvolt = <1500000>;
    349  1.1  jmcneill 		regulator-ramp-delay = <1000>;
    350  1.1  jmcneill 		fcs,suspend-voltage-selector = <1>;
    351  1.1  jmcneill 		regulator-always-on;
    352  1.1  jmcneill 		regulator-boot-on;
    353  1.1  jmcneill 		vin-supply = <&vcc_sys>;
    354  1.1  jmcneill 		regulator-state-mem {
    355  1.1  jmcneill 			regulator-off-in-suspend;
    356  1.1  jmcneill 		};
    357  1.1  jmcneill 	};
    358  1.1  jmcneill 
    359  1.1  jmcneill 	vdd_gpu: syr828@41 {
    360  1.1  jmcneill 		compatible = "silergy,syr828";
    361  1.1  jmcneill 		reg = <0x41>;
    362  1.1  jmcneill 		regulator-compatible = "fan53555-reg";
    363  1.1  jmcneill 		pinctrl-0 = <&vsel2_gpio>;
    364  1.1  jmcneill 		vsel-gpios = <&gpio1 14 GPIO_ACTIVE_HIGH>;
    365  1.1  jmcneill 		regulator-name = "vdd_gpu";
    366  1.1  jmcneill 		regulator-min-microvolt = <712500>;
    367  1.1  jmcneill 		regulator-max-microvolt = <1500000>;
    368  1.1  jmcneill 		regulator-ramp-delay = <1000>;
    369  1.1  jmcneill 		fcs,suspend-voltage-selector = <1>;
    370  1.1  jmcneill 		regulator-always-on;
    371  1.1  jmcneill 		regulator-boot-on;
    372  1.1  jmcneill 		vin-supply = <&vcc_sys>;
    373  1.1  jmcneill 		regulator-initial-mode = <1>; /* 1:force PWM 2:auto */
    374  1.1  jmcneill 		regulator-state-mem {
    375  1.1  jmcneill 			regulator-off-in-suspend;
    376  1.1  jmcneill 		};
    377  1.1  jmcneill 	};
    378  1.1  jmcneill 
    379  1.1  jmcneill 	rk808: pmic@1b {
    380  1.1  jmcneill 		compatible = "rockchip,rk808";
    381  1.1  jmcneill 		reg = <0x1b>;
    382  1.1  jmcneill 		interrupt-parent = <&gpio1>;
    383  1.1  jmcneill 		interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
    384  1.1  jmcneill 		pinctrl-names = "default";
    385  1.1  jmcneill 		pinctrl-0 = <&pmic_int_l>;
    386  1.1  jmcneill 		rockchip,system-power-controller;
    387  1.1  jmcneill 		wakeup-source;
    388  1.1  jmcneill 		#clock-cells = <1>;
    389  1.1  jmcneill 		clock-output-names = "rk808-clkout1", "rk808-clkout2";
    390  1.1  jmcneill 
    391  1.1  jmcneill 		vcc1-supply = <&vcc_sys>;
    392  1.1  jmcneill 		vcc2-supply = <&vcc_sys>;
    393  1.1  jmcneill 		vcc3-supply = <&vcc_sys>;
    394  1.1  jmcneill 		vcc4-supply = <&vcc_sys>;
    395  1.1  jmcneill 		vcc6-supply = <&vcc_sys>;
    396  1.1  jmcneill 		vcc7-supply = <&vcc_sys>;
    397  1.1  jmcneill 		vcc8-supply = <&vcc3v3_sys>;
    398  1.1  jmcneill 		vcc9-supply = <&vcc_sys>;
    399  1.1  jmcneill 		vcc10-supply = <&vcc_sys>;
    400  1.1  jmcneill 		vcc11-supply = <&vcc_sys>;
    401  1.1  jmcneill 		vcc12-supply = <&vcc3v3_sys>;
    402  1.1  jmcneill 		vddio-supply = <&vcc_1v8>;
    403  1.1  jmcneill 
    404  1.1  jmcneill 		regulators {
    405  1.1  jmcneill 			vdd_center: DCDC_REG1 {
    406  1.1  jmcneill 				regulator-name = "vdd_center";
    407  1.1  jmcneill 				regulator-min-microvolt = <900000>;
    408  1.1  jmcneill 				regulator-max-microvolt = <900000>;
    409  1.1  jmcneill 				regulator-ramp-delay = <6001>;
    410  1.1  jmcneill 				regulator-always-on;
    411  1.1  jmcneill 				regulator-boot-on;
    412  1.1  jmcneill 				regulator-state-mem {
    413  1.1  jmcneill 					regulator-off-in-suspend;
    414  1.1  jmcneill 				};
    415  1.1  jmcneill 			};
    416  1.1  jmcneill 
    417  1.1  jmcneill 			vdd_cpu_l: DCDC_REG2 {
    418  1.1  jmcneill 				regulator-name = "vdd_cpu_l";
    419  1.1  jmcneill 				regulator-min-microvolt = <750000>;
    420  1.1  jmcneill 				regulator-max-microvolt = <1350000>;
    421  1.1  jmcneill 				regulator-ramp-delay = <6001>;
    422  1.1  jmcneill 				regulator-always-on;
    423  1.1  jmcneill 				regulator-boot-on;
    424  1.1  jmcneill 				regulator-state-mem {
    425  1.1  jmcneill 					regulator-off-in-suspend;
    426  1.1  jmcneill 				};
    427  1.1  jmcneill 			};
    428  1.1  jmcneill 
    429  1.1  jmcneill 			vcc_ddr: DCDC_REG3 {
    430  1.1  jmcneill 				regulator-name = "vcc_ddr";
    431  1.1  jmcneill 				regulator-always-on;
    432  1.1  jmcneill 				regulator-boot-on;
    433  1.1  jmcneill 				regulator-state-mem {
    434  1.1  jmcneill 					regulator-on-in-suspend;
    435  1.1  jmcneill 				};
    436  1.1  jmcneill 			};
    437  1.1  jmcneill 
    438  1.1  jmcneill 			vcc_1v8: DCDC_REG4 {
    439  1.1  jmcneill 				regulator-name = "vcc_1v8";
    440  1.1  jmcneill 				regulator-min-microvolt = <1800000>;
    441  1.1  jmcneill 				regulator-max-microvolt = <1800000>;
    442  1.1  jmcneill 				regulator-always-on;
    443  1.1  jmcneill 				regulator-boot-on;
    444  1.1  jmcneill 				regulator-state-mem {
    445  1.1  jmcneill 					regulator-on-in-suspend;
    446  1.1  jmcneill 					regulator-suspend-microvolt = <1800000>;
    447  1.1  jmcneill 				};
    448  1.1  jmcneill 			};
    449  1.1  jmcneill 
    450  1.1  jmcneill 			vcc1v8_dvp: LDO_REG1 {
    451  1.1  jmcneill 				regulator-name = "vcc1v8_dvp";
    452  1.1  jmcneill 				regulator-min-microvolt = <1800000>;
    453  1.1  jmcneill 				regulator-max-microvolt = <1800000>;
    454  1.1  jmcneill 				regulator-always-on;
    455  1.1  jmcneill 				regulator-boot-on;
    456  1.1  jmcneill 				regulator-state-mem {
    457  1.1  jmcneill 					regulator-on-in-suspend;
    458  1.1  jmcneill 					regulator-suspend-microvolt = <1800000>;
    459  1.1  jmcneill 				};
    460  1.1  jmcneill 			};
    461  1.1  jmcneill 
    462  1.1  jmcneill 			vcc3v0_touch: LDO_REG2 {
    463  1.1  jmcneill 				regulator-name = "vcc3v0_touch";
    464  1.1  jmcneill 				regulator-min-microvolt = <3000000>;
    465  1.1  jmcneill 				regulator-max-microvolt = <3000000>;
    466  1.1  jmcneill 				regulator-always-on;
    467  1.1  jmcneill 				regulator-boot-on;
    468  1.1  jmcneill 				regulator-state-mem {
    469  1.1  jmcneill 					regulator-on-in-suspend;
    470  1.1  jmcneill 					regulator-suspend-microvolt = <3000000>;
    471  1.1  jmcneill 				};
    472  1.1  jmcneill 			};
    473  1.1  jmcneill 
    474  1.1  jmcneill 			vcc1v8_pmu: LDO_REG3 {
    475  1.1  jmcneill 				regulator-name = "vcc1v8_pmu";
    476  1.1  jmcneill 				regulator-min-microvolt = <1800000>;
    477  1.1  jmcneill 				regulator-max-microvolt = <1800000>;
    478  1.1  jmcneill 				regulator-always-on;
    479  1.1  jmcneill 				regulator-boot-on;
    480  1.1  jmcneill 				regulator-state-mem {
    481  1.1  jmcneill 					regulator-on-in-suspend;
    482  1.1  jmcneill 					regulator-suspend-microvolt = <1800000>;
    483  1.1  jmcneill 				};
    484  1.1  jmcneill 			};
    485  1.1  jmcneill 
    486  1.1  jmcneill 			vcc_sd: LDO_REG4 {
    487  1.1  jmcneill 				regulator-name = "vcc_sd";
    488  1.1  jmcneill 				regulator-min-microvolt = <1800000>;
    489  1.1  jmcneill 				regulator-max-microvolt = <3300000>;
    490  1.1  jmcneill 				regulator-always-on;
    491  1.1  jmcneill 				regulator-boot-on;
    492  1.1  jmcneill 				regulator-state-mem {
    493  1.1  jmcneill 					regulator-on-in-suspend;
    494  1.1  jmcneill 					regulator-suspend-microvolt = <3300000>;
    495  1.1  jmcneill 				};
    496  1.1  jmcneill 			};
    497  1.1  jmcneill 
    498  1.1  jmcneill 			vcca3v0_codec: LDO_REG5 {
    499  1.1  jmcneill 				regulator-name = "vcca3v0_codec";
    500  1.1  jmcneill 				regulator-min-microvolt = <3000000>;
    501  1.1  jmcneill 				regulator-max-microvolt = <3000000>;
    502  1.1  jmcneill 				regulator-always-on;
    503  1.1  jmcneill 				regulator-boot-on;
    504  1.1  jmcneill 				regulator-state-mem {
    505  1.1  jmcneill 					regulator-on-in-suspend;
    506  1.1  jmcneill 					regulator-suspend-microvolt = <3000000>;
    507  1.1  jmcneill 				};
    508  1.1  jmcneill 			};
    509  1.1  jmcneill 
    510  1.1  jmcneill 			vcc_1v5: LDO_REG6 {
    511  1.1  jmcneill 				regulator-name = "vcc_1v5";
    512  1.1  jmcneill 				regulator-min-microvolt = <1500000>;
    513  1.1  jmcneill 				regulator-max-microvolt = <1500000>;
    514  1.1  jmcneill 				regulator-always-on;
    515  1.1  jmcneill 				regulator-boot-on;
    516  1.1  jmcneill 				regulator-state-mem {
    517  1.1  jmcneill 					regulator-on-in-suspend;
    518  1.1  jmcneill 					regulator-suspend-microvolt = <1500000>;
    519  1.1  jmcneill 				};
    520  1.1  jmcneill 			};
    521  1.1  jmcneill 
    522  1.1  jmcneill 			vcca1v8_codec: LDO_REG7 {
    523  1.1  jmcneill 				regulator-name = "vcca1v8_codec";
    524  1.1  jmcneill 				regulator-min-microvolt = <1800000>;
    525  1.1  jmcneill 				regulator-max-microvolt = <1800000>;
    526  1.1  jmcneill 				regulator-always-on;
    527  1.1  jmcneill 				regulator-boot-on;
    528  1.1  jmcneill 				regulator-state-mem {
    529  1.1  jmcneill 					regulator-on-in-suspend;
    530  1.1  jmcneill 					regulator-suspend-microvolt = <1800000>;
    531  1.1  jmcneill 				};
    532  1.1  jmcneill 			};
    533  1.1  jmcneill 
    534  1.1  jmcneill 			vcc_3v0: LDO_REG8 {
    535  1.1  jmcneill 				regulator-name = "vcc_3v0";
    536  1.1  jmcneill 				regulator-min-microvolt = <3000000>;
    537  1.1  jmcneill 				regulator-max-microvolt = <3000000>;
    538  1.1  jmcneill 				regulator-always-on;
    539  1.1  jmcneill 				regulator-boot-on;
    540  1.1  jmcneill 				regulator-state-mem {
    541  1.1  jmcneill 					regulator-on-in-suspend;
    542  1.1  jmcneill 					regulator-suspend-microvolt = <3000000>;
    543  1.1  jmcneill 				};
    544  1.1  jmcneill 			};
    545  1.1  jmcneill 
    546  1.1  jmcneill 			vcc3v3_s3: SWITCH_REG1 {
    547  1.1  jmcneill 				regulator-name = "vcc3v3_s3";
    548  1.1  jmcneill 				regulator-always-on;
    549  1.1  jmcneill 				regulator-boot-on;
    550  1.1  jmcneill 				regulator-state-mem {
    551  1.1  jmcneill 					regulator-on-in-suspend;
    552  1.1  jmcneill 				};
    553  1.1  jmcneill 			};
    554  1.1  jmcneill 
    555  1.1  jmcneill 			vcc3v3_s0: SWITCH_REG2 {
    556  1.1  jmcneill 				regulator-name = "vcc3v3_s0";
    557  1.1  jmcneill 				regulator-always-on;
    558  1.1  jmcneill 				regulator-boot-on;
    559  1.1  jmcneill 				regulator-state-mem {
    560  1.1  jmcneill 					regulator-on-in-suspend;
    561  1.1  jmcneill 				};
    562  1.1  jmcneill 			};
    563  1.1  jmcneill 		};
    564  1.1  jmcneill 	};
    565  1.1  jmcneill };
    566  1.1  jmcneill 
    567  1.1  jmcneill &cpu_l0 {
    568  1.1  jmcneill 	cpu-supply = <&vdd_cpu_l>;
    569  1.1  jmcneill };
    570  1.1  jmcneill 
    571  1.1  jmcneill &cpu_l1 {
    572  1.1  jmcneill 	cpu-supply = <&vdd_cpu_l>;
    573  1.1  jmcneill };
    574  1.1  jmcneill 
    575  1.1  jmcneill &cpu_l2 {
    576  1.1  jmcneill 	cpu-supply = <&vdd_cpu_l>;
    577  1.1  jmcneill };
    578  1.1  jmcneill 
    579  1.1  jmcneill &cpu_l3 {
    580  1.1  jmcneill 	cpu-supply = <&vdd_cpu_l>;
    581  1.1  jmcneill };
    582  1.1  jmcneill 
    583  1.1  jmcneill &cpu_b0 {
    584  1.1  jmcneill 	cpu-supply = <&vdd_cpu_b>;
    585  1.1  jmcneill };
    586  1.1  jmcneill 
    587  1.1  jmcneill &cpu_b1 {
    588  1.1  jmcneill 	cpu-supply = <&vdd_cpu_b>;
    589  1.1  jmcneill };
    590  1.1  jmcneill 
    591  1.1  jmcneill &gpu {
    592  1.1  jmcneill 	status = "okay";
    593  1.1  jmcneill 	mali-supply = <&vdd_gpu>;
    594  1.1  jmcneill };
    595  1.1  jmcneill 
    596  1.1  jmcneill &tcphy1 {
    597  1.1  jmcneill 	status = "okay";
    598  1.1  jmcneill };
    599  1.1  jmcneill 
    600  1.1  jmcneill &tsadc {
    601  1.1  jmcneill 	/* tshut mode 0:CRU 1:GPIO */
    602  1.1  jmcneill 	rockchip,hw-tshut-mode = <1>;
    603  1.1  jmcneill 	/* tshut polarity 0:LOW 1:HIGH */
    604  1.1  jmcneill 	rockchip,hw-tshut-polarity = <1>;
    605  1.1  jmcneill 	rockchip,hw-tshut-temp = <110000>;
    606  1.1  jmcneill 	status = "okay";
    607  1.1  jmcneill };
    608  1.1  jmcneill 
    609  1.1  jmcneill &u2phy0 {
    610  1.1  jmcneill 	status = "okay";
    611  1.1  jmcneill 
    612  1.1  jmcneill 	u2phy0_otg: otg-port {
    613  1.1  jmcneill 		status = "okay";
    614  1.1  jmcneill 	};
    615  1.1  jmcneill 
    616  1.1  jmcneill 	u2phy0_host: host-port {
    617  1.1  jmcneill 		phy-supply = <&vcc5v0_host>;
    618  1.1  jmcneill 		status = "okay";
    619  1.1  jmcneill 	};
    620  1.1  jmcneill };
    621  1.1  jmcneill 
    622  1.1  jmcneill &u2phy1 {
    623  1.1  jmcneill 	status = "okay";
    624  1.1  jmcneill 
    625  1.1  jmcneill 	u2phy1_otg: otg-port {
    626  1.1  jmcneill 		status = "okay";
    627  1.1  jmcneill 	};
    628  1.1  jmcneill 
    629  1.1  jmcneill 	u2phy1_host: host-port {
    630  1.1  jmcneill 		phy-supply = <&vcc5v0_host>;
    631  1.1  jmcneill 		status = "okay";
    632  1.1  jmcneill 	};
    633  1.1  jmcneill };
    634  1.1  jmcneill 
    635  1.1  jmcneill &uart0 {
    636  1.1  jmcneill 	pinctrl-names = "default";
    637  1.1  jmcneill 	pinctrl-0 = <&uart0_xfer &uart0_cts>;
    638  1.1  jmcneill 	status = "disabled";
    639  1.1  jmcneill };
    640  1.1  jmcneill 
    641  1.1  jmcneill &uart2 {
    642  1.1  jmcneill 	status = "okay";
    643  1.1  jmcneill };
    644  1.1  jmcneill 
    645  1.1  jmcneill &usb_host0_ehci {
    646  1.1  jmcneill 	status = "okay";
    647  1.1  jmcneill };
    648  1.1  jmcneill 
    649  1.1  jmcneill &usb_host0_ohci {
    650  1.1  jmcneill 	status = "okay";
    651  1.1  jmcneill };
    652  1.1  jmcneill 
    653  1.1  jmcneill &usb_host1_ehci {
    654  1.1  jmcneill 	status = "okay";
    655  1.1  jmcneill };
    656  1.1  jmcneill 
    657  1.1  jmcneill &usb_host1_ohci {
    658  1.1  jmcneill 	status = "okay";
    659  1.1  jmcneill };
    660  1.1  jmcneill 
    661  1.1  jmcneill &usbdrd3_0 {
    662  1.1  jmcneill 	status = "okay";
    663  1.1  jmcneill };
    664  1.1  jmcneill 
    665  1.1  jmcneill &usbdrd_dwc3_0 {
    666  1.1  jmcneill 	dr_mode = "otg";
    667  1.1  jmcneill 	status = "okay";
    668  1.1  jmcneill };
    669  1.1  jmcneill 
    670  1.1  jmcneill &usbdrd3_1 {
    671  1.1  jmcneill 	status = "okay";
    672  1.1  jmcneill };
    673  1.1  jmcneill 
    674  1.1  jmcneill &usbdrd_dwc3_1 {
    675  1.1  jmcneill 	dr_mode = "host";
    676  1.1  jmcneill 	status = "okay";
    677  1.1  jmcneill };
    678  1.1  jmcneill 
    679  1.1  jmcneill &pwm1 {
    680  1.1  jmcneill 	status = "okay";
    681  1.1  jmcneill 	pinctrl-names = "active";
    682  1.1  jmcneill };
    683  1.1  jmcneill 
    684  1.1  jmcneill &pwm3 {
    685  1.1  jmcneill 	status = "okay";
    686  1.1  jmcneill 
    687  1.1  jmcneill 	interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH 0>;
    688  1.1  jmcneill 	compatible = "rockchip,remotectl-pwm";
    689  1.1  jmcneill 	remote_pwm_id = <3>;
    690  1.1  jmcneill 	handle_cpu_id = <1>;
    691  1.1  jmcneill 	remote_support_psci = <1>;
    692  1.1  jmcneill 
    693  1.1  jmcneill 	ir_key1 {
    694  1.1  jmcneill 		rockchip,usercode = <0x4040>;
    695  1.1  jmcneill 		rockchip,key_table =
    696  1.1  jmcneill 			<0xf2	KEY_REPLY>,
    697  1.1  jmcneill 			<0xba	KEY_BACK>,
    698  1.1  jmcneill 			<0xf4	KEY_UP>,
    699  1.1  jmcneill 			<0xf1	KEY_DOWN>,
    700  1.1  jmcneill 			<0xef	KEY_LEFT>,
    701  1.1  jmcneill 			<0xee	KEY_RIGHT>,
    702  1.1  jmcneill 			<0xbd	KEY_HOME>,
    703  1.1  jmcneill 			<0xea	KEY_VOLUMEUP>,
    704  1.1  jmcneill 			<0xe3	KEY_VOLUMEDOWN>,
    705  1.1  jmcneill 			<0xe2	KEY_SEARCH>,
    706  1.1  jmcneill 			<0xb2	KEY_POWER>,
    707  1.1  jmcneill 			<0xbc	KEY_MUTE>,
    708  1.1  jmcneill 			<0xec	KEY_MENU>,
    709  1.1  jmcneill 			<0xbf	0x190>,
    710  1.1  jmcneill 			<0xe0	0x191>,
    711  1.1  jmcneill 			<0xe1	0x192>,
    712  1.1  jmcneill 			<0xe9	183>,
    713  1.1  jmcneill 			<0xe6	248>,
    714  1.1  jmcneill 			<0xe8	185>,
    715  1.1  jmcneill 			<0xe7	186>,
    716  1.1  jmcneill 			<0xf0	388>,
    717  1.1  jmcneill 			<0xbe	0x175>;
    718  1.1  jmcneill 	};
    719  1.1  jmcneill 
    720  1.1  jmcneill 	ir_key2 {
    721  1.1  jmcneill 		rockchip,usercode = <0xff00>;
    722  1.1  jmcneill 		rockchip,key_table =
    723  1.1  jmcneill 			<0xf9	KEY_HOME>,
    724  1.1  jmcneill 			<0xbf	KEY_BACK>,
    725  1.1  jmcneill 			<0xfb	KEY_MENU>,
    726  1.1  jmcneill 			<0xaa	KEY_REPLY>,
    727  1.1  jmcneill 			<0xb9	KEY_UP>,
    728  1.1  jmcneill 			<0xe9	KEY_DOWN>,
    729  1.1  jmcneill 			<0xb8	KEY_LEFT>,
    730  1.1  jmcneill 			<0xea	KEY_RIGHT>,
    731  1.1  jmcneill 			<0xeb	KEY_VOLUMEDOWN>,
    732  1.1  jmcneill 			<0xef	KEY_VOLUMEUP>,
    733  1.1  jmcneill 			<0xf7	KEY_MUTE>,
    734  1.1  jmcneill 			<0xe7	KEY_POWER>,
    735  1.1  jmcneill 			<0xfc	KEY_POWER>,
    736  1.1  jmcneill 			<0xa9	KEY_VOLUMEDOWN>,
    737  1.1  jmcneill 			<0xa8	KEY_VOLUMEDOWN>,
    738  1.1  jmcneill 			<0xe0	KEY_VOLUMEDOWN>,
    739  1.1  jmcneill 			<0xa5	KEY_VOLUMEDOWN>,
    740  1.1  jmcneill 			<0xab	183>,
    741  1.1  jmcneill 			<0xb7	388>,
    742  1.1  jmcneill 			<0xe8	388>,
    743  1.1  jmcneill 			<0xf8	184>,
    744  1.1  jmcneill 			<0xaf	185>,
    745  1.1  jmcneill 			<0xed	KEY_VOLUMEDOWN>,
    746  1.1  jmcneill 			<0xee	186>,
    747  1.1  jmcneill 			<0xb3	KEY_VOLUMEDOWN>,
    748  1.1  jmcneill 			<0xf1	KEY_VOLUMEDOWN>,
    749  1.1  jmcneill 			<0xf2	KEY_VOLUMEDOWN>,
    750  1.1  jmcneill 			<0xf3	KEY_SEARCH>,
    751  1.1  jmcneill 			<0xb4	KEY_VOLUMEDOWN>,
    752  1.1  jmcneill 			<0xbe	KEY_SEARCH>;
    753  1.1  jmcneill 	};
    754  1.1  jmcneill 
    755  1.1  jmcneill 	ir_key3 {
    756  1.1  jmcneill 		rockchip,usercode = <0x1dcc>;
    757  1.1  jmcneill 		rockchip,key_table =
    758  1.1  jmcneill 			<0xee	KEY_REPLY>,
    759  1.1  jmcneill 			<0xf0	KEY_BACK>,
    760  1.1  jmcneill 			<0xf8	KEY_UP>,
    761  1.1  jmcneill 			<0xbb	KEY_DOWN>,
    762  1.1  jmcneill 			<0xef	KEY_LEFT>,
    763  1.1  jmcneill 			<0xed	KEY_RIGHT>,
    764  1.1  jmcneill 			<0xfc	KEY_HOME>,
    765  1.1  jmcneill 			<0xf1	KEY_VOLUMEUP>,
    766  1.1  jmcneill 			<0xfd	KEY_VOLUMEDOWN>,
    767  1.1  jmcneill 			<0xb7	KEY_SEARCH>,
    768  1.1  jmcneill 			<0xff	KEY_POWER>,
    769  1.1  jmcneill 			<0xf3	KEY_MUTE>,
    770  1.1  jmcneill 			<0xbf	KEY_MENU>,
    771  1.1  jmcneill 			<0xf9	0x191>,
    772  1.1  jmcneill 			<0xf5	0x192>,
    773  1.1  jmcneill 			<0xb3	388>,
    774  1.1  jmcneill 			<0xbe	KEY_1>,
    775  1.1  jmcneill 			<0xba	KEY_2>,
    776  1.1  jmcneill 			<0xb2	KEY_3>,
    777  1.1  jmcneill 			<0xbd	KEY_4>,
    778  1.1  jmcneill 			<0xf9	KEY_5>,
    779  1.1  jmcneill 			<0xb1	KEY_6>,
    780  1.1  jmcneill 			<0xfc	KEY_7>,
    781  1.1  jmcneill 			<0xf8	KEY_8>,
    782  1.1  jmcneill 			<0xb0	KEY_9>,
    783  1.1  jmcneill 			<0xb6	KEY_0>,
    784  1.1  jmcneill 			<0xb5	KEY_BACKSPACE>;
    785  1.1  jmcneill 	};
    786  1.1  jmcneill };
    787  1.1  jmcneill 
    788  1.1  jmcneill &gmac {
    789  1.1  jmcneill 	phy-supply = <&vcc_phy>;
    790  1.1  jmcneill 	phy-mode = "rgmii";
    791  1.1  jmcneill 	clock_in_out = "input";
    792  1.1  jmcneill 	snps,reset-gpio = <&gpio3 15 GPIO_ACTIVE_LOW>;
    793  1.1  jmcneill 	snps,reset-active-low;
    794  1.1  jmcneill 	snps,reset-delays-us = <0 10000 50000>;
    795  1.1  jmcneill 	assigned-clocks = <&cru SCLK_RMII_SRC>;
    796  1.1  jmcneill 	assigned-clock-parents = <&clkin_gmac>;
    797  1.1  jmcneill 	pinctrl-names = "default";
    798  1.1  jmcneill 	pinctrl-0 = <&rgmii_pins>;
    799  1.1  jmcneill 	tx_delay = <0x28>;
    800  1.1  jmcneill 	rx_delay = <0x20>;
    801  1.1  jmcneill 	status = "okay";
    802  1.1  jmcneill };
    803  1.1  jmcneill 
    804  1.1  jmcneill &saradc {
    805  1.1  jmcneill 	status = "okay";
    806  1.1  jmcneill };
    807  1.1  jmcneill 
    808  1.1  jmcneill &io_domains {
    809  1.1  jmcneill 	status = "okay";
    810  1.1  jmcneill 
    811  1.1  jmcneill 	bt656-supply = <&vcc1v8_s0>; /* bt656_gpio2ab_ms */
    812  1.1  jmcneill 	audio-supply = <&vcc1v8_s0>; /* audio_gpio3d4a_ms */
    813  1.1  jmcneill 	sdmmc-supply = <&vcc_sd>; /* sdmmc_gpio4b_ms */
    814  1.1  jmcneill 	gpio1830-supply = <&vcc_3v0>; /* gpio1833_gpio4cd_ms */
    815  1.1  jmcneill };
    816  1.1  jmcneill 
    817  1.1  jmcneill &pinctrl {
    818  1.1  jmcneill 	sdio-pwrseq {
    819  1.1  jmcneill 		wifi_enable_h: wifi-enable-h {
    820  1.1  jmcneill 			rockchip,pins =
    821  1.1  jmcneill 				<0 10 RK_FUNC_GPIO &pcfg_pull_none>;
    822  1.1  jmcneill 		};
    823  1.1  jmcneill 	};
    824  1.1  jmcneill 
    825  1.1  jmcneill 	wireless-bluetooth {
    826  1.1  jmcneill 		uart0_gpios: uart0-gpios {
    827  1.1  jmcneill 			rockchip,pins =
    828  1.1  jmcneill 				<2 19 RK_FUNC_GPIO &pcfg_pull_none>;
    829  1.1  jmcneill 		};
    830  1.1  jmcneill 	};
    831  1.1  jmcneill 
    832  1.1  jmcneill 	usb2 {
    833  1.1  jmcneill 		host_vbus_drv: host-vbus-drv {
    834  1.1  jmcneill 			rockchip,pins =
    835  1.1  jmcneill 				<4 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
    836  1.1  jmcneill 		};
    837  1.1  jmcneill 	};
    838  1.1  jmcneill 
    839  1.1  jmcneill 	pmic {
    840  1.1  jmcneill 		pmic_int_l: pmic-int-l {
    841  1.1  jmcneill 			rockchip,pins =
    842  1.1  jmcneill 				<1 21 RK_FUNC_GPIO &pcfg_pull_up>;
    843  1.1  jmcneill 		};
    844  1.1  jmcneill 
    845  1.1  jmcneill 		vsel1_gpio: vsel1-gpio {
    846  1.1  jmcneill 			rockchip,pins =
    847  1.1  jmcneill 				<1 17 RK_FUNC_GPIO &pcfg_pull_down>;
    848  1.1  jmcneill 		};
    849  1.1  jmcneill 
    850  1.1  jmcneill 		vsel2_gpio: vsel2-gpio {
    851  1.1  jmcneill 			rockchip,pins =
    852  1.1  jmcneill 				<1 14 RK_FUNC_GPIO &pcfg_pull_down>;
    853  1.1  jmcneill 		};
    854  1.1  jmcneill 	};
    855  1.1  jmcneill };
    856  1.1  jmcneill 
    857  1.1  jmcneill &cluster0_opp {
    858  1.1  jmcneill 	opp-1512000000 {
    859  1.1  jmcneill 		opp-hz = /bits/ 64 <1512000000>;
    860  1.1  jmcneill 		opp-microvolt = <1200000>;
    861  1.1  jmcneill 		clock-latency-ns = <40000>;
    862  1.1  jmcneill 		status = "disabled";
    863  1.1  jmcneill 	};
    864  1.1  jmcneill };
    865  1.1  jmcneill 
    866  1.1  jmcneill &cluster1_opp {
    867  1.1  jmcneill 	opp-1992000000 {
    868  1.1  jmcneill 		opp-hz = /bits/ 64 <1992000000>;
    869  1.1  jmcneill 		opp-microvolt = <1300000>;
    870  1.1  jmcneill 		clock-latency-ns = <40000>;
    871  1.1  jmcneill 		status = "disabled";
    872  1.1  jmcneill 	};
    873  1.1  jmcneill };
    874  1.1  jmcneill 
    875  1.1  jmcneill &spi1 {
    876  1.1  jmcneill 	status = "okay";
    877  1.1  jmcneill 
    878  1.1  jmcneill 	spiflash: spi-flash@0 {
    879  1.1  jmcneill 		#address-cells = <0x1>;
    880  1.1  jmcneill 		#size-cells = <1>;
    881  1.1  jmcneill 		compatible = "jedec,spi-nor";
    882  1.1  jmcneill 		reg = <0x0>;
    883  1.1  jmcneill 		spi-max-frequency = <25000000>;
    884  1.1  jmcneill 		status = "okay";
    885  1.1  jmcneill 
    886  1.1  jmcneill 		partitions {
    887  1.1  jmcneill 			compatible = "fixed-partitions";
    888  1.1  jmcneill 			#address-cells = <1>;
    889  1.1  jmcneill 			#size-cells = <1>;
    890  1.1  jmcneill 
    891  1.1  jmcneill 			loader@8000 {
    892  1.1  jmcneill 				label = "loader";
    893  1.1  jmcneill 				reg = <0x0 0x3F8000>;
    894  1.1  jmcneill 			};
    895  1.1  jmcneill 
    896  1.1  jmcneill 			env@3f8000 {
    897  1.1  jmcneill 				label = "env";
    898  1.1  jmcneill 				reg = <0x3F8000 0x8000>;
    899  1.1  jmcneill 			};
    900  1.1  jmcneill 
    901  1.1  jmcneill 			vendor@7c0000 {
    902  1.1  jmcneill 				label = "vendor";
    903  1.1  jmcneill 				reg = <0x7C0000 0x40000>;
    904  1.1  jmcneill 			};
    905  1.1  jmcneill 		};
    906  1.1  jmcneill 	};
    907  1.1  jmcneill };
    908