rk3399-rockpro64.dts revision 1.2 1 1.1 jmcneill /*
2 1.1 jmcneill * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd
3 1.1 jmcneill *
4 1.1 jmcneill * This file is dual-licensed: you can use it either under the terms
5 1.1 jmcneill * of the GPL or the X11 license, at your option. Note that this dual
6 1.1 jmcneill * licensing only applies to this file, and not this project as a
7 1.1 jmcneill * whole.
8 1.1 jmcneill *
9 1.1 jmcneill * a) This file is free software; you can redistribute it and/or
10 1.1 jmcneill * modify it under the terms of the GNU General Public License as
11 1.1 jmcneill * published by the Free Software Foundation; either version 2 of the
12 1.1 jmcneill * License, or (at your option) any later version.
13 1.1 jmcneill *
14 1.1 jmcneill * This file is distributed in the hope that it will be useful,
15 1.1 jmcneill * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 1.1 jmcneill * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 1.1 jmcneill * GNU General Public License for more details.
18 1.1 jmcneill *
19 1.1 jmcneill * Or, alternatively,
20 1.1 jmcneill *
21 1.1 jmcneill * b) Permission is hereby granted, free of charge, to any person
22 1.1 jmcneill * obtaining a copy of this software and associated documentation
23 1.1 jmcneill * files (the "Software"), to deal in the Software without
24 1.1 jmcneill * restriction, including without limitation the rights to use,
25 1.1 jmcneill * copy, modify, merge, publish, distribute, sublicense, and/or
26 1.1 jmcneill * sell copies of the Software, and to permit persons to whom the
27 1.1 jmcneill * Software is furnished to do so, subject to the following
28 1.1 jmcneill * conditions:
29 1.1 jmcneill *
30 1.1 jmcneill * The above copyright notice and this permission notice shall be
31 1.1 jmcneill * included in all copies or substantial portions of the Software.
32 1.1 jmcneill *
33 1.1 jmcneill * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34 1.1 jmcneill * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35 1.1 jmcneill * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36 1.1 jmcneill * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37 1.1 jmcneill * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38 1.1 jmcneill * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39 1.1 jmcneill * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40 1.1 jmcneill * OTHER DEALINGS IN THE SOFTWARE.
41 1.1 jmcneill */
42 1.1 jmcneill
43 1.1 jmcneill /dts-v1/;
44 1.1 jmcneill #include <dt-bindings/pwm/pwm.h>
45 1.1 jmcneill #include <dt-bindings/input/input.h>
46 1.1 jmcneill #include "rk3399.dtsi"
47 1.1 jmcneill #include "rk3399-opp.dtsi"
48 1.1 jmcneill
49 1.1 jmcneill / {
50 1.1 jmcneill model = "Pine64 RockPro64";
51 1.1 jmcneill compatible = "pine64,rockpro64", "rockchip,rk3399";
52 1.1 jmcneill
53 1.1 jmcneill chosen {
54 1.1 jmcneill bootargs = "earlycon=uart8250,mmio32,0xff1a0000 swiotlb=1";
55 1.1 jmcneill stdout-path = "serial2:1500000n8";
56 1.1 jmcneill };
57 1.1 jmcneill
58 1.1 jmcneill reserved-memory {
59 1.1 jmcneill #address-cells = <2>;
60 1.1 jmcneill #size-cells = <2>;
61 1.1 jmcneill ranges;
62 1.1 jmcneill
63 1.1 jmcneill drm_logo: drm-logo@00000000 {
64 1.1 jmcneill compatible = "rockchip,drm-logo";
65 1.1 jmcneill reg = <0x0 0x0 0x0 0x0>;
66 1.1 jmcneill };
67 1.1 jmcneill };
68 1.1 jmcneill
69 1.1 jmcneill /* first 64k(0xff8c0000~0xff8d0000) for ddr and suspend */
70 1.1 jmcneill iram: sram@ff8d0000 {
71 1.1 jmcneill compatible = "mmio-sram";
72 1.1 jmcneill reg = <0x0 0xff8d0000 0x0 0x20000>; /* 128k */
73 1.1 jmcneill };
74 1.1 jmcneill
75 1.1 jmcneill aliases {
76 1.1 jmcneill ethernet0 = &gmac;
77 1.1 jmcneill };
78 1.1 jmcneill
79 1.1 jmcneill dc_12v: dc-12v {
80 1.1 jmcneill compatible = "regulator-fixed";
81 1.1 jmcneill regulator-name = "dc_12v";
82 1.1 jmcneill regulator-always-on;
83 1.1 jmcneill regulator-boot-on;
84 1.1 jmcneill regulator-min-microvolt = <12000000>;
85 1.1 jmcneill regulator-max-microvolt = <12000000>;
86 1.1 jmcneill };
87 1.1 jmcneill
88 1.2 jakllsch vcc3v3_pcie: vcc3v3-pcie-regulator {
89 1.2 jakllsch compatible = "regulator-fixed";
90 1.2 jakllsch regulator-min-microvolt = <3300000>;
91 1.2 jakllsch regulator-max-microvolt = <3300000>;
92 1.2 jakllsch enable-active-high;
93 1.2 jakllsch gpio = <&gpio1 RK_PD0 GPIO_ACTIVE_HIGH>;
94 1.2 jakllsch pinctrl-names = "default";
95 1.2 jakllsch pinctrl-0 = <&pcie_pwr_en>;
96 1.2 jakllsch regulator-name = "vcc3v3_pcie";
97 1.2 jakllsch vin-supply = <&dc_12v>;
98 1.2 jakllsch };
99 1.2 jakllsch
100 1.1 jmcneill vcc1v8_s0: vcc1v8-s0 {
101 1.1 jmcneill compatible = "regulator-fixed";
102 1.1 jmcneill regulator-name = "vcc1v8_s0";
103 1.1 jmcneill regulator-min-microvolt = <1800000>;
104 1.1 jmcneill regulator-max-microvolt = <1800000>;
105 1.1 jmcneill regulator-always-on;
106 1.1 jmcneill };
107 1.1 jmcneill
108 1.1 jmcneill vcc_sys: vcc-sys {
109 1.1 jmcneill compatible = "regulator-fixed";
110 1.1 jmcneill regulator-name = "vcc_sys";
111 1.1 jmcneill regulator-min-microvolt = <5000000>;
112 1.1 jmcneill regulator-max-microvolt = <5000000>;
113 1.1 jmcneill regulator-always-on;
114 1.1 jmcneill vin-supply = <&dc_12v>;
115 1.1 jmcneill };
116 1.1 jmcneill
117 1.1 jmcneill vcc_phy: vcc-phy-regulator {
118 1.1 jmcneill compatible = "regulator-fixed";
119 1.1 jmcneill regulator-name = "vcc_phy";
120 1.1 jmcneill regulator-always-on;
121 1.1 jmcneill regulator-boot-on;
122 1.1 jmcneill };
123 1.1 jmcneill
124 1.1 jmcneill vcc3v3_sys: vcc3v3-sys {
125 1.1 jmcneill compatible = "regulator-fixed";
126 1.1 jmcneill regulator-name = "vcc3v3_sys";
127 1.1 jmcneill regulator-min-microvolt = <3300000>;
128 1.1 jmcneill regulator-max-microvolt = <3300000>;
129 1.1 jmcneill regulator-always-on;
130 1.1 jmcneill vin-supply = <&vcc_sys>;
131 1.1 jmcneill };
132 1.1 jmcneill
133 1.1 jmcneill vcc5v0_host: vcc5v0-host-regulator {
134 1.1 jmcneill compatible = "regulator-fixed";
135 1.1 jmcneill enable-active-high;
136 1.1 jmcneill gpio = <&gpio4 RK_PD2 GPIO_ACTIVE_HIGH>;
137 1.1 jmcneill pinctrl-names = "default";
138 1.1 jmcneill pinctrl-0 = <&host_vbus_drv>;
139 1.1 jmcneill regulator-name = "vcc5v0_host";
140 1.1 jmcneill regulator-always-on;
141 1.1 jmcneill };
142 1.1 jmcneill
143 1.1 jmcneill vdd_log: vdd-log {
144 1.1 jmcneill compatible = "pwm-regulator";
145 1.1 jmcneill pwms = <&pwm2 0 25000 1>;
146 1.1 jmcneill pwm-supply = <&vcc_sys>;
147 1.1 jmcneill regulator-name = "vdd_log";
148 1.1 jmcneill regulator-min-microvolt = <800000>;
149 1.1 jmcneill regulator-max-microvolt = <1400000>;
150 1.1 jmcneill regulator-always-on;
151 1.1 jmcneill regulator-boot-on;
152 1.1 jmcneill
153 1.1 jmcneill /* for rockchip boot on */
154 1.1 jmcneill rockchip,pwm_id= <2>;
155 1.1 jmcneill rockchip,pwm_voltage = <900000>;
156 1.1 jmcneill };
157 1.1 jmcneill
158 1.1 jmcneill clkin_gmac: external-gmac-clock {
159 1.1 jmcneill compatible = "fixed-clock";
160 1.1 jmcneill clock-frequency = <125000000>;
161 1.1 jmcneill clock-output-names = "clkin_gmac";
162 1.1 jmcneill #clock-cells = <0>;
163 1.1 jmcneill };
164 1.1 jmcneill
165 1.1 jmcneill spdif_out: spdif-out {
166 1.1 jmcneill status = "okay";
167 1.1 jmcneill compatible = "linux,spdif-dit";
168 1.1 jmcneill #sound-dai-cells = <0>;
169 1.1 jmcneill };
170 1.1 jmcneill
171 1.1 jmcneill sdio_pwrseq: sdio-pwrseq {
172 1.1 jmcneill compatible = "mmc-pwrseq-simple";
173 1.1 jmcneill clocks = <&rk808 1>;
174 1.1 jmcneill clock-names = "ext_clock";
175 1.1 jmcneill pinctrl-names = "default";
176 1.1 jmcneill pinctrl-0 = <&wifi_enable_h>;
177 1.1 jmcneill
178 1.1 jmcneill /*
179 1.1 jmcneill * On the module itself this is one of these (depending
180 1.1 jmcneill * on the actual card populated):
181 1.1 jmcneill * - SDIO_RESET_L_WL_REG_ON
182 1.1 jmcneill * - PDN (power down when low)
183 1.1 jmcneill */
184 1.1 jmcneill reset-gpios = <&gpio0 10 GPIO_ACTIVE_LOW>;
185 1.1 jmcneill };
186 1.1 jmcneill
187 1.1 jmcneill xin32k: xin32k {
188 1.1 jmcneill compatible = "fixed-clock";
189 1.1 jmcneill clock-frequency = <32768>;
190 1.1 jmcneill clock-output-names = "xin32k";
191 1.1 jmcneill #clock-cells = <0>;
192 1.1 jmcneill };
193 1.1 jmcneill
194 1.1 jmcneill wireless-wlan {
195 1.1 jmcneill compatible = "wlan-platdata";
196 1.1 jmcneill rockchip,grf = <&grf>;
197 1.1 jmcneill wifi_chip_type = "ap6354";
198 1.1 jmcneill sdio_vref = <1800>;
199 1.1 jmcneill WIFI,host_wake_irq = <&gpio0 3 GPIO_ACTIVE_HIGH>;
200 1.1 jmcneill status = "okay";
201 1.1 jmcneill };
202 1.1 jmcneill
203 1.1 jmcneill wireless-bluetooth {
204 1.1 jmcneill compatible = "bluetooth-platdata";
205 1.1 jmcneill clocks = <&rk808 1>;
206 1.1 jmcneill clock-names = "ext_clock";
207 1.1 jmcneill uart_rts_gpios = <&gpio2 19 GPIO_ACTIVE_LOW>;
208 1.1 jmcneill pinctrl-names = "default", "rts_gpio";
209 1.1 jmcneill pinctrl-0 = <&uart0_rts>;
210 1.1 jmcneill pinctrl-1 = <&uart0_gpios>;
211 1.1 jmcneill BT,reset_gpio = <&gpio0 9 GPIO_ACTIVE_HIGH>;
212 1.1 jmcneill BT,wake_gpio = <&gpio2 27 GPIO_ACTIVE_HIGH>;
213 1.1 jmcneill BT,wake_host_irq = <&gpio0 4 GPIO_ACTIVE_HIGH>;
214 1.1 jmcneill status = "okay";
215 1.1 jmcneill };
216 1.1 jmcneill
217 1.1 jmcneill hdmi_dp_sound: hdmi-dp-sound {
218 1.1 jmcneill status = "okay";
219 1.1 jmcneill compatible = "rockchip,rk3399-hdmi-dp";
220 1.1 jmcneill rockchip,cpu = <&i2s2>;
221 1.1 jmcneill rockchip,codec = <&hdmi>, <&cdn_dp>;
222 1.1 jmcneill };
223 1.1 jmcneill
224 1.1 jmcneill test-power {
225 1.1 jmcneill status = "okay";
226 1.1 jmcneill };
227 1.1 jmcneill
228 1.1 jmcneill leds {
229 1.1 jmcneill status = "okay";
230 1.1 jmcneill compatible = "gpio-leds";
231 1.1 jmcneill work-led {
232 1.1 jmcneill gpios = <&gpio0 11 GPIO_ACTIVE_HIGH>;
233 1.1 jmcneill linux,default-trigger = "none";
234 1.1 jmcneill default-state = "on";
235 1.1 jmcneill mode = <0x23>;
236 1.1 jmcneill };
237 1.1 jmcneill diy-led {
238 1.1 jmcneill gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
239 1.1 jmcneill linux,default-trigger = "none";
240 1.1 jmcneill default-state = "on";
241 1.1 jmcneill mode = <0x23>;
242 1.1 jmcneill };
243 1.1 jmcneill };
244 1.1 jmcneill
245 1.1 jmcneill fan0: pwm-fan {
246 1.1 jmcneill compatible = "pwm-fan";
247 1.1 jmcneill pwms = <&pwm1 0 20000000 0>;
248 1.1 jmcneill cooling-min-state = <0>;
249 1.1 jmcneill cooling-max-state = <3>;
250 1.1 jmcneill #cooling-cells = <2>;
251 1.1 jmcneill cooling-levels = <0 102 170 230>;
252 1.1 jmcneill };
253 1.1 jmcneill
254 1.1 jmcneill rk_key: rockchip-key {
255 1.1 jmcneill compatible = "rockchip,key";
256 1.1 jmcneill status = "okay";
257 1.1 jmcneill
258 1.1 jmcneill io-channels = <&saradc 1>;
259 1.1 jmcneill
260 1.1 jmcneill power-key {
261 1.1 jmcneill gpios = <&gpio0 5 GPIO_ACTIVE_LOW>;
262 1.1 jmcneill linux,code = <116>;
263 1.1 jmcneill label = "power";
264 1.1 jmcneill gpio-key,wakeup;
265 1.1 jmcneill };
266 1.1 jmcneill };
267 1.1 jmcneill };
268 1.1 jmcneill
269 1.1 jmcneill &sdmmc {
270 1.1 jmcneill clock-frequency = <50000000>;
271 1.1 jmcneill clock-freq-min-max = <400000 150000000>;
272 1.1 jmcneill supports-sd;
273 1.1 jmcneill bus-width = <4>;
274 1.1 jmcneill cap-mmc-highspeed;
275 1.1 jmcneill cap-sd-highspeed;
276 1.1 jmcneill disable-wp;
277 1.1 jmcneill num-slots = <1>;
278 1.1 jmcneill sd-uhs-sdr104;
279 1.1 jmcneill vqmmc-supply = <&vcc_sd>;
280 1.1 jmcneill pinctrl-names = "default";
281 1.1 jmcneill pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
282 1.1 jmcneill card-detect-delay = <800>;
283 1.1 jmcneill status = "okay";
284 1.1 jmcneill };
285 1.1 jmcneill
286 1.1 jmcneill &sdio0 {
287 1.1 jmcneill clock-frequency = <50000000>;
288 1.1 jmcneill clock-freq-min-max = <200000 50000000>;
289 1.1 jmcneill supports-sdio;
290 1.1 jmcneill bus-width = <4>;
291 1.1 jmcneill disable-wp;
292 1.1 jmcneill cap-sd-highspeed;
293 1.1 jmcneill cap-sdio-irq;
294 1.1 jmcneill keep-power-in-suspend;
295 1.1 jmcneill mmc-pwrseq = <&sdio_pwrseq>;
296 1.1 jmcneill non-removable;
297 1.1 jmcneill num-slots = <1>;
298 1.1 jmcneill pinctrl-names = "default";
299 1.1 jmcneill pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
300 1.1 jmcneill sd-uhs-sdr104;
301 1.1 jmcneill status = "disabled";
302 1.1 jmcneill };
303 1.1 jmcneill
304 1.1 jmcneill &emmc_phy {
305 1.1 jmcneill status = "okay";
306 1.1 jmcneill };
307 1.1 jmcneill
308 1.1 jmcneill &sdhci {
309 1.1 jmcneill bus-width = <8>;
310 1.1 jmcneill //mmc-hs400-1_8v;
311 1.1 jmcneill mmc-hs200-1_8v;
312 1.1 jmcneill supports-emmc;
313 1.1 jmcneill non-removable;
314 1.1 jmcneill keep-power-in-suspend;
315 1.1 jmcneill //mmc-hs400-enhanced-strobe;
316 1.1 jmcneill status = "okay";
317 1.1 jmcneill };
318 1.1 jmcneill
319 1.1 jmcneill &i2s0 {
320 1.1 jmcneill status = "okay";
321 1.1 jmcneill rockchip,i2s-broken-burst-len;
322 1.1 jmcneill rockchip,playback-channels = <8>;
323 1.1 jmcneill rockchip,capture-channels = <8>;
324 1.1 jmcneill #sound-dai-cells = <0>;
325 1.1 jmcneill };
326 1.1 jmcneill
327 1.1 jmcneill &i2s1 {
328 1.1 jmcneill status = "okay";
329 1.1 jmcneill rockchip,i2s-broken-burst-len;
330 1.1 jmcneill rockchip,playback-channels = <8>;
331 1.1 jmcneill rockchip,capture-channels = <8>;
332 1.1 jmcneill #sound-dai-cells = <0>;
333 1.1 jmcneill };
334 1.1 jmcneill
335 1.1 jmcneill &i2s2 {
336 1.1 jmcneill status = "okay";
337 1.1 jmcneill #sound-dai-cells = <0>;
338 1.1 jmcneill };
339 1.1 jmcneill
340 1.1 jmcneill &spdif {
341 1.1 jmcneill pinctrl-0 = <&spdif_bus_1>;
342 1.1 jmcneill status = "okay";
343 1.1 jmcneill #sound-dai-cells = <0>;
344 1.1 jmcneill };
345 1.1 jmcneill
346 1.1 jmcneill &i2c0 {
347 1.1 jmcneill status = "okay";
348 1.1 jmcneill i2c-scl-rising-time-ns = <180>;
349 1.1 jmcneill i2c-scl-falling-time-ns = <30>;
350 1.1 jmcneill clock-frequency = <400000>;
351 1.1 jmcneill
352 1.1 jmcneill vdd_cpu_b: syr827@40 {
353 1.1 jmcneill compatible = "silergy,syr827";
354 1.1 jmcneill reg = <0x40>;
355 1.1 jmcneill regulator-compatible = "fan53555-reg";
356 1.1 jmcneill pinctrl-0 = <&vsel1_gpio>;
357 1.1 jmcneill vsel-gpios = <&gpio1 17 GPIO_ACTIVE_HIGH>;
358 1.1 jmcneill regulator-name = "vdd_cpu_b";
359 1.1 jmcneill regulator-min-microvolt = <712500>;
360 1.1 jmcneill regulator-max-microvolt = <1500000>;
361 1.1 jmcneill regulator-ramp-delay = <1000>;
362 1.1 jmcneill fcs,suspend-voltage-selector = <1>;
363 1.1 jmcneill regulator-always-on;
364 1.1 jmcneill regulator-boot-on;
365 1.1 jmcneill vin-supply = <&vcc_sys>;
366 1.1 jmcneill regulator-state-mem {
367 1.1 jmcneill regulator-off-in-suspend;
368 1.1 jmcneill };
369 1.1 jmcneill };
370 1.1 jmcneill
371 1.1 jmcneill vdd_gpu: syr828@41 {
372 1.1 jmcneill compatible = "silergy,syr828";
373 1.1 jmcneill reg = <0x41>;
374 1.1 jmcneill regulator-compatible = "fan53555-reg";
375 1.1 jmcneill pinctrl-0 = <&vsel2_gpio>;
376 1.1 jmcneill vsel-gpios = <&gpio1 14 GPIO_ACTIVE_HIGH>;
377 1.1 jmcneill regulator-name = "vdd_gpu";
378 1.1 jmcneill regulator-min-microvolt = <712500>;
379 1.1 jmcneill regulator-max-microvolt = <1500000>;
380 1.1 jmcneill regulator-ramp-delay = <1000>;
381 1.1 jmcneill fcs,suspend-voltage-selector = <1>;
382 1.1 jmcneill regulator-always-on;
383 1.1 jmcneill regulator-boot-on;
384 1.1 jmcneill vin-supply = <&vcc_sys>;
385 1.1 jmcneill regulator-initial-mode = <1>; /* 1:force PWM 2:auto */
386 1.1 jmcneill regulator-state-mem {
387 1.1 jmcneill regulator-off-in-suspend;
388 1.1 jmcneill };
389 1.1 jmcneill };
390 1.1 jmcneill
391 1.1 jmcneill rk808: pmic@1b {
392 1.1 jmcneill compatible = "rockchip,rk808";
393 1.1 jmcneill reg = <0x1b>;
394 1.1 jmcneill interrupt-parent = <&gpio1>;
395 1.1 jmcneill interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
396 1.1 jmcneill pinctrl-names = "default";
397 1.1 jmcneill pinctrl-0 = <&pmic_int_l>;
398 1.1 jmcneill rockchip,system-power-controller;
399 1.1 jmcneill wakeup-source;
400 1.1 jmcneill #clock-cells = <1>;
401 1.1 jmcneill clock-output-names = "rk808-clkout1", "rk808-clkout2";
402 1.1 jmcneill
403 1.1 jmcneill vcc1-supply = <&vcc_sys>;
404 1.1 jmcneill vcc2-supply = <&vcc_sys>;
405 1.1 jmcneill vcc3-supply = <&vcc_sys>;
406 1.1 jmcneill vcc4-supply = <&vcc_sys>;
407 1.1 jmcneill vcc6-supply = <&vcc_sys>;
408 1.1 jmcneill vcc7-supply = <&vcc_sys>;
409 1.1 jmcneill vcc8-supply = <&vcc3v3_sys>;
410 1.1 jmcneill vcc9-supply = <&vcc_sys>;
411 1.1 jmcneill vcc10-supply = <&vcc_sys>;
412 1.1 jmcneill vcc11-supply = <&vcc_sys>;
413 1.1 jmcneill vcc12-supply = <&vcc3v3_sys>;
414 1.1 jmcneill vddio-supply = <&vcc_1v8>;
415 1.1 jmcneill
416 1.1 jmcneill regulators {
417 1.1 jmcneill vdd_center: DCDC_REG1 {
418 1.1 jmcneill regulator-name = "vdd_center";
419 1.1 jmcneill regulator-min-microvolt = <900000>;
420 1.1 jmcneill regulator-max-microvolt = <900000>;
421 1.1 jmcneill regulator-ramp-delay = <6001>;
422 1.1 jmcneill regulator-always-on;
423 1.1 jmcneill regulator-boot-on;
424 1.1 jmcneill regulator-state-mem {
425 1.1 jmcneill regulator-off-in-suspend;
426 1.1 jmcneill };
427 1.1 jmcneill };
428 1.1 jmcneill
429 1.1 jmcneill vdd_cpu_l: DCDC_REG2 {
430 1.1 jmcneill regulator-name = "vdd_cpu_l";
431 1.1 jmcneill regulator-min-microvolt = <750000>;
432 1.1 jmcneill regulator-max-microvolt = <1350000>;
433 1.1 jmcneill regulator-ramp-delay = <6001>;
434 1.1 jmcneill regulator-always-on;
435 1.1 jmcneill regulator-boot-on;
436 1.1 jmcneill regulator-state-mem {
437 1.1 jmcneill regulator-off-in-suspend;
438 1.1 jmcneill };
439 1.1 jmcneill };
440 1.1 jmcneill
441 1.1 jmcneill vcc_ddr: DCDC_REG3 {
442 1.1 jmcneill regulator-name = "vcc_ddr";
443 1.1 jmcneill regulator-always-on;
444 1.1 jmcneill regulator-boot-on;
445 1.1 jmcneill regulator-state-mem {
446 1.1 jmcneill regulator-on-in-suspend;
447 1.1 jmcneill };
448 1.1 jmcneill };
449 1.1 jmcneill
450 1.1 jmcneill vcc_1v8: DCDC_REG4 {
451 1.1 jmcneill regulator-name = "vcc_1v8";
452 1.1 jmcneill regulator-min-microvolt = <1800000>;
453 1.1 jmcneill regulator-max-microvolt = <1800000>;
454 1.1 jmcneill regulator-always-on;
455 1.1 jmcneill regulator-boot-on;
456 1.1 jmcneill regulator-state-mem {
457 1.1 jmcneill regulator-on-in-suspend;
458 1.1 jmcneill regulator-suspend-microvolt = <1800000>;
459 1.1 jmcneill };
460 1.1 jmcneill };
461 1.1 jmcneill
462 1.1 jmcneill vcc1v8_dvp: LDO_REG1 {
463 1.1 jmcneill regulator-name = "vcc1v8_dvp";
464 1.1 jmcneill regulator-min-microvolt = <1800000>;
465 1.1 jmcneill regulator-max-microvolt = <1800000>;
466 1.1 jmcneill regulator-always-on;
467 1.1 jmcneill regulator-boot-on;
468 1.1 jmcneill regulator-state-mem {
469 1.1 jmcneill regulator-on-in-suspend;
470 1.1 jmcneill regulator-suspend-microvolt = <1800000>;
471 1.1 jmcneill };
472 1.1 jmcneill };
473 1.1 jmcneill
474 1.1 jmcneill vcc3v0_touch: LDO_REG2 {
475 1.1 jmcneill regulator-name = "vcc3v0_touch";
476 1.1 jmcneill regulator-min-microvolt = <3000000>;
477 1.1 jmcneill regulator-max-microvolt = <3000000>;
478 1.1 jmcneill regulator-always-on;
479 1.1 jmcneill regulator-boot-on;
480 1.1 jmcneill regulator-state-mem {
481 1.1 jmcneill regulator-on-in-suspend;
482 1.1 jmcneill regulator-suspend-microvolt = <3000000>;
483 1.1 jmcneill };
484 1.1 jmcneill };
485 1.1 jmcneill
486 1.1 jmcneill vcc1v8_pmu: LDO_REG3 {
487 1.1 jmcneill regulator-name = "vcc1v8_pmu";
488 1.1 jmcneill regulator-min-microvolt = <1800000>;
489 1.1 jmcneill regulator-max-microvolt = <1800000>;
490 1.1 jmcneill regulator-always-on;
491 1.1 jmcneill regulator-boot-on;
492 1.1 jmcneill regulator-state-mem {
493 1.1 jmcneill regulator-on-in-suspend;
494 1.1 jmcneill regulator-suspend-microvolt = <1800000>;
495 1.1 jmcneill };
496 1.1 jmcneill };
497 1.1 jmcneill
498 1.1 jmcneill vcc_sd: LDO_REG4 {
499 1.1 jmcneill regulator-name = "vcc_sd";
500 1.1 jmcneill regulator-min-microvolt = <1800000>;
501 1.1 jmcneill regulator-max-microvolt = <3300000>;
502 1.1 jmcneill regulator-always-on;
503 1.1 jmcneill regulator-boot-on;
504 1.1 jmcneill regulator-state-mem {
505 1.1 jmcneill regulator-on-in-suspend;
506 1.1 jmcneill regulator-suspend-microvolt = <3300000>;
507 1.1 jmcneill };
508 1.1 jmcneill };
509 1.1 jmcneill
510 1.1 jmcneill vcca3v0_codec: LDO_REG5 {
511 1.1 jmcneill regulator-name = "vcca3v0_codec";
512 1.1 jmcneill regulator-min-microvolt = <3000000>;
513 1.1 jmcneill regulator-max-microvolt = <3000000>;
514 1.1 jmcneill regulator-always-on;
515 1.1 jmcneill regulator-boot-on;
516 1.1 jmcneill regulator-state-mem {
517 1.1 jmcneill regulator-on-in-suspend;
518 1.1 jmcneill regulator-suspend-microvolt = <3000000>;
519 1.1 jmcneill };
520 1.1 jmcneill };
521 1.1 jmcneill
522 1.1 jmcneill vcc_1v5: LDO_REG6 {
523 1.1 jmcneill regulator-name = "vcc_1v5";
524 1.1 jmcneill regulator-min-microvolt = <1500000>;
525 1.1 jmcneill regulator-max-microvolt = <1500000>;
526 1.1 jmcneill regulator-always-on;
527 1.1 jmcneill regulator-boot-on;
528 1.1 jmcneill regulator-state-mem {
529 1.1 jmcneill regulator-on-in-suspend;
530 1.1 jmcneill regulator-suspend-microvolt = <1500000>;
531 1.1 jmcneill };
532 1.1 jmcneill };
533 1.1 jmcneill
534 1.1 jmcneill vcca1v8_codec: LDO_REG7 {
535 1.1 jmcneill regulator-name = "vcca1v8_codec";
536 1.1 jmcneill regulator-min-microvolt = <1800000>;
537 1.1 jmcneill regulator-max-microvolt = <1800000>;
538 1.1 jmcneill regulator-always-on;
539 1.1 jmcneill regulator-boot-on;
540 1.1 jmcneill regulator-state-mem {
541 1.1 jmcneill regulator-on-in-suspend;
542 1.1 jmcneill regulator-suspend-microvolt = <1800000>;
543 1.1 jmcneill };
544 1.1 jmcneill };
545 1.1 jmcneill
546 1.1 jmcneill vcc_3v0: LDO_REG8 {
547 1.1 jmcneill regulator-name = "vcc_3v0";
548 1.1 jmcneill regulator-min-microvolt = <3000000>;
549 1.1 jmcneill regulator-max-microvolt = <3000000>;
550 1.1 jmcneill regulator-always-on;
551 1.1 jmcneill regulator-boot-on;
552 1.1 jmcneill regulator-state-mem {
553 1.1 jmcneill regulator-on-in-suspend;
554 1.1 jmcneill regulator-suspend-microvolt = <3000000>;
555 1.1 jmcneill };
556 1.1 jmcneill };
557 1.1 jmcneill
558 1.1 jmcneill vcc3v3_s3: SWITCH_REG1 {
559 1.1 jmcneill regulator-name = "vcc3v3_s3";
560 1.1 jmcneill regulator-always-on;
561 1.1 jmcneill regulator-boot-on;
562 1.1 jmcneill regulator-state-mem {
563 1.1 jmcneill regulator-on-in-suspend;
564 1.1 jmcneill };
565 1.1 jmcneill };
566 1.1 jmcneill
567 1.1 jmcneill vcc3v3_s0: SWITCH_REG2 {
568 1.1 jmcneill regulator-name = "vcc3v3_s0";
569 1.1 jmcneill regulator-always-on;
570 1.1 jmcneill regulator-boot-on;
571 1.1 jmcneill regulator-state-mem {
572 1.1 jmcneill regulator-on-in-suspend;
573 1.1 jmcneill };
574 1.1 jmcneill };
575 1.1 jmcneill };
576 1.1 jmcneill };
577 1.1 jmcneill };
578 1.1 jmcneill
579 1.1 jmcneill &cpu_l0 {
580 1.1 jmcneill cpu-supply = <&vdd_cpu_l>;
581 1.1 jmcneill };
582 1.1 jmcneill
583 1.1 jmcneill &cpu_l1 {
584 1.1 jmcneill cpu-supply = <&vdd_cpu_l>;
585 1.1 jmcneill };
586 1.1 jmcneill
587 1.1 jmcneill &cpu_l2 {
588 1.1 jmcneill cpu-supply = <&vdd_cpu_l>;
589 1.1 jmcneill };
590 1.1 jmcneill
591 1.1 jmcneill &cpu_l3 {
592 1.1 jmcneill cpu-supply = <&vdd_cpu_l>;
593 1.1 jmcneill };
594 1.1 jmcneill
595 1.1 jmcneill &cpu_b0 {
596 1.1 jmcneill cpu-supply = <&vdd_cpu_b>;
597 1.1 jmcneill };
598 1.1 jmcneill
599 1.1 jmcneill &cpu_b1 {
600 1.1 jmcneill cpu-supply = <&vdd_cpu_b>;
601 1.1 jmcneill };
602 1.1 jmcneill
603 1.1 jmcneill &gpu {
604 1.1 jmcneill status = "okay";
605 1.1 jmcneill mali-supply = <&vdd_gpu>;
606 1.1 jmcneill };
607 1.1 jmcneill
608 1.1 jmcneill &tcphy1 {
609 1.1 jmcneill status = "okay";
610 1.1 jmcneill };
611 1.1 jmcneill
612 1.1 jmcneill &tsadc {
613 1.1 jmcneill /* tshut mode 0:CRU 1:GPIO */
614 1.1 jmcneill rockchip,hw-tshut-mode = <1>;
615 1.1 jmcneill /* tshut polarity 0:LOW 1:HIGH */
616 1.1 jmcneill rockchip,hw-tshut-polarity = <1>;
617 1.1 jmcneill rockchip,hw-tshut-temp = <110000>;
618 1.1 jmcneill status = "okay";
619 1.1 jmcneill };
620 1.1 jmcneill
621 1.1 jmcneill &u2phy0 {
622 1.1 jmcneill status = "okay";
623 1.1 jmcneill
624 1.1 jmcneill u2phy0_otg: otg-port {
625 1.1 jmcneill status = "okay";
626 1.1 jmcneill };
627 1.1 jmcneill
628 1.1 jmcneill u2phy0_host: host-port {
629 1.1 jmcneill phy-supply = <&vcc5v0_host>;
630 1.1 jmcneill status = "okay";
631 1.1 jmcneill };
632 1.1 jmcneill };
633 1.1 jmcneill
634 1.1 jmcneill &u2phy1 {
635 1.1 jmcneill status = "okay";
636 1.1 jmcneill
637 1.1 jmcneill u2phy1_otg: otg-port {
638 1.1 jmcneill status = "okay";
639 1.1 jmcneill };
640 1.1 jmcneill
641 1.1 jmcneill u2phy1_host: host-port {
642 1.1 jmcneill phy-supply = <&vcc5v0_host>;
643 1.1 jmcneill status = "okay";
644 1.1 jmcneill };
645 1.1 jmcneill };
646 1.1 jmcneill
647 1.1 jmcneill &uart0 {
648 1.1 jmcneill pinctrl-names = "default";
649 1.1 jmcneill pinctrl-0 = <&uart0_xfer &uart0_cts>;
650 1.1 jmcneill status = "disabled";
651 1.1 jmcneill };
652 1.1 jmcneill
653 1.1 jmcneill &uart2 {
654 1.1 jmcneill status = "okay";
655 1.1 jmcneill };
656 1.1 jmcneill
657 1.1 jmcneill &usb_host0_ehci {
658 1.1 jmcneill status = "okay";
659 1.1 jmcneill };
660 1.1 jmcneill
661 1.1 jmcneill &usb_host0_ohci {
662 1.1 jmcneill status = "okay";
663 1.1 jmcneill };
664 1.1 jmcneill
665 1.1 jmcneill &usb_host1_ehci {
666 1.1 jmcneill status = "okay";
667 1.1 jmcneill };
668 1.1 jmcneill
669 1.1 jmcneill &usb_host1_ohci {
670 1.1 jmcneill status = "okay";
671 1.1 jmcneill };
672 1.1 jmcneill
673 1.1 jmcneill &usbdrd3_0 {
674 1.1 jmcneill status = "okay";
675 1.1 jmcneill };
676 1.1 jmcneill
677 1.1 jmcneill &usbdrd_dwc3_0 {
678 1.1 jmcneill dr_mode = "otg";
679 1.1 jmcneill status = "okay";
680 1.1 jmcneill };
681 1.1 jmcneill
682 1.1 jmcneill &usbdrd3_1 {
683 1.1 jmcneill status = "okay";
684 1.1 jmcneill };
685 1.1 jmcneill
686 1.1 jmcneill &usbdrd_dwc3_1 {
687 1.1 jmcneill dr_mode = "host";
688 1.1 jmcneill status = "okay";
689 1.1 jmcneill };
690 1.1 jmcneill
691 1.1 jmcneill &pwm1 {
692 1.1 jmcneill status = "okay";
693 1.1 jmcneill pinctrl-names = "active";
694 1.1 jmcneill };
695 1.1 jmcneill
696 1.1 jmcneill &pwm3 {
697 1.1 jmcneill status = "okay";
698 1.1 jmcneill
699 1.1 jmcneill interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH 0>;
700 1.1 jmcneill compatible = "rockchip,remotectl-pwm";
701 1.1 jmcneill remote_pwm_id = <3>;
702 1.1 jmcneill handle_cpu_id = <1>;
703 1.1 jmcneill remote_support_psci = <1>;
704 1.1 jmcneill
705 1.1 jmcneill ir_key1 {
706 1.1 jmcneill rockchip,usercode = <0x4040>;
707 1.1 jmcneill rockchip,key_table =
708 1.1 jmcneill <0xf2 KEY_REPLY>,
709 1.1 jmcneill <0xba KEY_BACK>,
710 1.1 jmcneill <0xf4 KEY_UP>,
711 1.1 jmcneill <0xf1 KEY_DOWN>,
712 1.1 jmcneill <0xef KEY_LEFT>,
713 1.1 jmcneill <0xee KEY_RIGHT>,
714 1.1 jmcneill <0xbd KEY_HOME>,
715 1.1 jmcneill <0xea KEY_VOLUMEUP>,
716 1.1 jmcneill <0xe3 KEY_VOLUMEDOWN>,
717 1.1 jmcneill <0xe2 KEY_SEARCH>,
718 1.1 jmcneill <0xb2 KEY_POWER>,
719 1.1 jmcneill <0xbc KEY_MUTE>,
720 1.1 jmcneill <0xec KEY_MENU>,
721 1.1 jmcneill <0xbf 0x190>,
722 1.1 jmcneill <0xe0 0x191>,
723 1.1 jmcneill <0xe1 0x192>,
724 1.1 jmcneill <0xe9 183>,
725 1.1 jmcneill <0xe6 248>,
726 1.1 jmcneill <0xe8 185>,
727 1.1 jmcneill <0xe7 186>,
728 1.1 jmcneill <0xf0 388>,
729 1.1 jmcneill <0xbe 0x175>;
730 1.1 jmcneill };
731 1.1 jmcneill
732 1.1 jmcneill ir_key2 {
733 1.1 jmcneill rockchip,usercode = <0xff00>;
734 1.1 jmcneill rockchip,key_table =
735 1.1 jmcneill <0xf9 KEY_HOME>,
736 1.1 jmcneill <0xbf KEY_BACK>,
737 1.1 jmcneill <0xfb KEY_MENU>,
738 1.1 jmcneill <0xaa KEY_REPLY>,
739 1.1 jmcneill <0xb9 KEY_UP>,
740 1.1 jmcneill <0xe9 KEY_DOWN>,
741 1.1 jmcneill <0xb8 KEY_LEFT>,
742 1.1 jmcneill <0xea KEY_RIGHT>,
743 1.1 jmcneill <0xeb KEY_VOLUMEDOWN>,
744 1.1 jmcneill <0xef KEY_VOLUMEUP>,
745 1.1 jmcneill <0xf7 KEY_MUTE>,
746 1.1 jmcneill <0xe7 KEY_POWER>,
747 1.1 jmcneill <0xfc KEY_POWER>,
748 1.1 jmcneill <0xa9 KEY_VOLUMEDOWN>,
749 1.1 jmcneill <0xa8 KEY_VOLUMEDOWN>,
750 1.1 jmcneill <0xe0 KEY_VOLUMEDOWN>,
751 1.1 jmcneill <0xa5 KEY_VOLUMEDOWN>,
752 1.1 jmcneill <0xab 183>,
753 1.1 jmcneill <0xb7 388>,
754 1.1 jmcneill <0xe8 388>,
755 1.1 jmcneill <0xf8 184>,
756 1.1 jmcneill <0xaf 185>,
757 1.1 jmcneill <0xed KEY_VOLUMEDOWN>,
758 1.1 jmcneill <0xee 186>,
759 1.1 jmcneill <0xb3 KEY_VOLUMEDOWN>,
760 1.1 jmcneill <0xf1 KEY_VOLUMEDOWN>,
761 1.1 jmcneill <0xf2 KEY_VOLUMEDOWN>,
762 1.1 jmcneill <0xf3 KEY_SEARCH>,
763 1.1 jmcneill <0xb4 KEY_VOLUMEDOWN>,
764 1.1 jmcneill <0xbe KEY_SEARCH>;
765 1.1 jmcneill };
766 1.1 jmcneill
767 1.1 jmcneill ir_key3 {
768 1.1 jmcneill rockchip,usercode = <0x1dcc>;
769 1.1 jmcneill rockchip,key_table =
770 1.1 jmcneill <0xee KEY_REPLY>,
771 1.1 jmcneill <0xf0 KEY_BACK>,
772 1.1 jmcneill <0xf8 KEY_UP>,
773 1.1 jmcneill <0xbb KEY_DOWN>,
774 1.1 jmcneill <0xef KEY_LEFT>,
775 1.1 jmcneill <0xed KEY_RIGHT>,
776 1.1 jmcneill <0xfc KEY_HOME>,
777 1.1 jmcneill <0xf1 KEY_VOLUMEUP>,
778 1.1 jmcneill <0xfd KEY_VOLUMEDOWN>,
779 1.1 jmcneill <0xb7 KEY_SEARCH>,
780 1.1 jmcneill <0xff KEY_POWER>,
781 1.1 jmcneill <0xf3 KEY_MUTE>,
782 1.1 jmcneill <0xbf KEY_MENU>,
783 1.1 jmcneill <0xf9 0x191>,
784 1.1 jmcneill <0xf5 0x192>,
785 1.1 jmcneill <0xb3 388>,
786 1.1 jmcneill <0xbe KEY_1>,
787 1.1 jmcneill <0xba KEY_2>,
788 1.1 jmcneill <0xb2 KEY_3>,
789 1.1 jmcneill <0xbd KEY_4>,
790 1.1 jmcneill <0xf9 KEY_5>,
791 1.1 jmcneill <0xb1 KEY_6>,
792 1.1 jmcneill <0xfc KEY_7>,
793 1.1 jmcneill <0xf8 KEY_8>,
794 1.1 jmcneill <0xb0 KEY_9>,
795 1.1 jmcneill <0xb6 KEY_0>,
796 1.1 jmcneill <0xb5 KEY_BACKSPACE>;
797 1.1 jmcneill };
798 1.1 jmcneill };
799 1.1 jmcneill
800 1.1 jmcneill &gmac {
801 1.1 jmcneill phy-supply = <&vcc_phy>;
802 1.1 jmcneill phy-mode = "rgmii";
803 1.1 jmcneill clock_in_out = "input";
804 1.1 jmcneill snps,reset-gpio = <&gpio3 15 GPIO_ACTIVE_LOW>;
805 1.1 jmcneill snps,reset-active-low;
806 1.1 jmcneill snps,reset-delays-us = <0 10000 50000>;
807 1.1 jmcneill assigned-clocks = <&cru SCLK_RMII_SRC>;
808 1.1 jmcneill assigned-clock-parents = <&clkin_gmac>;
809 1.1 jmcneill pinctrl-names = "default";
810 1.1 jmcneill pinctrl-0 = <&rgmii_pins>;
811 1.1 jmcneill tx_delay = <0x28>;
812 1.1 jmcneill rx_delay = <0x20>;
813 1.1 jmcneill status = "okay";
814 1.1 jmcneill };
815 1.1 jmcneill
816 1.1 jmcneill &saradc {
817 1.1 jmcneill status = "okay";
818 1.1 jmcneill };
819 1.1 jmcneill
820 1.1 jmcneill &io_domains {
821 1.1 jmcneill status = "okay";
822 1.1 jmcneill
823 1.1 jmcneill bt656-supply = <&vcc1v8_s0>; /* bt656_gpio2ab_ms */
824 1.1 jmcneill audio-supply = <&vcc1v8_s0>; /* audio_gpio3d4a_ms */
825 1.1 jmcneill sdmmc-supply = <&vcc_sd>; /* sdmmc_gpio4b_ms */
826 1.1 jmcneill gpio1830-supply = <&vcc_3v0>; /* gpio1833_gpio4cd_ms */
827 1.1 jmcneill };
828 1.1 jmcneill
829 1.1 jmcneill &pinctrl {
830 1.1 jmcneill sdio-pwrseq {
831 1.1 jmcneill wifi_enable_h: wifi-enable-h {
832 1.1 jmcneill rockchip,pins =
833 1.1 jmcneill <0 10 RK_FUNC_GPIO &pcfg_pull_none>;
834 1.1 jmcneill };
835 1.1 jmcneill };
836 1.1 jmcneill
837 1.1 jmcneill wireless-bluetooth {
838 1.1 jmcneill uart0_gpios: uart0-gpios {
839 1.1 jmcneill rockchip,pins =
840 1.1 jmcneill <2 19 RK_FUNC_GPIO &pcfg_pull_none>;
841 1.1 jmcneill };
842 1.1 jmcneill };
843 1.1 jmcneill
844 1.1 jmcneill usb2 {
845 1.1 jmcneill host_vbus_drv: host-vbus-drv {
846 1.1 jmcneill rockchip,pins =
847 1.1 jmcneill <4 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
848 1.1 jmcneill };
849 1.1 jmcneill };
850 1.1 jmcneill
851 1.1 jmcneill pmic {
852 1.1 jmcneill pmic_int_l: pmic-int-l {
853 1.1 jmcneill rockchip,pins =
854 1.1 jmcneill <1 21 RK_FUNC_GPIO &pcfg_pull_up>;
855 1.1 jmcneill };
856 1.1 jmcneill
857 1.1 jmcneill vsel1_gpio: vsel1-gpio {
858 1.1 jmcneill rockchip,pins =
859 1.1 jmcneill <1 17 RK_FUNC_GPIO &pcfg_pull_down>;
860 1.1 jmcneill };
861 1.1 jmcneill
862 1.1 jmcneill vsel2_gpio: vsel2-gpio {
863 1.1 jmcneill rockchip,pins =
864 1.1 jmcneill <1 14 RK_FUNC_GPIO &pcfg_pull_down>;
865 1.1 jmcneill };
866 1.1 jmcneill };
867 1.2 jakllsch
868 1.2 jakllsch pcie {
869 1.2 jakllsch pcie_pwr_en: pcie-pwr-en {
870 1.2 jakllsch rockchip,pins =
871 1.2 jakllsch <1 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>;
872 1.2 jakllsch };
873 1.2 jakllsch
874 1.2 jakllsch pcie_clkreqn: pci-clkreqn {
875 1.2 jakllsch rockchip,pins =
876 1.2 jakllsch <2 RK_PD2 RK_FUNC_2 &pcfg_pull_none>;
877 1.2 jakllsch };
878 1.2 jakllsch };
879 1.1 jmcneill };
880 1.1 jmcneill
881 1.1 jmcneill &cluster0_opp {
882 1.1 jmcneill opp-1512000000 {
883 1.1 jmcneill opp-hz = /bits/ 64 <1512000000>;
884 1.1 jmcneill opp-microvolt = <1200000>;
885 1.1 jmcneill clock-latency-ns = <40000>;
886 1.1 jmcneill status = "disabled";
887 1.1 jmcneill };
888 1.1 jmcneill };
889 1.1 jmcneill
890 1.1 jmcneill &cluster1_opp {
891 1.1 jmcneill opp-1992000000 {
892 1.1 jmcneill opp-hz = /bits/ 64 <1992000000>;
893 1.1 jmcneill opp-microvolt = <1300000>;
894 1.1 jmcneill clock-latency-ns = <40000>;
895 1.1 jmcneill status = "disabled";
896 1.1 jmcneill };
897 1.1 jmcneill };
898 1.1 jmcneill
899 1.2 jakllsch &pcie_phy {
900 1.2 jakllsch status = "okay";
901 1.2 jakllsch };
902 1.2 jakllsch
903 1.2 jakllsch &pcie0 {
904 1.2 jakllsch assigned-clocks = <&cru SCLK_PCIEPHY_REF>;
905 1.2 jakllsch assigned-clock-parents = <&cru SCLK_PCIEPHY_REF100M>;
906 1.2 jakllsch assigned-clock-rates = <100000000>;
907 1.2 jakllsch ep-gpios = <&gpio2 RK_PD4 GPIO_ACTIVE_HIGH>;
908 1.2 jakllsch num-lanes = <4>;
909 1.2 jakllsch max-link-speed = <2>;
910 1.2 jakllsch pinctrl-names = "default";
911 1.2 jakllsch pinctrl-0 = <&pcie_clkreqn>;
912 1.2 jakllsch vpcie3v3-supply = <&vcc3v3_pcie>;
913 1.2 jakllsch status = "okay";
914 1.2 jakllsch bus-range = <0 3>;
915 1.2 jakllsch ranges = <
916 1.2 jakllsch 0xc3000000 0x0 0xf8000000 0x0 0xf8000000 0x0 0x2000000 /* 32M region 0, prefmem */
917 1.2 jakllsch 0x82000000 0x0 0xfa000000 0x0 0xfa000000 0x0 0x1c00000 /* 28M regions 1-28, mem */
918 1.2 jakllsch 0x81000000 0x0 0x00000000 0x0 0xfbc00000 0x0 0x0100000 /* 1M region 29, i/o */
919 1.2 jakllsch 0x00010000 0x0 0x00000000 0x0 0xfbd00000 0x0 0x0300000 /* 3M regions 30-32, config */
920 1.2 jakllsch >;
921 1.2 jakllsch };
922 1.2 jakllsch
923 1.1 jmcneill &spi1 {
924 1.1 jmcneill status = "okay";
925 1.1 jmcneill
926 1.1 jmcneill spiflash: spi-flash@0 {
927 1.1 jmcneill #address-cells = <0x1>;
928 1.1 jmcneill #size-cells = <1>;
929 1.1 jmcneill compatible = "jedec,spi-nor";
930 1.1 jmcneill reg = <0x0>;
931 1.1 jmcneill spi-max-frequency = <25000000>;
932 1.1 jmcneill status = "okay";
933 1.1 jmcneill
934 1.1 jmcneill partitions {
935 1.1 jmcneill compatible = "fixed-partitions";
936 1.1 jmcneill #address-cells = <1>;
937 1.1 jmcneill #size-cells = <1>;
938 1.1 jmcneill
939 1.1 jmcneill loader@8000 {
940 1.1 jmcneill label = "loader";
941 1.1 jmcneill reg = <0x0 0x3F8000>;
942 1.1 jmcneill };
943 1.1 jmcneill
944 1.1 jmcneill env@3f8000 {
945 1.1 jmcneill label = "env";
946 1.1 jmcneill reg = <0x3F8000 0x8000>;
947 1.1 jmcneill };
948 1.1 jmcneill
949 1.1 jmcneill vendor@7c0000 {
950 1.1 jmcneill label = "vendor";
951 1.1 jmcneill reg = <0x7C0000 0x40000>;
952 1.1 jmcneill };
953 1.1 jmcneill };
954 1.1 jmcneill };
955 1.1 jmcneill };
956