rk3399-rockpro64.dts revision 1.1 1 /*
2 * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd
3 *
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
7 * whole.
8 *
9 * a) This file is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of the
12 * License, or (at your option) any later version.
13 *
14 * This file is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * Or, alternatively,
20 *
21 * b) Permission is hereby granted, free of charge, to any person
22 * obtaining a copy of this software and associated documentation
23 * files (the "Software"), to deal in the Software without
24 * restriction, including without limitation the rights to use,
25 * copy, modify, merge, publish, distribute, sublicense, and/or
26 * sell copies of the Software, and to permit persons to whom the
27 * Software is furnished to do so, subject to the following
28 * conditions:
29 *
30 * The above copyright notice and this permission notice shall be
31 * included in all copies or substantial portions of the Software.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40 * OTHER DEALINGS IN THE SOFTWARE.
41 */
42
43 /dts-v1/;
44 #include <dt-bindings/pwm/pwm.h>
45 #include <dt-bindings/input/input.h>
46 #include "rk3399.dtsi"
47 #include "rk3399-opp.dtsi"
48
49 / {
50 model = "Pine64 RockPro64";
51 compatible = "pine64,rockpro64", "rockchip,rk3399";
52
53 chosen {
54 bootargs = "earlycon=uart8250,mmio32,0xff1a0000 swiotlb=1";
55 stdout-path = "serial2:1500000n8";
56 };
57
58 reserved-memory {
59 #address-cells = <2>;
60 #size-cells = <2>;
61 ranges;
62
63 drm_logo: drm-logo@00000000 {
64 compatible = "rockchip,drm-logo";
65 reg = <0x0 0x0 0x0 0x0>;
66 };
67 };
68
69 /* first 64k(0xff8c0000~0xff8d0000) for ddr and suspend */
70 iram: sram@ff8d0000 {
71 compatible = "mmio-sram";
72 reg = <0x0 0xff8d0000 0x0 0x20000>; /* 128k */
73 };
74
75 aliases {
76 ethernet0 = &gmac;
77 };
78
79 dc_12v: dc-12v {
80 compatible = "regulator-fixed";
81 regulator-name = "dc_12v";
82 regulator-always-on;
83 regulator-boot-on;
84 regulator-min-microvolt = <12000000>;
85 regulator-max-microvolt = <12000000>;
86 };
87
88 vcc1v8_s0: vcc1v8-s0 {
89 compatible = "regulator-fixed";
90 regulator-name = "vcc1v8_s0";
91 regulator-min-microvolt = <1800000>;
92 regulator-max-microvolt = <1800000>;
93 regulator-always-on;
94 };
95
96 vcc_sys: vcc-sys {
97 compatible = "regulator-fixed";
98 regulator-name = "vcc_sys";
99 regulator-min-microvolt = <5000000>;
100 regulator-max-microvolt = <5000000>;
101 regulator-always-on;
102 vin-supply = <&dc_12v>;
103 };
104
105 vcc_phy: vcc-phy-regulator {
106 compatible = "regulator-fixed";
107 regulator-name = "vcc_phy";
108 regulator-always-on;
109 regulator-boot-on;
110 };
111
112 vcc3v3_sys: vcc3v3-sys {
113 compatible = "regulator-fixed";
114 regulator-name = "vcc3v3_sys";
115 regulator-min-microvolt = <3300000>;
116 regulator-max-microvolt = <3300000>;
117 regulator-always-on;
118 vin-supply = <&vcc_sys>;
119 };
120
121 vcc5v0_host: vcc5v0-host-regulator {
122 compatible = "regulator-fixed";
123 enable-active-high;
124 gpio = <&gpio4 RK_PD2 GPIO_ACTIVE_HIGH>;
125 pinctrl-names = "default";
126 pinctrl-0 = <&host_vbus_drv>;
127 regulator-name = "vcc5v0_host";
128 regulator-always-on;
129 };
130
131 vdd_log: vdd-log {
132 compatible = "pwm-regulator";
133 pwms = <&pwm2 0 25000 1>;
134 pwm-supply = <&vcc_sys>;
135 regulator-name = "vdd_log";
136 regulator-min-microvolt = <800000>;
137 regulator-max-microvolt = <1400000>;
138 regulator-always-on;
139 regulator-boot-on;
140
141 /* for rockchip boot on */
142 rockchip,pwm_id= <2>;
143 rockchip,pwm_voltage = <900000>;
144 };
145
146 clkin_gmac: external-gmac-clock {
147 compatible = "fixed-clock";
148 clock-frequency = <125000000>;
149 clock-output-names = "clkin_gmac";
150 #clock-cells = <0>;
151 };
152
153 spdif_out: spdif-out {
154 status = "okay";
155 compatible = "linux,spdif-dit";
156 #sound-dai-cells = <0>;
157 };
158
159 sdio_pwrseq: sdio-pwrseq {
160 compatible = "mmc-pwrseq-simple";
161 clocks = <&rk808 1>;
162 clock-names = "ext_clock";
163 pinctrl-names = "default";
164 pinctrl-0 = <&wifi_enable_h>;
165
166 /*
167 * On the module itself this is one of these (depending
168 * on the actual card populated):
169 * - SDIO_RESET_L_WL_REG_ON
170 * - PDN (power down when low)
171 */
172 reset-gpios = <&gpio0 10 GPIO_ACTIVE_LOW>;
173 };
174
175 xin32k: xin32k {
176 compatible = "fixed-clock";
177 clock-frequency = <32768>;
178 clock-output-names = "xin32k";
179 #clock-cells = <0>;
180 };
181
182 wireless-wlan {
183 compatible = "wlan-platdata";
184 rockchip,grf = <&grf>;
185 wifi_chip_type = "ap6354";
186 sdio_vref = <1800>;
187 WIFI,host_wake_irq = <&gpio0 3 GPIO_ACTIVE_HIGH>;
188 status = "okay";
189 };
190
191 wireless-bluetooth {
192 compatible = "bluetooth-platdata";
193 clocks = <&rk808 1>;
194 clock-names = "ext_clock";
195 uart_rts_gpios = <&gpio2 19 GPIO_ACTIVE_LOW>;
196 pinctrl-names = "default", "rts_gpio";
197 pinctrl-0 = <&uart0_rts>;
198 pinctrl-1 = <&uart0_gpios>;
199 BT,reset_gpio = <&gpio0 9 GPIO_ACTIVE_HIGH>;
200 BT,wake_gpio = <&gpio2 27 GPIO_ACTIVE_HIGH>;
201 BT,wake_host_irq = <&gpio0 4 GPIO_ACTIVE_HIGH>;
202 status = "okay";
203 };
204
205 hdmi_dp_sound: hdmi-dp-sound {
206 status = "okay";
207 compatible = "rockchip,rk3399-hdmi-dp";
208 rockchip,cpu = <&i2s2>;
209 rockchip,codec = <&hdmi>, <&cdn_dp>;
210 };
211
212 test-power {
213 status = "okay";
214 };
215
216 leds {
217 status = "okay";
218 compatible = "gpio-leds";
219 work-led {
220 gpios = <&gpio0 11 GPIO_ACTIVE_HIGH>;
221 linux,default-trigger = "none";
222 default-state = "on";
223 mode = <0x23>;
224 };
225 diy-led {
226 gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
227 linux,default-trigger = "none";
228 default-state = "on";
229 mode = <0x23>;
230 };
231 };
232
233 fan0: pwm-fan {
234 compatible = "pwm-fan";
235 pwms = <&pwm1 0 20000000 0>;
236 cooling-min-state = <0>;
237 cooling-max-state = <3>;
238 #cooling-cells = <2>;
239 cooling-levels = <0 102 170 230>;
240 };
241
242 rk_key: rockchip-key {
243 compatible = "rockchip,key";
244 status = "okay";
245
246 io-channels = <&saradc 1>;
247
248 power-key {
249 gpios = <&gpio0 5 GPIO_ACTIVE_LOW>;
250 linux,code = <116>;
251 label = "power";
252 gpio-key,wakeup;
253 };
254 };
255 };
256
257 &sdmmc {
258 clock-frequency = <50000000>;
259 clock-freq-min-max = <400000 150000000>;
260 supports-sd;
261 bus-width = <4>;
262 cap-mmc-highspeed;
263 cap-sd-highspeed;
264 disable-wp;
265 num-slots = <1>;
266 sd-uhs-sdr104;
267 vqmmc-supply = <&vcc_sd>;
268 pinctrl-names = "default";
269 pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
270 card-detect-delay = <800>;
271 status = "okay";
272 };
273
274 &sdio0 {
275 clock-frequency = <50000000>;
276 clock-freq-min-max = <200000 50000000>;
277 supports-sdio;
278 bus-width = <4>;
279 disable-wp;
280 cap-sd-highspeed;
281 cap-sdio-irq;
282 keep-power-in-suspend;
283 mmc-pwrseq = <&sdio_pwrseq>;
284 non-removable;
285 num-slots = <1>;
286 pinctrl-names = "default";
287 pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
288 sd-uhs-sdr104;
289 status = "disabled";
290 };
291
292 &emmc_phy {
293 status = "okay";
294 };
295
296 &sdhci {
297 bus-width = <8>;
298 //mmc-hs400-1_8v;
299 mmc-hs200-1_8v;
300 supports-emmc;
301 non-removable;
302 keep-power-in-suspend;
303 //mmc-hs400-enhanced-strobe;
304 status = "okay";
305 };
306
307 &i2s0 {
308 status = "okay";
309 rockchip,i2s-broken-burst-len;
310 rockchip,playback-channels = <8>;
311 rockchip,capture-channels = <8>;
312 #sound-dai-cells = <0>;
313 };
314
315 &i2s1 {
316 status = "okay";
317 rockchip,i2s-broken-burst-len;
318 rockchip,playback-channels = <8>;
319 rockchip,capture-channels = <8>;
320 #sound-dai-cells = <0>;
321 };
322
323 &i2s2 {
324 status = "okay";
325 #sound-dai-cells = <0>;
326 };
327
328 &spdif {
329 pinctrl-0 = <&spdif_bus_1>;
330 status = "okay";
331 #sound-dai-cells = <0>;
332 };
333
334 &i2c0 {
335 status = "okay";
336 i2c-scl-rising-time-ns = <180>;
337 i2c-scl-falling-time-ns = <30>;
338 clock-frequency = <400000>;
339
340 vdd_cpu_b: syr827@40 {
341 compatible = "silergy,syr827";
342 reg = <0x40>;
343 regulator-compatible = "fan53555-reg";
344 pinctrl-0 = <&vsel1_gpio>;
345 vsel-gpios = <&gpio1 17 GPIO_ACTIVE_HIGH>;
346 regulator-name = "vdd_cpu_b";
347 regulator-min-microvolt = <712500>;
348 regulator-max-microvolt = <1500000>;
349 regulator-ramp-delay = <1000>;
350 fcs,suspend-voltage-selector = <1>;
351 regulator-always-on;
352 regulator-boot-on;
353 vin-supply = <&vcc_sys>;
354 regulator-state-mem {
355 regulator-off-in-suspend;
356 };
357 };
358
359 vdd_gpu: syr828@41 {
360 compatible = "silergy,syr828";
361 reg = <0x41>;
362 regulator-compatible = "fan53555-reg";
363 pinctrl-0 = <&vsel2_gpio>;
364 vsel-gpios = <&gpio1 14 GPIO_ACTIVE_HIGH>;
365 regulator-name = "vdd_gpu";
366 regulator-min-microvolt = <712500>;
367 regulator-max-microvolt = <1500000>;
368 regulator-ramp-delay = <1000>;
369 fcs,suspend-voltage-selector = <1>;
370 regulator-always-on;
371 regulator-boot-on;
372 vin-supply = <&vcc_sys>;
373 regulator-initial-mode = <1>; /* 1:force PWM 2:auto */
374 regulator-state-mem {
375 regulator-off-in-suspend;
376 };
377 };
378
379 rk808: pmic@1b {
380 compatible = "rockchip,rk808";
381 reg = <0x1b>;
382 interrupt-parent = <&gpio1>;
383 interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
384 pinctrl-names = "default";
385 pinctrl-0 = <&pmic_int_l>;
386 rockchip,system-power-controller;
387 wakeup-source;
388 #clock-cells = <1>;
389 clock-output-names = "rk808-clkout1", "rk808-clkout2";
390
391 vcc1-supply = <&vcc_sys>;
392 vcc2-supply = <&vcc_sys>;
393 vcc3-supply = <&vcc_sys>;
394 vcc4-supply = <&vcc_sys>;
395 vcc6-supply = <&vcc_sys>;
396 vcc7-supply = <&vcc_sys>;
397 vcc8-supply = <&vcc3v3_sys>;
398 vcc9-supply = <&vcc_sys>;
399 vcc10-supply = <&vcc_sys>;
400 vcc11-supply = <&vcc_sys>;
401 vcc12-supply = <&vcc3v3_sys>;
402 vddio-supply = <&vcc_1v8>;
403
404 regulators {
405 vdd_center: DCDC_REG1 {
406 regulator-name = "vdd_center";
407 regulator-min-microvolt = <900000>;
408 regulator-max-microvolt = <900000>;
409 regulator-ramp-delay = <6001>;
410 regulator-always-on;
411 regulator-boot-on;
412 regulator-state-mem {
413 regulator-off-in-suspend;
414 };
415 };
416
417 vdd_cpu_l: DCDC_REG2 {
418 regulator-name = "vdd_cpu_l";
419 regulator-min-microvolt = <750000>;
420 regulator-max-microvolt = <1350000>;
421 regulator-ramp-delay = <6001>;
422 regulator-always-on;
423 regulator-boot-on;
424 regulator-state-mem {
425 regulator-off-in-suspend;
426 };
427 };
428
429 vcc_ddr: DCDC_REG3 {
430 regulator-name = "vcc_ddr";
431 regulator-always-on;
432 regulator-boot-on;
433 regulator-state-mem {
434 regulator-on-in-suspend;
435 };
436 };
437
438 vcc_1v8: DCDC_REG4 {
439 regulator-name = "vcc_1v8";
440 regulator-min-microvolt = <1800000>;
441 regulator-max-microvolt = <1800000>;
442 regulator-always-on;
443 regulator-boot-on;
444 regulator-state-mem {
445 regulator-on-in-suspend;
446 regulator-suspend-microvolt = <1800000>;
447 };
448 };
449
450 vcc1v8_dvp: LDO_REG1 {
451 regulator-name = "vcc1v8_dvp";
452 regulator-min-microvolt = <1800000>;
453 regulator-max-microvolt = <1800000>;
454 regulator-always-on;
455 regulator-boot-on;
456 regulator-state-mem {
457 regulator-on-in-suspend;
458 regulator-suspend-microvolt = <1800000>;
459 };
460 };
461
462 vcc3v0_touch: LDO_REG2 {
463 regulator-name = "vcc3v0_touch";
464 regulator-min-microvolt = <3000000>;
465 regulator-max-microvolt = <3000000>;
466 regulator-always-on;
467 regulator-boot-on;
468 regulator-state-mem {
469 regulator-on-in-suspend;
470 regulator-suspend-microvolt = <3000000>;
471 };
472 };
473
474 vcc1v8_pmu: LDO_REG3 {
475 regulator-name = "vcc1v8_pmu";
476 regulator-min-microvolt = <1800000>;
477 regulator-max-microvolt = <1800000>;
478 regulator-always-on;
479 regulator-boot-on;
480 regulator-state-mem {
481 regulator-on-in-suspend;
482 regulator-suspend-microvolt = <1800000>;
483 };
484 };
485
486 vcc_sd: LDO_REG4 {
487 regulator-name = "vcc_sd";
488 regulator-min-microvolt = <1800000>;
489 regulator-max-microvolt = <3300000>;
490 regulator-always-on;
491 regulator-boot-on;
492 regulator-state-mem {
493 regulator-on-in-suspend;
494 regulator-suspend-microvolt = <3300000>;
495 };
496 };
497
498 vcca3v0_codec: LDO_REG5 {
499 regulator-name = "vcca3v0_codec";
500 regulator-min-microvolt = <3000000>;
501 regulator-max-microvolt = <3000000>;
502 regulator-always-on;
503 regulator-boot-on;
504 regulator-state-mem {
505 regulator-on-in-suspend;
506 regulator-suspend-microvolt = <3000000>;
507 };
508 };
509
510 vcc_1v5: LDO_REG6 {
511 regulator-name = "vcc_1v5";
512 regulator-min-microvolt = <1500000>;
513 regulator-max-microvolt = <1500000>;
514 regulator-always-on;
515 regulator-boot-on;
516 regulator-state-mem {
517 regulator-on-in-suspend;
518 regulator-suspend-microvolt = <1500000>;
519 };
520 };
521
522 vcca1v8_codec: LDO_REG7 {
523 regulator-name = "vcca1v8_codec";
524 regulator-min-microvolt = <1800000>;
525 regulator-max-microvolt = <1800000>;
526 regulator-always-on;
527 regulator-boot-on;
528 regulator-state-mem {
529 regulator-on-in-suspend;
530 regulator-suspend-microvolt = <1800000>;
531 };
532 };
533
534 vcc_3v0: LDO_REG8 {
535 regulator-name = "vcc_3v0";
536 regulator-min-microvolt = <3000000>;
537 regulator-max-microvolt = <3000000>;
538 regulator-always-on;
539 regulator-boot-on;
540 regulator-state-mem {
541 regulator-on-in-suspend;
542 regulator-suspend-microvolt = <3000000>;
543 };
544 };
545
546 vcc3v3_s3: SWITCH_REG1 {
547 regulator-name = "vcc3v3_s3";
548 regulator-always-on;
549 regulator-boot-on;
550 regulator-state-mem {
551 regulator-on-in-suspend;
552 };
553 };
554
555 vcc3v3_s0: SWITCH_REG2 {
556 regulator-name = "vcc3v3_s0";
557 regulator-always-on;
558 regulator-boot-on;
559 regulator-state-mem {
560 regulator-on-in-suspend;
561 };
562 };
563 };
564 };
565 };
566
567 &cpu_l0 {
568 cpu-supply = <&vdd_cpu_l>;
569 };
570
571 &cpu_l1 {
572 cpu-supply = <&vdd_cpu_l>;
573 };
574
575 &cpu_l2 {
576 cpu-supply = <&vdd_cpu_l>;
577 };
578
579 &cpu_l3 {
580 cpu-supply = <&vdd_cpu_l>;
581 };
582
583 &cpu_b0 {
584 cpu-supply = <&vdd_cpu_b>;
585 };
586
587 &cpu_b1 {
588 cpu-supply = <&vdd_cpu_b>;
589 };
590
591 &gpu {
592 status = "okay";
593 mali-supply = <&vdd_gpu>;
594 };
595
596 &tcphy1 {
597 status = "okay";
598 };
599
600 &tsadc {
601 /* tshut mode 0:CRU 1:GPIO */
602 rockchip,hw-tshut-mode = <1>;
603 /* tshut polarity 0:LOW 1:HIGH */
604 rockchip,hw-tshut-polarity = <1>;
605 rockchip,hw-tshut-temp = <110000>;
606 status = "okay";
607 };
608
609 &u2phy0 {
610 status = "okay";
611
612 u2phy0_otg: otg-port {
613 status = "okay";
614 };
615
616 u2phy0_host: host-port {
617 phy-supply = <&vcc5v0_host>;
618 status = "okay";
619 };
620 };
621
622 &u2phy1 {
623 status = "okay";
624
625 u2phy1_otg: otg-port {
626 status = "okay";
627 };
628
629 u2phy1_host: host-port {
630 phy-supply = <&vcc5v0_host>;
631 status = "okay";
632 };
633 };
634
635 &uart0 {
636 pinctrl-names = "default";
637 pinctrl-0 = <&uart0_xfer &uart0_cts>;
638 status = "disabled";
639 };
640
641 &uart2 {
642 status = "okay";
643 };
644
645 &usb_host0_ehci {
646 status = "okay";
647 };
648
649 &usb_host0_ohci {
650 status = "okay";
651 };
652
653 &usb_host1_ehci {
654 status = "okay";
655 };
656
657 &usb_host1_ohci {
658 status = "okay";
659 };
660
661 &usbdrd3_0 {
662 status = "okay";
663 };
664
665 &usbdrd_dwc3_0 {
666 dr_mode = "otg";
667 status = "okay";
668 };
669
670 &usbdrd3_1 {
671 status = "okay";
672 };
673
674 &usbdrd_dwc3_1 {
675 dr_mode = "host";
676 status = "okay";
677 };
678
679 &pwm1 {
680 status = "okay";
681 pinctrl-names = "active";
682 };
683
684 &pwm3 {
685 status = "okay";
686
687 interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH 0>;
688 compatible = "rockchip,remotectl-pwm";
689 remote_pwm_id = <3>;
690 handle_cpu_id = <1>;
691 remote_support_psci = <1>;
692
693 ir_key1 {
694 rockchip,usercode = <0x4040>;
695 rockchip,key_table =
696 <0xf2 KEY_REPLY>,
697 <0xba KEY_BACK>,
698 <0xf4 KEY_UP>,
699 <0xf1 KEY_DOWN>,
700 <0xef KEY_LEFT>,
701 <0xee KEY_RIGHT>,
702 <0xbd KEY_HOME>,
703 <0xea KEY_VOLUMEUP>,
704 <0xe3 KEY_VOLUMEDOWN>,
705 <0xe2 KEY_SEARCH>,
706 <0xb2 KEY_POWER>,
707 <0xbc KEY_MUTE>,
708 <0xec KEY_MENU>,
709 <0xbf 0x190>,
710 <0xe0 0x191>,
711 <0xe1 0x192>,
712 <0xe9 183>,
713 <0xe6 248>,
714 <0xe8 185>,
715 <0xe7 186>,
716 <0xf0 388>,
717 <0xbe 0x175>;
718 };
719
720 ir_key2 {
721 rockchip,usercode = <0xff00>;
722 rockchip,key_table =
723 <0xf9 KEY_HOME>,
724 <0xbf KEY_BACK>,
725 <0xfb KEY_MENU>,
726 <0xaa KEY_REPLY>,
727 <0xb9 KEY_UP>,
728 <0xe9 KEY_DOWN>,
729 <0xb8 KEY_LEFT>,
730 <0xea KEY_RIGHT>,
731 <0xeb KEY_VOLUMEDOWN>,
732 <0xef KEY_VOLUMEUP>,
733 <0xf7 KEY_MUTE>,
734 <0xe7 KEY_POWER>,
735 <0xfc KEY_POWER>,
736 <0xa9 KEY_VOLUMEDOWN>,
737 <0xa8 KEY_VOLUMEDOWN>,
738 <0xe0 KEY_VOLUMEDOWN>,
739 <0xa5 KEY_VOLUMEDOWN>,
740 <0xab 183>,
741 <0xb7 388>,
742 <0xe8 388>,
743 <0xf8 184>,
744 <0xaf 185>,
745 <0xed KEY_VOLUMEDOWN>,
746 <0xee 186>,
747 <0xb3 KEY_VOLUMEDOWN>,
748 <0xf1 KEY_VOLUMEDOWN>,
749 <0xf2 KEY_VOLUMEDOWN>,
750 <0xf3 KEY_SEARCH>,
751 <0xb4 KEY_VOLUMEDOWN>,
752 <0xbe KEY_SEARCH>;
753 };
754
755 ir_key3 {
756 rockchip,usercode = <0x1dcc>;
757 rockchip,key_table =
758 <0xee KEY_REPLY>,
759 <0xf0 KEY_BACK>,
760 <0xf8 KEY_UP>,
761 <0xbb KEY_DOWN>,
762 <0xef KEY_LEFT>,
763 <0xed KEY_RIGHT>,
764 <0xfc KEY_HOME>,
765 <0xf1 KEY_VOLUMEUP>,
766 <0xfd KEY_VOLUMEDOWN>,
767 <0xb7 KEY_SEARCH>,
768 <0xff KEY_POWER>,
769 <0xf3 KEY_MUTE>,
770 <0xbf KEY_MENU>,
771 <0xf9 0x191>,
772 <0xf5 0x192>,
773 <0xb3 388>,
774 <0xbe KEY_1>,
775 <0xba KEY_2>,
776 <0xb2 KEY_3>,
777 <0xbd KEY_4>,
778 <0xf9 KEY_5>,
779 <0xb1 KEY_6>,
780 <0xfc KEY_7>,
781 <0xf8 KEY_8>,
782 <0xb0 KEY_9>,
783 <0xb6 KEY_0>,
784 <0xb5 KEY_BACKSPACE>;
785 };
786 };
787
788 &gmac {
789 phy-supply = <&vcc_phy>;
790 phy-mode = "rgmii";
791 clock_in_out = "input";
792 snps,reset-gpio = <&gpio3 15 GPIO_ACTIVE_LOW>;
793 snps,reset-active-low;
794 snps,reset-delays-us = <0 10000 50000>;
795 assigned-clocks = <&cru SCLK_RMII_SRC>;
796 assigned-clock-parents = <&clkin_gmac>;
797 pinctrl-names = "default";
798 pinctrl-0 = <&rgmii_pins>;
799 tx_delay = <0x28>;
800 rx_delay = <0x20>;
801 status = "okay";
802 };
803
804 &saradc {
805 status = "okay";
806 };
807
808 &io_domains {
809 status = "okay";
810
811 bt656-supply = <&vcc1v8_s0>; /* bt656_gpio2ab_ms */
812 audio-supply = <&vcc1v8_s0>; /* audio_gpio3d4a_ms */
813 sdmmc-supply = <&vcc_sd>; /* sdmmc_gpio4b_ms */
814 gpio1830-supply = <&vcc_3v0>; /* gpio1833_gpio4cd_ms */
815 };
816
817 &pinctrl {
818 sdio-pwrseq {
819 wifi_enable_h: wifi-enable-h {
820 rockchip,pins =
821 <0 10 RK_FUNC_GPIO &pcfg_pull_none>;
822 };
823 };
824
825 wireless-bluetooth {
826 uart0_gpios: uart0-gpios {
827 rockchip,pins =
828 <2 19 RK_FUNC_GPIO &pcfg_pull_none>;
829 };
830 };
831
832 usb2 {
833 host_vbus_drv: host-vbus-drv {
834 rockchip,pins =
835 <4 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
836 };
837 };
838
839 pmic {
840 pmic_int_l: pmic-int-l {
841 rockchip,pins =
842 <1 21 RK_FUNC_GPIO &pcfg_pull_up>;
843 };
844
845 vsel1_gpio: vsel1-gpio {
846 rockchip,pins =
847 <1 17 RK_FUNC_GPIO &pcfg_pull_down>;
848 };
849
850 vsel2_gpio: vsel2-gpio {
851 rockchip,pins =
852 <1 14 RK_FUNC_GPIO &pcfg_pull_down>;
853 };
854 };
855 };
856
857 &cluster0_opp {
858 opp-1512000000 {
859 opp-hz = /bits/ 64 <1512000000>;
860 opp-microvolt = <1200000>;
861 clock-latency-ns = <40000>;
862 status = "disabled";
863 };
864 };
865
866 &cluster1_opp {
867 opp-1992000000 {
868 opp-hz = /bits/ 64 <1992000000>;
869 opp-microvolt = <1300000>;
870 clock-latency-ns = <40000>;
871 status = "disabled";
872 };
873 };
874
875 &spi1 {
876 status = "okay";
877
878 spiflash: spi-flash@0 {
879 #address-cells = <0x1>;
880 #size-cells = <1>;
881 compatible = "jedec,spi-nor";
882 reg = <0x0>;
883 spi-max-frequency = <25000000>;
884 status = "okay";
885
886 partitions {
887 compatible = "fixed-partitions";
888 #address-cells = <1>;
889 #size-cells = <1>;
890
891 loader@8000 {
892 label = "loader";
893 reg = <0x0 0x3F8000>;
894 };
895
896 env@3f8000 {
897 label = "env";
898 reg = <0x3F8000 0x8000>;
899 };
900
901 vendor@7c0000 {
902 label = "vendor";
903 reg = <0x7C0000 0x40000>;
904 };
905 };
906 };
907 };
908