rk3399-rockpro64.dts revision 1.2 1 /*
2 * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd
3 *
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
7 * whole.
8 *
9 * a) This file is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of the
12 * License, or (at your option) any later version.
13 *
14 * This file is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * Or, alternatively,
20 *
21 * b) Permission is hereby granted, free of charge, to any person
22 * obtaining a copy of this software and associated documentation
23 * files (the "Software"), to deal in the Software without
24 * restriction, including without limitation the rights to use,
25 * copy, modify, merge, publish, distribute, sublicense, and/or
26 * sell copies of the Software, and to permit persons to whom the
27 * Software is furnished to do so, subject to the following
28 * conditions:
29 *
30 * The above copyright notice and this permission notice shall be
31 * included in all copies or substantial portions of the Software.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40 * OTHER DEALINGS IN THE SOFTWARE.
41 */
42
43 /dts-v1/;
44 #include <dt-bindings/pwm/pwm.h>
45 #include <dt-bindings/input/input.h>
46 #include "rk3399.dtsi"
47 #include "rk3399-opp.dtsi"
48
49 / {
50 model = "Pine64 RockPro64";
51 compatible = "pine64,rockpro64", "rockchip,rk3399";
52
53 chosen {
54 bootargs = "earlycon=uart8250,mmio32,0xff1a0000 swiotlb=1";
55 stdout-path = "serial2:1500000n8";
56 };
57
58 reserved-memory {
59 #address-cells = <2>;
60 #size-cells = <2>;
61 ranges;
62
63 drm_logo: drm-logo@00000000 {
64 compatible = "rockchip,drm-logo";
65 reg = <0x0 0x0 0x0 0x0>;
66 };
67 };
68
69 /* first 64k(0xff8c0000~0xff8d0000) for ddr and suspend */
70 iram: sram@ff8d0000 {
71 compatible = "mmio-sram";
72 reg = <0x0 0xff8d0000 0x0 0x20000>; /* 128k */
73 };
74
75 aliases {
76 ethernet0 = &gmac;
77 };
78
79 dc_12v: dc-12v {
80 compatible = "regulator-fixed";
81 regulator-name = "dc_12v";
82 regulator-always-on;
83 regulator-boot-on;
84 regulator-min-microvolt = <12000000>;
85 regulator-max-microvolt = <12000000>;
86 };
87
88 vcc3v3_pcie: vcc3v3-pcie-regulator {
89 compatible = "regulator-fixed";
90 regulator-min-microvolt = <3300000>;
91 regulator-max-microvolt = <3300000>;
92 enable-active-high;
93 gpio = <&gpio1 RK_PD0 GPIO_ACTIVE_HIGH>;
94 pinctrl-names = "default";
95 pinctrl-0 = <&pcie_pwr_en>;
96 regulator-name = "vcc3v3_pcie";
97 vin-supply = <&dc_12v>;
98 };
99
100 vcc1v8_s0: vcc1v8-s0 {
101 compatible = "regulator-fixed";
102 regulator-name = "vcc1v8_s0";
103 regulator-min-microvolt = <1800000>;
104 regulator-max-microvolt = <1800000>;
105 regulator-always-on;
106 };
107
108 vcc_sys: vcc-sys {
109 compatible = "regulator-fixed";
110 regulator-name = "vcc_sys";
111 regulator-min-microvolt = <5000000>;
112 regulator-max-microvolt = <5000000>;
113 regulator-always-on;
114 vin-supply = <&dc_12v>;
115 };
116
117 vcc_phy: vcc-phy-regulator {
118 compatible = "regulator-fixed";
119 regulator-name = "vcc_phy";
120 regulator-always-on;
121 regulator-boot-on;
122 };
123
124 vcc3v3_sys: vcc3v3-sys {
125 compatible = "regulator-fixed";
126 regulator-name = "vcc3v3_sys";
127 regulator-min-microvolt = <3300000>;
128 regulator-max-microvolt = <3300000>;
129 regulator-always-on;
130 vin-supply = <&vcc_sys>;
131 };
132
133 vcc5v0_host: vcc5v0-host-regulator {
134 compatible = "regulator-fixed";
135 enable-active-high;
136 gpio = <&gpio4 RK_PD2 GPIO_ACTIVE_HIGH>;
137 pinctrl-names = "default";
138 pinctrl-0 = <&host_vbus_drv>;
139 regulator-name = "vcc5v0_host";
140 regulator-always-on;
141 };
142
143 vdd_log: vdd-log {
144 compatible = "pwm-regulator";
145 pwms = <&pwm2 0 25000 1>;
146 pwm-supply = <&vcc_sys>;
147 regulator-name = "vdd_log";
148 regulator-min-microvolt = <800000>;
149 regulator-max-microvolt = <1400000>;
150 regulator-always-on;
151 regulator-boot-on;
152
153 /* for rockchip boot on */
154 rockchip,pwm_id= <2>;
155 rockchip,pwm_voltage = <900000>;
156 };
157
158 clkin_gmac: external-gmac-clock {
159 compatible = "fixed-clock";
160 clock-frequency = <125000000>;
161 clock-output-names = "clkin_gmac";
162 #clock-cells = <0>;
163 };
164
165 spdif_out: spdif-out {
166 status = "okay";
167 compatible = "linux,spdif-dit";
168 #sound-dai-cells = <0>;
169 };
170
171 sdio_pwrseq: sdio-pwrseq {
172 compatible = "mmc-pwrseq-simple";
173 clocks = <&rk808 1>;
174 clock-names = "ext_clock";
175 pinctrl-names = "default";
176 pinctrl-0 = <&wifi_enable_h>;
177
178 /*
179 * On the module itself this is one of these (depending
180 * on the actual card populated):
181 * - SDIO_RESET_L_WL_REG_ON
182 * - PDN (power down when low)
183 */
184 reset-gpios = <&gpio0 10 GPIO_ACTIVE_LOW>;
185 };
186
187 xin32k: xin32k {
188 compatible = "fixed-clock";
189 clock-frequency = <32768>;
190 clock-output-names = "xin32k";
191 #clock-cells = <0>;
192 };
193
194 wireless-wlan {
195 compatible = "wlan-platdata";
196 rockchip,grf = <&grf>;
197 wifi_chip_type = "ap6354";
198 sdio_vref = <1800>;
199 WIFI,host_wake_irq = <&gpio0 3 GPIO_ACTIVE_HIGH>;
200 status = "okay";
201 };
202
203 wireless-bluetooth {
204 compatible = "bluetooth-platdata";
205 clocks = <&rk808 1>;
206 clock-names = "ext_clock";
207 uart_rts_gpios = <&gpio2 19 GPIO_ACTIVE_LOW>;
208 pinctrl-names = "default", "rts_gpio";
209 pinctrl-0 = <&uart0_rts>;
210 pinctrl-1 = <&uart0_gpios>;
211 BT,reset_gpio = <&gpio0 9 GPIO_ACTIVE_HIGH>;
212 BT,wake_gpio = <&gpio2 27 GPIO_ACTIVE_HIGH>;
213 BT,wake_host_irq = <&gpio0 4 GPIO_ACTIVE_HIGH>;
214 status = "okay";
215 };
216
217 hdmi_dp_sound: hdmi-dp-sound {
218 status = "okay";
219 compatible = "rockchip,rk3399-hdmi-dp";
220 rockchip,cpu = <&i2s2>;
221 rockchip,codec = <&hdmi>, <&cdn_dp>;
222 };
223
224 test-power {
225 status = "okay";
226 };
227
228 leds {
229 status = "okay";
230 compatible = "gpio-leds";
231 work-led {
232 gpios = <&gpio0 11 GPIO_ACTIVE_HIGH>;
233 linux,default-trigger = "none";
234 default-state = "on";
235 mode = <0x23>;
236 };
237 diy-led {
238 gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
239 linux,default-trigger = "none";
240 default-state = "on";
241 mode = <0x23>;
242 };
243 };
244
245 fan0: pwm-fan {
246 compatible = "pwm-fan";
247 pwms = <&pwm1 0 20000000 0>;
248 cooling-min-state = <0>;
249 cooling-max-state = <3>;
250 #cooling-cells = <2>;
251 cooling-levels = <0 102 170 230>;
252 };
253
254 rk_key: rockchip-key {
255 compatible = "rockchip,key";
256 status = "okay";
257
258 io-channels = <&saradc 1>;
259
260 power-key {
261 gpios = <&gpio0 5 GPIO_ACTIVE_LOW>;
262 linux,code = <116>;
263 label = "power";
264 gpio-key,wakeup;
265 };
266 };
267 };
268
269 &sdmmc {
270 clock-frequency = <50000000>;
271 clock-freq-min-max = <400000 150000000>;
272 supports-sd;
273 bus-width = <4>;
274 cap-mmc-highspeed;
275 cap-sd-highspeed;
276 disable-wp;
277 num-slots = <1>;
278 sd-uhs-sdr104;
279 vqmmc-supply = <&vcc_sd>;
280 pinctrl-names = "default";
281 pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
282 card-detect-delay = <800>;
283 status = "okay";
284 };
285
286 &sdio0 {
287 clock-frequency = <50000000>;
288 clock-freq-min-max = <200000 50000000>;
289 supports-sdio;
290 bus-width = <4>;
291 disable-wp;
292 cap-sd-highspeed;
293 cap-sdio-irq;
294 keep-power-in-suspend;
295 mmc-pwrseq = <&sdio_pwrseq>;
296 non-removable;
297 num-slots = <1>;
298 pinctrl-names = "default";
299 pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
300 sd-uhs-sdr104;
301 status = "disabled";
302 };
303
304 &emmc_phy {
305 status = "okay";
306 };
307
308 &sdhci {
309 bus-width = <8>;
310 //mmc-hs400-1_8v;
311 mmc-hs200-1_8v;
312 supports-emmc;
313 non-removable;
314 keep-power-in-suspend;
315 //mmc-hs400-enhanced-strobe;
316 status = "okay";
317 };
318
319 &i2s0 {
320 status = "okay";
321 rockchip,i2s-broken-burst-len;
322 rockchip,playback-channels = <8>;
323 rockchip,capture-channels = <8>;
324 #sound-dai-cells = <0>;
325 };
326
327 &i2s1 {
328 status = "okay";
329 rockchip,i2s-broken-burst-len;
330 rockchip,playback-channels = <8>;
331 rockchip,capture-channels = <8>;
332 #sound-dai-cells = <0>;
333 };
334
335 &i2s2 {
336 status = "okay";
337 #sound-dai-cells = <0>;
338 };
339
340 &spdif {
341 pinctrl-0 = <&spdif_bus_1>;
342 status = "okay";
343 #sound-dai-cells = <0>;
344 };
345
346 &i2c0 {
347 status = "okay";
348 i2c-scl-rising-time-ns = <180>;
349 i2c-scl-falling-time-ns = <30>;
350 clock-frequency = <400000>;
351
352 vdd_cpu_b: syr827@40 {
353 compatible = "silergy,syr827";
354 reg = <0x40>;
355 regulator-compatible = "fan53555-reg";
356 pinctrl-0 = <&vsel1_gpio>;
357 vsel-gpios = <&gpio1 17 GPIO_ACTIVE_HIGH>;
358 regulator-name = "vdd_cpu_b";
359 regulator-min-microvolt = <712500>;
360 regulator-max-microvolt = <1500000>;
361 regulator-ramp-delay = <1000>;
362 fcs,suspend-voltage-selector = <1>;
363 regulator-always-on;
364 regulator-boot-on;
365 vin-supply = <&vcc_sys>;
366 regulator-state-mem {
367 regulator-off-in-suspend;
368 };
369 };
370
371 vdd_gpu: syr828@41 {
372 compatible = "silergy,syr828";
373 reg = <0x41>;
374 regulator-compatible = "fan53555-reg";
375 pinctrl-0 = <&vsel2_gpio>;
376 vsel-gpios = <&gpio1 14 GPIO_ACTIVE_HIGH>;
377 regulator-name = "vdd_gpu";
378 regulator-min-microvolt = <712500>;
379 regulator-max-microvolt = <1500000>;
380 regulator-ramp-delay = <1000>;
381 fcs,suspend-voltage-selector = <1>;
382 regulator-always-on;
383 regulator-boot-on;
384 vin-supply = <&vcc_sys>;
385 regulator-initial-mode = <1>; /* 1:force PWM 2:auto */
386 regulator-state-mem {
387 regulator-off-in-suspend;
388 };
389 };
390
391 rk808: pmic@1b {
392 compatible = "rockchip,rk808";
393 reg = <0x1b>;
394 interrupt-parent = <&gpio1>;
395 interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
396 pinctrl-names = "default";
397 pinctrl-0 = <&pmic_int_l>;
398 rockchip,system-power-controller;
399 wakeup-source;
400 #clock-cells = <1>;
401 clock-output-names = "rk808-clkout1", "rk808-clkout2";
402
403 vcc1-supply = <&vcc_sys>;
404 vcc2-supply = <&vcc_sys>;
405 vcc3-supply = <&vcc_sys>;
406 vcc4-supply = <&vcc_sys>;
407 vcc6-supply = <&vcc_sys>;
408 vcc7-supply = <&vcc_sys>;
409 vcc8-supply = <&vcc3v3_sys>;
410 vcc9-supply = <&vcc_sys>;
411 vcc10-supply = <&vcc_sys>;
412 vcc11-supply = <&vcc_sys>;
413 vcc12-supply = <&vcc3v3_sys>;
414 vddio-supply = <&vcc_1v8>;
415
416 regulators {
417 vdd_center: DCDC_REG1 {
418 regulator-name = "vdd_center";
419 regulator-min-microvolt = <900000>;
420 regulator-max-microvolt = <900000>;
421 regulator-ramp-delay = <6001>;
422 regulator-always-on;
423 regulator-boot-on;
424 regulator-state-mem {
425 regulator-off-in-suspend;
426 };
427 };
428
429 vdd_cpu_l: DCDC_REG2 {
430 regulator-name = "vdd_cpu_l";
431 regulator-min-microvolt = <750000>;
432 regulator-max-microvolt = <1350000>;
433 regulator-ramp-delay = <6001>;
434 regulator-always-on;
435 regulator-boot-on;
436 regulator-state-mem {
437 regulator-off-in-suspend;
438 };
439 };
440
441 vcc_ddr: DCDC_REG3 {
442 regulator-name = "vcc_ddr";
443 regulator-always-on;
444 regulator-boot-on;
445 regulator-state-mem {
446 regulator-on-in-suspend;
447 };
448 };
449
450 vcc_1v8: DCDC_REG4 {
451 regulator-name = "vcc_1v8";
452 regulator-min-microvolt = <1800000>;
453 regulator-max-microvolt = <1800000>;
454 regulator-always-on;
455 regulator-boot-on;
456 regulator-state-mem {
457 regulator-on-in-suspend;
458 regulator-suspend-microvolt = <1800000>;
459 };
460 };
461
462 vcc1v8_dvp: LDO_REG1 {
463 regulator-name = "vcc1v8_dvp";
464 regulator-min-microvolt = <1800000>;
465 regulator-max-microvolt = <1800000>;
466 regulator-always-on;
467 regulator-boot-on;
468 regulator-state-mem {
469 regulator-on-in-suspend;
470 regulator-suspend-microvolt = <1800000>;
471 };
472 };
473
474 vcc3v0_touch: LDO_REG2 {
475 regulator-name = "vcc3v0_touch";
476 regulator-min-microvolt = <3000000>;
477 regulator-max-microvolt = <3000000>;
478 regulator-always-on;
479 regulator-boot-on;
480 regulator-state-mem {
481 regulator-on-in-suspend;
482 regulator-suspend-microvolt = <3000000>;
483 };
484 };
485
486 vcc1v8_pmu: LDO_REG3 {
487 regulator-name = "vcc1v8_pmu";
488 regulator-min-microvolt = <1800000>;
489 regulator-max-microvolt = <1800000>;
490 regulator-always-on;
491 regulator-boot-on;
492 regulator-state-mem {
493 regulator-on-in-suspend;
494 regulator-suspend-microvolt = <1800000>;
495 };
496 };
497
498 vcc_sd: LDO_REG4 {
499 regulator-name = "vcc_sd";
500 regulator-min-microvolt = <1800000>;
501 regulator-max-microvolt = <3300000>;
502 regulator-always-on;
503 regulator-boot-on;
504 regulator-state-mem {
505 regulator-on-in-suspend;
506 regulator-suspend-microvolt = <3300000>;
507 };
508 };
509
510 vcca3v0_codec: LDO_REG5 {
511 regulator-name = "vcca3v0_codec";
512 regulator-min-microvolt = <3000000>;
513 regulator-max-microvolt = <3000000>;
514 regulator-always-on;
515 regulator-boot-on;
516 regulator-state-mem {
517 regulator-on-in-suspend;
518 regulator-suspend-microvolt = <3000000>;
519 };
520 };
521
522 vcc_1v5: LDO_REG6 {
523 regulator-name = "vcc_1v5";
524 regulator-min-microvolt = <1500000>;
525 regulator-max-microvolt = <1500000>;
526 regulator-always-on;
527 regulator-boot-on;
528 regulator-state-mem {
529 regulator-on-in-suspend;
530 regulator-suspend-microvolt = <1500000>;
531 };
532 };
533
534 vcca1v8_codec: LDO_REG7 {
535 regulator-name = "vcca1v8_codec";
536 regulator-min-microvolt = <1800000>;
537 regulator-max-microvolt = <1800000>;
538 regulator-always-on;
539 regulator-boot-on;
540 regulator-state-mem {
541 regulator-on-in-suspend;
542 regulator-suspend-microvolt = <1800000>;
543 };
544 };
545
546 vcc_3v0: LDO_REG8 {
547 regulator-name = "vcc_3v0";
548 regulator-min-microvolt = <3000000>;
549 regulator-max-microvolt = <3000000>;
550 regulator-always-on;
551 regulator-boot-on;
552 regulator-state-mem {
553 regulator-on-in-suspend;
554 regulator-suspend-microvolt = <3000000>;
555 };
556 };
557
558 vcc3v3_s3: SWITCH_REG1 {
559 regulator-name = "vcc3v3_s3";
560 regulator-always-on;
561 regulator-boot-on;
562 regulator-state-mem {
563 regulator-on-in-suspend;
564 };
565 };
566
567 vcc3v3_s0: SWITCH_REG2 {
568 regulator-name = "vcc3v3_s0";
569 regulator-always-on;
570 regulator-boot-on;
571 regulator-state-mem {
572 regulator-on-in-suspend;
573 };
574 };
575 };
576 };
577 };
578
579 &cpu_l0 {
580 cpu-supply = <&vdd_cpu_l>;
581 };
582
583 &cpu_l1 {
584 cpu-supply = <&vdd_cpu_l>;
585 };
586
587 &cpu_l2 {
588 cpu-supply = <&vdd_cpu_l>;
589 };
590
591 &cpu_l3 {
592 cpu-supply = <&vdd_cpu_l>;
593 };
594
595 &cpu_b0 {
596 cpu-supply = <&vdd_cpu_b>;
597 };
598
599 &cpu_b1 {
600 cpu-supply = <&vdd_cpu_b>;
601 };
602
603 &gpu {
604 status = "okay";
605 mali-supply = <&vdd_gpu>;
606 };
607
608 &tcphy1 {
609 status = "okay";
610 };
611
612 &tsadc {
613 /* tshut mode 0:CRU 1:GPIO */
614 rockchip,hw-tshut-mode = <1>;
615 /* tshut polarity 0:LOW 1:HIGH */
616 rockchip,hw-tshut-polarity = <1>;
617 rockchip,hw-tshut-temp = <110000>;
618 status = "okay";
619 };
620
621 &u2phy0 {
622 status = "okay";
623
624 u2phy0_otg: otg-port {
625 status = "okay";
626 };
627
628 u2phy0_host: host-port {
629 phy-supply = <&vcc5v0_host>;
630 status = "okay";
631 };
632 };
633
634 &u2phy1 {
635 status = "okay";
636
637 u2phy1_otg: otg-port {
638 status = "okay";
639 };
640
641 u2phy1_host: host-port {
642 phy-supply = <&vcc5v0_host>;
643 status = "okay";
644 };
645 };
646
647 &uart0 {
648 pinctrl-names = "default";
649 pinctrl-0 = <&uart0_xfer &uart0_cts>;
650 status = "disabled";
651 };
652
653 &uart2 {
654 status = "okay";
655 };
656
657 &usb_host0_ehci {
658 status = "okay";
659 };
660
661 &usb_host0_ohci {
662 status = "okay";
663 };
664
665 &usb_host1_ehci {
666 status = "okay";
667 };
668
669 &usb_host1_ohci {
670 status = "okay";
671 };
672
673 &usbdrd3_0 {
674 status = "okay";
675 };
676
677 &usbdrd_dwc3_0 {
678 dr_mode = "otg";
679 status = "okay";
680 };
681
682 &usbdrd3_1 {
683 status = "okay";
684 };
685
686 &usbdrd_dwc3_1 {
687 dr_mode = "host";
688 status = "okay";
689 };
690
691 &pwm1 {
692 status = "okay";
693 pinctrl-names = "active";
694 };
695
696 &pwm3 {
697 status = "okay";
698
699 interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH 0>;
700 compatible = "rockchip,remotectl-pwm";
701 remote_pwm_id = <3>;
702 handle_cpu_id = <1>;
703 remote_support_psci = <1>;
704
705 ir_key1 {
706 rockchip,usercode = <0x4040>;
707 rockchip,key_table =
708 <0xf2 KEY_REPLY>,
709 <0xba KEY_BACK>,
710 <0xf4 KEY_UP>,
711 <0xf1 KEY_DOWN>,
712 <0xef KEY_LEFT>,
713 <0xee KEY_RIGHT>,
714 <0xbd KEY_HOME>,
715 <0xea KEY_VOLUMEUP>,
716 <0xe3 KEY_VOLUMEDOWN>,
717 <0xe2 KEY_SEARCH>,
718 <0xb2 KEY_POWER>,
719 <0xbc KEY_MUTE>,
720 <0xec KEY_MENU>,
721 <0xbf 0x190>,
722 <0xe0 0x191>,
723 <0xe1 0x192>,
724 <0xe9 183>,
725 <0xe6 248>,
726 <0xe8 185>,
727 <0xe7 186>,
728 <0xf0 388>,
729 <0xbe 0x175>;
730 };
731
732 ir_key2 {
733 rockchip,usercode = <0xff00>;
734 rockchip,key_table =
735 <0xf9 KEY_HOME>,
736 <0xbf KEY_BACK>,
737 <0xfb KEY_MENU>,
738 <0xaa KEY_REPLY>,
739 <0xb9 KEY_UP>,
740 <0xe9 KEY_DOWN>,
741 <0xb8 KEY_LEFT>,
742 <0xea KEY_RIGHT>,
743 <0xeb KEY_VOLUMEDOWN>,
744 <0xef KEY_VOLUMEUP>,
745 <0xf7 KEY_MUTE>,
746 <0xe7 KEY_POWER>,
747 <0xfc KEY_POWER>,
748 <0xa9 KEY_VOLUMEDOWN>,
749 <0xa8 KEY_VOLUMEDOWN>,
750 <0xe0 KEY_VOLUMEDOWN>,
751 <0xa5 KEY_VOLUMEDOWN>,
752 <0xab 183>,
753 <0xb7 388>,
754 <0xe8 388>,
755 <0xf8 184>,
756 <0xaf 185>,
757 <0xed KEY_VOLUMEDOWN>,
758 <0xee 186>,
759 <0xb3 KEY_VOLUMEDOWN>,
760 <0xf1 KEY_VOLUMEDOWN>,
761 <0xf2 KEY_VOLUMEDOWN>,
762 <0xf3 KEY_SEARCH>,
763 <0xb4 KEY_VOLUMEDOWN>,
764 <0xbe KEY_SEARCH>;
765 };
766
767 ir_key3 {
768 rockchip,usercode = <0x1dcc>;
769 rockchip,key_table =
770 <0xee KEY_REPLY>,
771 <0xf0 KEY_BACK>,
772 <0xf8 KEY_UP>,
773 <0xbb KEY_DOWN>,
774 <0xef KEY_LEFT>,
775 <0xed KEY_RIGHT>,
776 <0xfc KEY_HOME>,
777 <0xf1 KEY_VOLUMEUP>,
778 <0xfd KEY_VOLUMEDOWN>,
779 <0xb7 KEY_SEARCH>,
780 <0xff KEY_POWER>,
781 <0xf3 KEY_MUTE>,
782 <0xbf KEY_MENU>,
783 <0xf9 0x191>,
784 <0xf5 0x192>,
785 <0xb3 388>,
786 <0xbe KEY_1>,
787 <0xba KEY_2>,
788 <0xb2 KEY_3>,
789 <0xbd KEY_4>,
790 <0xf9 KEY_5>,
791 <0xb1 KEY_6>,
792 <0xfc KEY_7>,
793 <0xf8 KEY_8>,
794 <0xb0 KEY_9>,
795 <0xb6 KEY_0>,
796 <0xb5 KEY_BACKSPACE>;
797 };
798 };
799
800 &gmac {
801 phy-supply = <&vcc_phy>;
802 phy-mode = "rgmii";
803 clock_in_out = "input";
804 snps,reset-gpio = <&gpio3 15 GPIO_ACTIVE_LOW>;
805 snps,reset-active-low;
806 snps,reset-delays-us = <0 10000 50000>;
807 assigned-clocks = <&cru SCLK_RMII_SRC>;
808 assigned-clock-parents = <&clkin_gmac>;
809 pinctrl-names = "default";
810 pinctrl-0 = <&rgmii_pins>;
811 tx_delay = <0x28>;
812 rx_delay = <0x20>;
813 status = "okay";
814 };
815
816 &saradc {
817 status = "okay";
818 };
819
820 &io_domains {
821 status = "okay";
822
823 bt656-supply = <&vcc1v8_s0>; /* bt656_gpio2ab_ms */
824 audio-supply = <&vcc1v8_s0>; /* audio_gpio3d4a_ms */
825 sdmmc-supply = <&vcc_sd>; /* sdmmc_gpio4b_ms */
826 gpio1830-supply = <&vcc_3v0>; /* gpio1833_gpio4cd_ms */
827 };
828
829 &pinctrl {
830 sdio-pwrseq {
831 wifi_enable_h: wifi-enable-h {
832 rockchip,pins =
833 <0 10 RK_FUNC_GPIO &pcfg_pull_none>;
834 };
835 };
836
837 wireless-bluetooth {
838 uart0_gpios: uart0-gpios {
839 rockchip,pins =
840 <2 19 RK_FUNC_GPIO &pcfg_pull_none>;
841 };
842 };
843
844 usb2 {
845 host_vbus_drv: host-vbus-drv {
846 rockchip,pins =
847 <4 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
848 };
849 };
850
851 pmic {
852 pmic_int_l: pmic-int-l {
853 rockchip,pins =
854 <1 21 RK_FUNC_GPIO &pcfg_pull_up>;
855 };
856
857 vsel1_gpio: vsel1-gpio {
858 rockchip,pins =
859 <1 17 RK_FUNC_GPIO &pcfg_pull_down>;
860 };
861
862 vsel2_gpio: vsel2-gpio {
863 rockchip,pins =
864 <1 14 RK_FUNC_GPIO &pcfg_pull_down>;
865 };
866 };
867
868 pcie {
869 pcie_pwr_en: pcie-pwr-en {
870 rockchip,pins =
871 <1 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>;
872 };
873
874 pcie_clkreqn: pci-clkreqn {
875 rockchip,pins =
876 <2 RK_PD2 RK_FUNC_2 &pcfg_pull_none>;
877 };
878 };
879 };
880
881 &cluster0_opp {
882 opp-1512000000 {
883 opp-hz = /bits/ 64 <1512000000>;
884 opp-microvolt = <1200000>;
885 clock-latency-ns = <40000>;
886 status = "disabled";
887 };
888 };
889
890 &cluster1_opp {
891 opp-1992000000 {
892 opp-hz = /bits/ 64 <1992000000>;
893 opp-microvolt = <1300000>;
894 clock-latency-ns = <40000>;
895 status = "disabled";
896 };
897 };
898
899 &pcie_phy {
900 status = "okay";
901 };
902
903 &pcie0 {
904 assigned-clocks = <&cru SCLK_PCIEPHY_REF>;
905 assigned-clock-parents = <&cru SCLK_PCIEPHY_REF100M>;
906 assigned-clock-rates = <100000000>;
907 ep-gpios = <&gpio2 RK_PD4 GPIO_ACTIVE_HIGH>;
908 num-lanes = <4>;
909 max-link-speed = <2>;
910 pinctrl-names = "default";
911 pinctrl-0 = <&pcie_clkreqn>;
912 vpcie3v3-supply = <&vcc3v3_pcie>;
913 status = "okay";
914 bus-range = <0 3>;
915 ranges = <
916 0xc3000000 0x0 0xf8000000 0x0 0xf8000000 0x0 0x2000000 /* 32M region 0, prefmem */
917 0x82000000 0x0 0xfa000000 0x0 0xfa000000 0x0 0x1c00000 /* 28M regions 1-28, mem */
918 0x81000000 0x0 0x00000000 0x0 0xfbc00000 0x0 0x0100000 /* 1M region 29, i/o */
919 0x00010000 0x0 0x00000000 0x0 0xfbd00000 0x0 0x0300000 /* 3M regions 30-32, config */
920 >;
921 };
922
923 &spi1 {
924 status = "okay";
925
926 spiflash: spi-flash@0 {
927 #address-cells = <0x1>;
928 #size-cells = <1>;
929 compatible = "jedec,spi-nor";
930 reg = <0x0>;
931 spi-max-frequency = <25000000>;
932 status = "okay";
933
934 partitions {
935 compatible = "fixed-partitions";
936 #address-cells = <1>;
937 #size-cells = <1>;
938
939 loader@8000 {
940 label = "loader";
941 reg = <0x0 0x3F8000>;
942 };
943
944 env@3f8000 {
945 label = "env";
946 reg = <0x3F8000 0x8000>;
947 };
948
949 vendor@7c0000 {
950 label = "vendor";
951 reg = <0x7C0000 0x40000>;
952 };
953 };
954 };
955 };
956