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sun50i-a64.dtsi revision 1.7 
      1  1.7  jmcneill /* $NetBSD: sun50i-a64.dtsi,v 1.7 2018/05/06 10:43:32 jmcneill Exp $ */
      2  1.1  jmcneill 
      3  1.1  jmcneill /*-
      4  1.1  jmcneill  * Copyright (c) 2017 Jared McNeill <jmcneill (at) invisible.ca>
      5  1.1  jmcneill  * All rights reserved.
      6  1.1  jmcneill  *
      7  1.1  jmcneill  * Redistribution and use in source and binary forms, with or without
      8  1.1  jmcneill  * modification, are permitted provided that the following conditions
      9  1.1  jmcneill  * are met:
     10  1.1  jmcneill  * 1. Redistributions of source code must retain the above copyright
     11  1.1  jmcneill  *    notice, this list of conditions and the following disclaimer.
     12  1.1  jmcneill  * 2. Redistributions in binary form must reproduce the above copyright
     13  1.1  jmcneill  *    notice, this list of conditions and the following disclaimer in the
     14  1.1  jmcneill  *    documentation and/or other materials provided with the distribution.
     15  1.1  jmcneill  *
     16  1.1  jmcneill  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     17  1.1  jmcneill  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     18  1.1  jmcneill  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     19  1.1  jmcneill  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     20  1.1  jmcneill  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
     21  1.1  jmcneill  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
     22  1.1  jmcneill  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
     23  1.1  jmcneill  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
     24  1.1  jmcneill  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     25  1.1  jmcneill  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     26  1.1  jmcneill  * SUCH DAMAGE.
     27  1.1  jmcneill  */
     28  1.1  jmcneill 
     29  1.1  jmcneill / {
     30  1.2  jmcneill 	chosen {
     31  1.2  jmcneill 		#address-cells = <1>;
     32  1.2  jmcneill 		#size-cells = <1>;
     33  1.2  jmcneill 		ranges;
     34  1.2  jmcneill 
     35  1.2  jmcneill 		framebuffer@0 {
     36  1.2  jmcneill 			compatible = "allwinner,simple-framebuffer",
     37  1.2  jmcneill 				     "simple-framebuffer";
     38  1.2  jmcneill 			allwinner,pipeline = "mixer1-lcd1-hdmi";
     39  1.2  jmcneill 			status = "disabled";
     40  1.2  jmcneill 		};
     41  1.2  jmcneill 	};
     42  1.6  jmcneill 
     43  1.6  jmcneill 	soc {
     44  1.7  jmcneill 		pwm: pwm@1c21400 {
     45  1.7  jmcneill 			compatible = "allwinner,sun50i-a64-pwm";
     46  1.7  jmcneill 			reg = <0x01c21400 0x8>;
     47  1.7  jmcneill 			clocks = <&osc24M>;
     48  1.7  jmcneill 			#pwm-cells = <3>;
     49  1.7  jmcneill 			status = "disabled";
     50  1.7  jmcneill 		};
     51  1.7  jmcneill 
     52  1.6  jmcneill 		rtp: rtp@1c25000 {
     53  1.6  jmcneill 			compatible = "allwinner,sun50i-a64-ts";
     54  1.6  jmcneill 			reg = <0x01c25000 0x400>;
     55  1.6  jmcneill 			interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
     56  1.6  jmcneill 			clocks = <&ccu CLK_BUS_THS>, <&ccu CLK_THS>;
     57  1.6  jmcneill 			clock-names = "ahb", "ths";
     58  1.6  jmcneill 			resets = <&ccu RST_BUS_THS>;
     59  1.6  jmcneill 			#thermal-sensor-cells = <0>;
     60  1.6  jmcneill 		};
     61  1.6  jmcneill 	};
     62  1.1  jmcneill };
     63  1.7  jmcneill 
     64  1.7  jmcneill &pio {
     65  1.7  jmcneill 	pwm0_pins: pwm0 {
     66  1.7  jmcneill 		pins = "PD22";
     67  1.7  jmcneill 		function = "pwm";
     68  1.7  jmcneill 	};
     69  1.7  jmcneill };
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