sun8i-h2-plus-bananapi-p2-zero.dts revision 1.1 1 /* $NetBSD: sun8i-h2-plus-bananapi-p2-zero.dts,v 1.1 2019/06/05 03:38:09 thorpej Exp $ */
2
3 /*-
4 * Copyright (c) 2019 Jason R. Thorpe
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
21 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
22 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
23 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
24 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
27 */
28
29 /*
30 * Device tree for Banana Pi BPI-P2 Zero. The P2 Zero is essentially an
31 * M2 Zero with the following additions:
32 *
33 * - On-board Ethernet (with PoE capability available as an
34 * optional module).
35 * - On-board eMMC module.
36 */
37
38 #include "../../../external/gpl2/dts/dist/arch/arm/boot/dts/sun8i-h2-plus-bananapi-m2-zero.dts"
39
40 / {
41 model = "Banana Pi BPI-P2-Zero";
42 compatible = "sinovoip,bpi-p2-zero", "allwinner,sun8i-h2-plus";
43
44 aliases {
45 /* ethernet0 is the H3 emac, defined in sun8i-h3.dtsi */
46 ethernet0 = &emac;
47 };
48
49 leds {
50 pwr_led {
51 label = "bananapi-p2-zero:red:pwr";
52 };
53 };
54 };
55
56 &emac {
57 phy-handle = <&int_mii_phy>;
58 phy-mode = "mii";
59 allwinner,leds-active-low;
60 status = "okay";
61 };
62
63 &mmc0 {
64 /*
65 * There seems to be a discrepancy between how the card-detect
66 * signal is wired up between the P2 Zero and the M2 Zero, on
67 * which the P2 Zero is based.
68 *
69 * The M2 Zero device tree file claims that early samples of
70 * the M2 Zero were wired active-low, but that the production
71 * of the board is wired active-high; as such, the M2 Zero
72 * device tree uses an active-high signal for card-detect.
73 *
74 * However, the P2 Zero has been observed in the wild to have
75 * an active-low card-detect signal. I don't know if this is
76 * an early-vs-late situation like the M2 Zero, but for now we
77 * will configure the card-detect signal to active-low to match
78 * known samples of the board that exist in the wild.
79 */
80 cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
81 };
82
83 &mmc2 {
84 pinctrl-names = "default";
85 pinctrl-0 = <&mmc2_8bit_pins>;
86 bus-width = <8>;
87 non-removable;
88 status = "okay";
89 };
90