ep93xxreg.h revision 1.6
1 /* $NetBSD: ep93xxreg.h,v 1.6 2006/02/13 12:13:20 hamajima Exp $ */ 2 3 /* 4 * Copyright (c) 2004 Jesse Off 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. All advertising materials mentioning features or use of this software 16 * must display the following acknowledgement: 17 * This product includes software developed by Ichiro FUKUHARA. 18 * 4. The name of the company nor the name of the author may be used to 19 * endorse or promote products derived from this software without specific 20 * prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY ICHIRO FUKUHARA ``AS IS'' AND ANY EXPRESS OR 23 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 24 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 25 * IN NO EVENT SHALL ICHIRO FUKUHARA OR THE VOICES IN HIS HEAD BE LIABLE FOR 26 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 28 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 29 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 30 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 31 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 32 * SUCH DAMAGE. 33 */ 34 35 #ifndef _EP93XXREG_H_ 36 #define _EP93XXREG_H_ 37 38 /* 39 * Physical memory map for the Cirrus Logic EP93XX 40 */ 41 42 /* 43 * FFFF FFFF --------------------------- 44 * Device 12 45 * External SMC CS#0 ROM/SRAM 46 * F000 0000 --------------------------- 47 * Device 11 48 * SDRAM CS#2 49 * E000 0000 --------------------------- 50 * Device 10 51 * SDRAM CS#1 52 * D000 0000 --------------------------- 53 * Device 9 54 * SDRAM CS#0 55 * C000 0000 --------------------------- 56 * Device 8 57 * Not used 58 * 9000 0000 --------------------------- 59 * Device 7 60 * EP93XX System Registers 61 * 8080 0000 - 8094 FFFF 62 * APB Mapped Registers 63 * 8010 0000 - 807F FFFF 64 * Reserved 65 * 8000 0000 - 800F FFFF 66 * AHB Mapped Registers 67 * 8000 0000 --------------------------- 68 * Device 6 69 * External SMC CS#7 ROM/SRAM 70 * 7000 0000 --------------------------- 71 * Device 5 72 * External SMC CS#6 ROM/SRAM 73 * 6000 0000 --------------------------- 74 * Device 4 75 * PCMCIA/CompactFlash 76 * 5000 0000 - 5fff ffff 77 * Reserved 78 * 4c00 0000 - 4fff ffff 79 * Slot0 Memory space 80 * 4800 0000 - 4bff ffff 81 * Slot0 Attribute space 82 * 4400 0000 - 47ff ffff 83 * Reserved 84 * 4000 0000 - 43ff ffff 85 * Slot0 I/O space 86 * 4000 0000 --------------------------- 87 * Device 3 88 * External SMC CS#3 ROM/SRAM 89 * 3000 0000 --------------------------- 90 * Device 2 91 * External SMC CS#2 ROM/SRAM 92 * 2000 0000 --------------------------- 93 * Device 1 94 * External SMC CS#1 ROM/SRAM 95 * 1000 0000 --------------------------- 96 * Device 0 97 * SDRAM CS#3 98 * 0000 0000 --------------------------- 99 */ 100 101 102 /* 103 * Virtual memory map for the Cirrus Logic EP93XX integrated devices 104 * 105 * Some device registers are staticaly mapped on upper address region. 106 * because we have to access them before bus_space is initialized. 107 * Most device is dynamicaly mapped by bus_space_map(). In this case, 108 * the actual mapped (virtual) address are not cared by device drivers. 109 */ 110 111 /* 112 * FFFF FFFF --------------------------- 113 * not used 114 * F030 0000 --------------------------- 115 * APB bus (2Mbyte) 116 * F010 0000 --------------------------- 117 * AHB bus (1Mbyte) 118 * F000 0000 --------------------------- 119 * PCMCIA slot0 space 120 * E000 0000 --------------------------- 121 * Kernel text and data 122 * C000 0000 --------------------------- 123 * 0000 0000 --------------------------- 124 * 125 */ 126 127 /* Virtual address for I/O space */ 128 #define EP93XX_IO_VBASE 0xf0000000UL 129 130 /* EP93xx System and Peripheral Registers */ 131 #define EP93XX_AHB_VBASE 0xf0000000UL 132 #define EP93XX_AHB_HWBASE 0x80000000UL 133 #define EP93XX_AHB_SIZE 0x00100000UL /* 1Mbyte */ 134 #define EP93XX_AHB_VIC1 0x000b0000UL 135 #define EP93XX_AHB_VIC2 0x000c0000UL 136 #define EP93XX_VIC_IRQStatus 0x00000000UL 137 #define EP93XX_VIC_FIQStatus 0x00000004UL 138 #define EP93XX_VIC_RawIntr 0x00000008UL 139 #define EP93XX_VIC_IntSelect 0x0000000cUL 140 #define EP93XX_VIC_IntEnable 0x00000010UL 141 #define EP93XX_VIC_IntEnClear 0x00000014UL 142 #define EP93XX_VIC_SoftInt 0x00000018UL 143 #define EP93XX_VIC_SoftIntClear 0x0000001cUL 144 #define EP93XX_VIC_Protection 0x00000020UL 145 #define EP93XX_VIC_VectAddr 0x00000030UL 146 #define EP93XX_VIC_DefVectAddr 0x00000034UL 147 #define EP93XX_VIC_VectAddr0 0x00000100UL 148 #define EP93XX_VIC_VectCntl0 0x00000200UL 149 #define EP93XX_VIC_PeriphID0 0x00000fe0UL 150 #define EP93XX_AHB_SMC 0x00080000UL 151 152 #define EP93XX_APB_VBASE 0xf0100000UL 153 #define EP93XX_APB_HWBASE 0x80800000UL 154 #define EP93XX_APB_SIZE 0x00200000UL /* 2Mbyte */ 155 #define EP93XX_APB_GPIO 0x00040000UL 156 #define EP93XX_APB_GPIO_SIZE 0x000000d0UL 157 #define EP93XX_APB_SSP 0x000a0000UL 158 #define EP93XX_APB_SSP_SIZE 0x00000018UL 159 #define EP93XX_SSP_SSPCR0 0x00000000UL 160 #define EP93XX_SSP_SSPCR1 0x00000004UL 161 #define EP93XX_SSP_SSPDR 0x00000008UL 162 #define EP93XX_SSP_SSPSR 0x0000000cUL 163 #define EP93XX_SSP_SSPCPSR 0x00000010UL 164 #define EP93XX_SSP_SSPIIR 0x00000014UL 165 #define EP93XX_SSP_SSPICR 0x00000014UL 166 #define EP93XX_APB_SYSCON 0x00130000UL 167 #define EP93XX_APB_SYSCON_SIZE 0x000000c0UL 168 #define EP93XX_SYSCON_PwrSts 0x00000000UL 169 #define EP93XX_SYSCON_PwrCnt 0x00000004UL 170 #define PwrCnt_UARTBAUD 0x20000000UL 171 #define EP93XX_SYSCON_TEOI 0x00000018UL 172 #define EP93XX_SYSCON_ClkSet1 0x00000020UL 173 #define EP93XX_SYSCON_ClkSet2 0x00000024UL 174 #define EP93XX_SYSCON_DeviceCfg 0x00000080UL 175 #define EP93XX_SYSCON_ChipID 0x00000094UL 176 #define EP93XX_APB_TIMERS 0x00010000UL 177 #define EP93XX_APB_UART1 0x000c0000UL 178 #define EP93XX_APB_UART2 0x000d0000UL 179 #define EP93XX_APB_UART_SIZE 0x00000220UL 180 #define EP93XX_UART_Flag 0x00000018UL 181 #define EP93XX_UART_Data 0x00000000UL 182 #define EP93XX_APB_RTC 0x00120000UL 183 #define EP93XX_APB_RTC_SIZE 0x00000112UL 184 #define EP93XX_APB_WDOG 0x00140000UL 185 #define EP93XX_APB_WDOG_SIZE 0x00000008UL 186 187 /* EP93xx PCMCIA space */ 188 #define EP93XX_PCMCIA0_VBASE 0xe0000000UL 189 #define EP93XX_PCMCIA0_HWBASE 0x40000000UL 190 #define EP93XX_PCMCIA_SIZE 0x10000000UL 191 #define EP93XX_PCMCIA_IO 0x00000000UL 192 #define EP93XX_PCMCIA_IO_SIZE 0x04000000UL 193 #define EP93XX_PCMCIA_ATTRIBUTE 0x08000000UL 194 #define EP93XX_PCMCIA_ATTRIBUTE_SIZE 0x04000000UL 195 #define EP93XX_PCMCIA_COMMON 0x0c000000UL 196 #define EP93XX_PCMCIA_COMMON_SIZE 0x04000000UL 197 198 #define NIRQ 64 199 #define VIC_NIRQ 32 200 201 #define EP93XX_INTR_bit31 31 202 #define EP93XX_INTR_bit30 30 203 #define EP93XX_INTR_bit29 29 204 #define EP93XX_INTR_bit28 28 205 #define EP93XX_INTR_bit27 27 206 #define EP93XX_INTR_bit26 26 207 #define EP93XX_INTR_bit25 25 208 #define EP93XX_INTR_bit24 24 209 #define EP93XX_INTR_bit23 23 210 #define EP93XX_INTR_bit22 22 211 #define EP93XX_INTR_bit21 21 212 #define EP93XX_INTR_bit20 20 213 #define EP93XX_INTR_bit19 19 214 #define EP93XX_INTR_bit18 18 215 #define EP93XX_INTR_bit17 17 216 #define EP93XX_INTR_bit16 16 217 #define EP93XX_INTR_bit15 15 218 #define EP93XX_INTR_bit14 14 219 #define EP93XX_INTR_bit13 13 220 #define EP93XX_INTR_bit12 12 221 #define EP93XX_INTR_bit11 11 222 #define EP93XX_INTR_bit10 10 223 #define EP93XX_INTR_bit9 9 224 #define EP93XX_INTR_bit8 8 225 #define EP93XX_INTR_bit7 7 226 #define EP93XX_INTR_bit6 6 227 #define EP93XX_INTR_bit5 5 228 #define EP93XX_INTR_bit4 4 229 #define EP93XX_INTR_bit3 3 230 #define EP93XX_INTR_bit2 2 231 #define EP93XX_INTR_bit1 1 232 #define EP93XX_INTR_bit0 0 233 234 #endif /* _EP93XXREG_H_ */ 235
Indexes created Tue Sep 30 20:09:53 GMT 2025