ep93xxvar.h revision 1.6 1 /* $NetBSD: ep93xxvar.h,v 1.6 2012/11/12 18:00:36 skrll Exp $ */
2 /*
3 * Copyright (c) 2004 Jesse Off
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 *
15 * THIS SOFTWARE IS PROVIDED BY ICHIRO FUKUHARA ``AS IS'' AND ANY EXPRESS OR
16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
18 * IN NO EVENT SHALL ICHIRO FUKUHARA OR THE VOICES IN HIS HEAD BE LIABLE FOR
19 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25 * SUCH DAMAGE.
26 */
27
28 #ifndef _EP93XXVAR_H_
29 #define _EP93XXVAR_H_
30
31 #include <sys/conf.h>
32 #include <sys/device.h>
33 #include <sys/queue.h>
34
35 #include <sys/bus.h>
36
37 struct intrhand {
38 TAILQ_ENTRY(intrhand) ih_list; /* link on intrq list */
39 int (*ih_func)(void *); /* interrupt handler */
40 void *ih_arg; /* arg for handler */
41 int ih_ipl; /* IPL_* */
42 int ih_irq; /* IRQ number */
43 };
44
45 #define IRQNAMESIZE sizeof("ep93xxintr irq xxx")
46
47 struct intrq {
48 TAILQ_HEAD(, intrhand) iq_list; /* handler list */
49 struct evcnt iq_ev; /* event counter */
50 uint32_t iq_vic1_mask; /* VIC1 IRQs to mask while handling */
51 uint32_t iq_vic2_mask; /* VIC2 IRQs to mask while handling */
52 uint32_t iq_levels; /* IPL_*'s this IRQ has */
53 char iq_name[IRQNAMESIZE]; /* interrupt name */
54 int iq_ist; /* share type */
55 };
56
57 struct pmap_ent {
58 const char* msg;
59 vaddr_t va;
60 paddr_t pa;
61 vsize_t sz;
62 int prot;
63 int cache;
64 };
65
66 extern struct bus_space ep93xx_bs_tag;
67 extern struct arm32_bus_dma_tag ep93xx_bus_dma;
68
69 void ep93xx_intr_init(void);
70 void *ep93xx_intr_establish(int irq, int ipl, int (*)(void *), void *);
71 void ep93xx_intr_disestablish(void *);
72 /* Platform needs to provide this */
73 bus_dma_tag_t ep93xx_bus_dma_init(struct arm32_bus_dma_tag *);
74 void ep93xx_reset(void);
75
76 #endif /* _EP93XXVAR_H_ */
77