epclkreg.h revision 1.4
1 1.4 skrll /* $NetBSD: epclkreg.h,v 1.4 2021/11/21 08:25:26 skrll Exp $ */ 2 1.1 joff 3 1.1 joff /* 4 1.1 joff * Copyright (c) 2004 Jesse Off 5 1.1 joff * 6 1.1 joff * Redistribution and use in source and binary forms, with or without 7 1.1 joff * modification, are permitted provided that the following conditions 8 1.1 joff * are met: 9 1.1 joff * 1. Redistributions of source code must retain the above copyright 10 1.1 joff * notice, this list of conditions and the following disclaimer. 11 1.1 joff * 2. Redistributions in binary form must reproduce the above copyright 12 1.1 joff * notice, this list of conditions and the following disclaimer in the 13 1.1 joff * documentation and/or other materials provided with the distribution. 14 1.1 joff * 15 1.1 joff * THIS SOFTWARE IS PROVIDED BY ICHIRO FUKUHARA AND CONTRIBUTORS ``AS IS'' 16 1.1 joff * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 1.1 joff * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 1.4 skrll * ARE DISCLAIMED. IN NO EVENT SHALL ICHIRO FUKUHARA OR THE VOICES IN HIS 19 1.1 joff * HEAD BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, 20 1.1 joff * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 21 1.1 joff * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 22 1.1 joff * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 23 1.1 joff * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 24 1.1 joff * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 25 1.1 joff * THE POSSIBILITY OF SUCH DAMAGE. 26 1.1 joff */ 27 1.1 joff 28 1.1 joff 29 1.1 joff #ifndef _EPCLKREG_H_ 30 1.1 joff #define _EPCLKREG_H_ 31 1.1 joff 32 1.2 hamajima /* Timer1 16-bit timer (Free running/Load based) */ 33 1.2 hamajima #define EP93XX_TIMERS_Timer1Load 0x00000000UL 34 1.2 hamajima #define TimerLoad_MASK 0x0000ffffUL 35 1.2 hamajima #define EP93XX_TIMERS_Timer1Value 0x00000004UL 36 1.2 hamajima #define TimerValue_MASK 0x0000ffffUL 37 1.2 hamajima #define EP93XX_TIMERS_Timer1Control 0x00000008UL 38 1.2 hamajima #define TimerControl_ENABLE (1<<7) 39 1.2 hamajima #define TimerControl_MODE (1<<6) 40 1.2 hamajima #define TimerControl_CLKSEL (1<<3) 41 1.2 hamajima #define EP93XX_TIMERS_Timer1Clear 0x0000000cUL 42 1.2 hamajima 43 1.2 hamajima /* Timer2 16-bit timer (Free running/Load based) */ 44 1.2 hamajima #define EP93XX_TIMERS_Timer2Load 0x00000020UL 45 1.2 hamajima #define EP93XX_TIMERS_Timer2Value 0x00000024UL 46 1.2 hamajima #define EP93XX_TIMERS_Timer2Control 0x00000028UL 47 1.2 hamajima #define EP93XX_TIMERS_Timer2Clear 0x0000002cUL 48 1.2 hamajima 49 1.2 hamajima /* Timer3 32-bit timer (Free running/Load based) */ 50 1.2 hamajima #define EP93XX_TIMERS_Timer3Load 0x00000080UL 51 1.2 hamajima #define EP93XX_TIMERS_Timer3Value 0x00000084UL 52 1.2 hamajima #define EP93XX_TIMERS_Timer3Control 0x00000088UL 53 1.2 hamajima #define EP93XX_TIMERS_Timer3Clear 0x0000008cUL 54 1.2 hamajima 55 1.2 hamajima /* Timer4 40-bit timer (Free running) */ 56 1.2 hamajima #define EP93XX_TIMERS_Timer4Enable 0x00000064UL 57 1.2 hamajima #define EP93XX_TIMERS_Timer4ValueHigh 0x00000064UL 58 1.2 hamajima #define EP93XX_TIMERS_Timer4ValueLow 0x00000060UL 59 1.1 joff 60 1.1 joff #endif /* _EPCLKREG_H_ */ 61
Indexes created Tue Sep 30 11:09:46 GMT 2025