eppcic.c revision 1.2
1 /* $NetBSD: eppcic.c,v 1.2 2007/07/09 20:52:05 ad Exp $ */ 2 3 /* 4 * Copyright (c) 2005 HAMAJIMA Katsuomi. All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 */ 27 28 #include <sys/cdefs.h> 29 __KERNEL_RCSID(0, "$NetBSD: eppcic.c,v 1.2 2007/07/09 20:52:05 ad Exp $"); 30 31 #include <sys/param.h> 32 #include <sys/systm.h> 33 #include <sys/kernel.h> 34 #include <sys/malloc.h> 35 #include <sys/device.h> 36 #include <sys/kthread.h> 37 #include <uvm/uvm_param.h> 38 #include <machine/bus.h> 39 #include <dev/pcmcia/pcmciareg.h> 40 #include <dev/pcmcia/pcmciavar.h> 41 #include <dev/pcmcia/pcmciachip.h> 42 #include <arm/ep93xx/epsocvar.h> 43 #include <arm/ep93xx/epgpiovar.h> 44 #include <arm/ep93xx/eppcicvar.h> 45 #include <arm/ep93xx/ep93xxreg.h> 46 #include <arm/ep93xx/epsmcreg.h> 47 #include "epled.h" 48 #if NEPLED > 0 49 #include <arm/ep93xx/epledvar.h> 50 #endif 51 52 #include "epgpio.h" 53 #if NEPGPIO == 0 54 #error "epgpio requires in eppcic" 55 #endif 56 57 #ifdef EPPCIC_DEBUG 58 int eppcic_debug = EPPCIC_DEBUG; 59 #define DPRINTFN(n,x) if (eppcic_debug>(n)) printf x; 60 #else 61 #define DPRINTFN(n,x) 62 #endif 63 64 /* Mem & I/O */ 65 #define SOCKET0_MCCD1 1 /* pin36/pin26 (negative) Card Detect 1 */ 66 #define SOCKET0_MCCD2 2 /* pin67/pin25 (negative) Card Detect 2 */ 67 #define SOCKET0_VS1 5 /* pin33/pin43 (negative) Voltage Sense 1 */ 68 #define SOCKET0_VS2 7 /* pin57/pin40 (negative) Voltage Sense 2 */ 69 /* Memory */ 70 #define SOCKET0_WP 0 /* pin33/pin24 Write Protect */ 71 #define SOCKET0_MCBVD1 3 /* pin63/pin46 Battery Voltage Detect 1 */ 72 #define SOCKET0_MCBVD2 4 /* pin62/pin45 Battery Voltage Detect 2 */ 73 #define SOCKET0_READY 6 /* pin16/pin37 Ready */ 74 /* I/O */ 75 #define SOCKET0_STSCHG 3 /* pin63/pin46 (negative) Status Change */ 76 #define SOCKET0_SPKR 4 /* pin62/pin45 (negative) Speaker */ 77 #define SOCKET0_IREQ 6 /* pin16/pin37 Interrupt Request */ 78 79 struct eppcic_handle { 80 int ph_socket; /* socket number */ 81 struct eppcic_softc *ph_sc; 82 struct device *ph_card; 83 int (*ph_ih_func)(void *); 84 void *ph_ih_arg; 85 lwp_t *ph_event_thread; 86 int ph_run; /* ktread running */ 87 int ph_width; /* 8 or 16 */ 88 int ph_vcc; /* 3 or 5 */ 89 int ph_status[2]; /* cd1 and cd2 */ 90 int ph_port; /* GPIO port */ 91 int ph_cd[2]; /* card detect */ 92 int ph_vs[2]; /* voltage sense */ 93 int ph_ireq; /* interrupt request */ 94 struct { 95 bus_size_t reg; 96 bus_addr_t base; 97 bus_size_t size; 98 } ph_space[3]; 99 #define IO 0 100 #define COMMON 1 101 #define ATTRIBUTE 2 102 }; 103 104 static int eppcic_intr_carddetect(void *); 105 static int eppcic_intr_socket(void *); 106 static int eppcic_print(void *, const char *); 107 static void eppcic_event_thread(void *); 108 void eppcic_shutdown(void *); 109 110 static int eppcic_mem_alloc(pcmcia_chipset_handle_t, bus_size_t, 111 struct pcmcia_mem_handle *); 112 static void eppcic_mem_free(pcmcia_chipset_handle_t, 113 struct pcmcia_mem_handle *); 114 static int eppcic_mem_map(pcmcia_chipset_handle_t, int, bus_addr_t, bus_size_t, 115 struct pcmcia_mem_handle *, bus_size_t *, int *); 116 static void eppcic_mem_unmap(pcmcia_chipset_handle_t, int); 117 static int eppcic_io_alloc(pcmcia_chipset_handle_t, bus_addr_t, bus_size_t, 118 bus_size_t, struct pcmcia_io_handle *); 119 static void eppcic_io_free(pcmcia_chipset_handle_t, struct pcmcia_io_handle *); 120 static int eppcic_io_map(pcmcia_chipset_handle_t, int, bus_addr_t, bus_size_t, 121 struct pcmcia_io_handle *, int *); 122 static void eppcic_io_unmap(pcmcia_chipset_handle_t, int); 123 static void *eppcic_intr_establish(pcmcia_chipset_handle_t, 124 struct pcmcia_function *, 125 int, int (*)(void *), void *); 126 static void eppcic_intr_disestablish(pcmcia_chipset_handle_t, void *); 127 static void eppcic_socket_enable(pcmcia_chipset_handle_t); 128 static void eppcic_socket_disable(pcmcia_chipset_handle_t); 129 static void eppcic_socket_settype(pcmcia_chipset_handle_t, int); 130 131 static void eppcic_attach_socket(struct eppcic_handle *); 132 static void eppcic_config_socket(struct eppcic_handle *); 133 static int eppcic_get_voltage(struct eppcic_handle *); 134 static void eppcic_set_pcreg(struct eppcic_handle *, int); 135 136 static struct pcmcia_chip_functions eppcic_functions = { 137 eppcic_mem_alloc, eppcic_mem_free, 138 eppcic_mem_map, eppcic_mem_unmap, 139 eppcic_io_alloc, eppcic_io_free, 140 eppcic_io_map, eppcic_io_unmap, 141 eppcic_intr_establish, eppcic_intr_disestablish, 142 eppcic_socket_enable, eppcic_socket_disable, 143 eppcic_socket_settype 144 }; 145 146 void 147 eppcic_attach_common(struct device *parent, struct device *self, void *aux, 148 eppcic_chipset_tag_t pcic) 149 { 150 struct eppcic_softc *sc = (struct eppcic_softc *)self; 151 struct epsoc_attach_args *sa = aux; 152 struct eppcic_handle *ph; 153 int reg; 154 int i; 155 156 if (!sa->sa_gpio) { 157 printf("%s: epgpio requires\n", self->dv_xname); 158 return; 159 } 160 sc->sc_gpio = sa->sa_gpio; 161 sc->sc_iot = sa->sa_iot; 162 sc->sc_hclk = sa->sa_hclk; 163 sc->sc_pcic = pcic; 164 sc->sc_enable = 0; 165 if (bus_space_map(sa->sa_iot, sa->sa_addr, 166 sa->sa_size, 0, &sc->sc_ioh)){ 167 printf("%s: Cannot map registers\n", self->dv_xname); 168 return; 169 } 170 printf("\n"); 171 172 #if NEPLED > 0 173 epled_green_on(); 174 epled_red_off(); 175 #endif 176 /* socket 0 */ 177 if (!(ph = malloc(sizeof(struct eppcic_handle), M_DEVBUF, M_NOWAIT))) { 178 printf("%s: Cannot allocate memory\n", self->dv_xname); 179 return; /* ENOMEM */ 180 } 181 sc->sc_ph[0] = ph; 182 ph->ph_sc = sc; 183 ph->ph_socket = 0; 184 ph->ph_port = PORT_F; 185 ph->ph_cd[0] = SOCKET0_MCCD1; 186 ph->ph_cd[1] = SOCKET0_MCCD2; 187 ph->ph_vs[0] = SOCKET0_VS1; 188 ph->ph_vs[1] = SOCKET0_VS2; 189 ph->ph_ireq = SOCKET0_IREQ; 190 ph->ph_space[IO].reg = EP93XX_PCMCIA0_IO; 191 ph->ph_space[IO].base = EP93XX_PCMCIA0_HWBASE + EP93XX_PCMCIA_IO; 192 ph->ph_space[IO].size = EP93XX_PCMCIA_IO_SIZE; 193 ph->ph_space[COMMON].reg = EP93XX_PCMCIA0_Common; 194 ph->ph_space[COMMON].base = EP93XX_PCMCIA0_HWBASE 195 + EP93XX_PCMCIA_COMMON; 196 ph->ph_space[COMMON].size = EP93XX_PCMCIA_COMMON_SIZE; 197 ph->ph_space[ATTRIBUTE].reg = EP93XX_PCMCIA0_Attribute; 198 ph->ph_space[ATTRIBUTE].base = EP93XX_PCMCIA0_HWBASE 199 + EP93XX_PCMCIA_ATTRIBUTE; 200 ph->ph_space[ATTRIBUTE].size = EP93XX_PCMCIA_ATTRIBUTE_SIZE; 201 eppcic_attach_socket(ph); 202 203 reg = EP93XX_PCMCIA_WEN | (pcic->socket_type)(sc, 0); 204 bus_space_write_4(sc->sc_iot, sc->sc_ioh, EP93XX_PCMCIA_Ctrl, 205 EP93XX_PCMCIA_RST | reg); 206 delay(10); 207 bus_space_write_4(sc->sc_iot, sc->sc_ioh, EP93XX_PCMCIA_Ctrl, reg); 208 delay(500); 209 210 for (i = 0; i < EP93XX_PCMCIA_NSOCKET; i++) 211 eppcic_config_socket(sc->sc_ph[i]); 212 #if NEPLED > 0 213 epled_green_off(); 214 #endif 215 } 216 217 static void 218 eppcic_attach_socket(struct eppcic_handle *ph) 219 { 220 struct eppcic_softc *sc = ph->ph_sc; 221 eppcic_chipset_tag_t pcic = sc->sc_pcic; 222 int wait; 223 224 ph->ph_width = 16; 225 ph->ph_vcc = 3; 226 ph->ph_event_thread = NULL; 227 ph->ph_run = 0; 228 ph->ph_ih_func = NULL; 229 ph->ph_ih_arg = NULL; 230 epgpio_in(sc->sc_gpio, ph->ph_port, ph->ph_cd[0]); 231 epgpio_in(sc->sc_gpio, ph->ph_port, ph->ph_cd[1]); 232 epgpio_in(sc->sc_gpio, ph->ph_port, ph->ph_vs[0]); 233 epgpio_in(sc->sc_gpio, ph->ph_port, ph->ph_vs[1]); 234 ph->ph_status[0] = epgpio_read(sc->sc_gpio, ph->ph_port, ph->ph_cd[0]); 235 ph->ph_status[1] = epgpio_read(sc->sc_gpio, ph->ph_port, ph->ph_cd[1]); 236 wait = (pcic->power_ctl)(sc, ph->ph_socket, POWER_OFF); 237 delay(wait); 238 eppcic_set_pcreg(ph, ph->ph_space[IO].reg); 239 eppcic_set_pcreg(ph, ph->ph_space[COMMON].reg); 240 eppcic_set_pcreg(ph, ph->ph_space[ATTRIBUTE].reg); 241 wait = (pcic->power_ctl)(sc, ph->ph_socket, POWER_ON); 242 delay(wait); 243 } 244 245 static void 246 eppcic_config_socket(struct eppcic_handle *ph) 247 { 248 struct eppcic_softc *sc = ph->ph_sc; 249 eppcic_chipset_tag_t pcic = sc->sc_pcic; 250 struct pcmciabus_attach_args paa; 251 int wait; 252 253 paa.paa_busname = "pcmcia"; 254 paa.pct = (pcmcia_chipset_tag_t)&eppcic_functions; 255 paa.pch = (pcmcia_chipset_handle_t)ph; 256 paa.iobase = ph->ph_space[IO].base; 257 paa.iosize = ph->ph_space[IO].size; 258 ph->ph_card = config_found_ia((void*)sc, "pcmciabus", &paa, 259 eppcic_print); 260 261 epgpio_intr_establish(sc->sc_gpio, ph->ph_port, ph->ph_cd[0], 262 EDGE_TRIGGER | FALLING_EDGE | DEBOUNCE, 263 IPL_TTY, eppcic_intr_carddetect, ph); 264 epgpio_intr_establish(sc->sc_gpio, ph->ph_port, ph->ph_cd[1], 265 EDGE_TRIGGER | RISING_EDGE | DEBOUNCE, 266 IPL_TTY, eppcic_intr_carddetect, ph); 267 wait = (pcic->power_ctl)(sc, ph->ph_socket, POWER_OFF); 268 delay(wait); 269 270 271 ph->ph_status[0] = epgpio_read(sc->sc_gpio, ph->ph_port, ph->ph_cd[0]); 272 ph->ph_status[1] = epgpio_read(sc->sc_gpio, ph->ph_port, ph->ph_cd[1]); 273 274 DPRINTFN(1, ("eppcic_config_socket: cd1=%d, cd2=%d\n",ph->ph_status[0],ph->ph_status[1])); 275 276 if (!(ph->ph_status[0] | ph->ph_status[1])) 277 pcmcia_card_attach(ph->ph_card); 278 279 ph->ph_run = 1; 280 kthread_create(PRI_NONE, 0, NULL, eppcic_event_thread, ph, 281 &ph->ph_event_thread, "%s,%d", sc->sc_dev.dv_xname, 282 ph->ph_socket); 283 } 284 285 static int 286 eppcic_print(void *arg, const char *pnp) 287 { 288 return (UNCONF); 289 } 290 291 static void 292 eppcic_event_thread(void *arg) 293 { 294 struct eppcic_handle *ph = arg; 295 296 for (;;) { 297 tsleep(ph, PWAIT, "CSC wait", 0); 298 if (!ph->ph_run) 299 break; 300 301 DPRINTFN(1, ("eppcic_event_thread: cd1=%d, cd2=%d\n",ph->ph_status[0],ph->ph_status[1])); 302 303 if (!ph->ph_status[0] && !ph->ph_status[1]) 304 pcmcia_card_attach(ph->ph_card); 305 else if (ph->ph_status[0] && ph->ph_status[1]) 306 pcmcia_card_detach(ph->ph_card, DETACH_FORCE); 307 } 308 309 DPRINTFN(1, ("eppcic_event_thread: run=%d\n",ph->ph_run)); 310 ph->ph_event_thread = NULL; 311 kthread_exit(0); 312 } 313 314 void 315 eppcic_shutdown(void *arg) 316 { 317 struct eppcic_handle *ph = arg; 318 319 DPRINTFN(1, ("eppcic_shutdown\n")); 320 ph->ph_run = 0; 321 wakeup(ph); 322 } 323 324 static int 325 eppcic_intr_carddetect(void *arg) 326 { 327 struct eppcic_handle *ph = arg; 328 struct eppcic_softc *sc = ph->ph_sc; 329 int nstatus[2]; 330 331 nstatus[0] = epgpio_read(sc->sc_gpio, ph->ph_port, ph->ph_cd[0]); 332 nstatus[1] = epgpio_read(sc->sc_gpio, ph->ph_port, ph->ph_cd[1]); 333 334 DPRINTFN(1, ("eppcic_intr: cd1=%#x, cd2=%#x\n",nstatus[0],nstatus[1])); 335 336 if (nstatus[0] != ph->ph_status[0] || nstatus[1] != ph->ph_status[1]) 337 wakeup(ph); 338 ph->ph_status[0] = nstatus[0]; 339 ph->ph_status[1] = nstatus[1]; 340 return 0; 341 } 342 343 static int 344 eppcic_mem_alloc(pcmcia_chipset_handle_t pch, bus_size_t size, 345 struct pcmcia_mem_handle *pmh) 346 { 347 struct eppcic_handle *ph = (struct eppcic_handle *)pch; 348 struct eppcic_softc *sc = ph->ph_sc; 349 350 DPRINTFN(1, ("eppcic_mem_alloc: size=%#x\n",(unsigned)size)); 351 352 pmh->memt = sc->sc_iot; 353 return 0; 354 } 355 356 static void 357 eppcic_mem_free(pcmcia_chipset_handle_t pch, struct pcmcia_mem_handle *pmh) 358 { 359 DPRINTFN(1, ("eppcic_mem_free\n")); 360 } 361 362 static int 363 eppcic_mem_map(pcmcia_chipset_handle_t pch, int kind, bus_addr_t addr, 364 bus_size_t size, struct pcmcia_mem_handle *pmh, 365 bus_size_t *offsetp, int *windowp) 366 { 367 struct eppcic_handle *ph = (struct eppcic_handle *)pch; 368 struct eppcic_softc *sc = ph->ph_sc; 369 bus_addr_t pa; 370 int err; 371 372 DPRINTFN(1, ("eppcic_mem_map: kind=%d, addr=%#x, size=%#x\n",kind,(unsigned)addr,(unsigned)size)); 373 374 pa = addr; 375 *offsetp = 0; 376 size = round_page(size); 377 pmh->realsize = size; 378 if (kind & PCMCIA_WIDTH_MEM8) 379 ph->ph_width = 8; 380 else 381 ph->ph_width = 16; 382 switch (kind & ~PCMCIA_WIDTH_MEM_MASK) { 383 case PCMCIA_MEM_ATTR: 384 eppcic_set_pcreg(ph, ph->ph_space[ATTRIBUTE].reg); 385 pa += ph->ph_space[ATTRIBUTE].base; 386 break; 387 case PCMCIA_MEM_COMMON: 388 eppcic_set_pcreg(ph, ph->ph_space[COMMON].reg); 389 pa += ph->ph_space[COMMON].base; 390 break; 391 default: 392 return -1; 393 } 394 395 DPRINTFN(1, ("eppcic_mem_map: pa=%#x, *offsetp=%#x, size=%#x\n",(unsigned)pa,(unsigned)addr,(unsigned)size)); 396 397 if (!(err = bus_space_map(sc->sc_iot, pa, size, 0, &pmh->memh))) 398 *windowp = (int)pmh->memh; 399 return err; 400 } 401 402 static void 403 eppcic_mem_unmap(pcmcia_chipset_handle_t pch, int window) 404 { 405 struct eppcic_handle *ph = (struct eppcic_handle *)pch; 406 struct eppcic_softc *sc = ph->ph_sc; 407 408 DPRINTFN(1, ("eppcic_mem_unmap: window=%#x\n",window)); 409 410 bus_space_unmap(sc->sc_iot, (bus_addr_t)window, 0x400); 411 } 412 413 static int 414 eppcic_io_alloc(pcmcia_chipset_handle_t pch, bus_addr_t start, bus_size_t size, 415 bus_size_t align, struct pcmcia_io_handle *pih) 416 { 417 struct eppcic_handle *ph = (struct eppcic_handle *)pch; 418 struct eppcic_softc *sc = ph->ph_sc; 419 bus_addr_t pa; 420 421 DPRINTFN(1, ("eppcic_io_alloc: start=%#x, size=%#x, align=%#x\n",(unsigned)start,(unsigned)size,(unsigned)align)); 422 423 pih->iot = sc->sc_iot; 424 pih->addr = start; 425 pih->size = size; 426 pa = pih->addr + ph->ph_space[IO].base; 427 return bus_space_map(sc->sc_iot, pa, size, 0, &pih->ioh); 428 } 429 430 static void 431 eppcic_io_free(pcmcia_chipset_handle_t pch, struct pcmcia_io_handle *pih) 432 { 433 struct eppcic_handle *ph = (struct eppcic_handle *)pch; 434 struct eppcic_softc *sc = ph->ph_sc; 435 436 DPRINTFN(1, ("eppcic_io_free\n")); 437 438 bus_space_unmap(sc->sc_iot, pih->ioh, pih->size); 439 } 440 441 static int 442 eppcic_io_map(pcmcia_chipset_handle_t pch, int width, bus_addr_t offset, 443 bus_size_t size, struct pcmcia_io_handle *pih, int *windowp) 444 { 445 struct eppcic_handle *ph = (struct eppcic_handle *)pch; 446 447 DPRINTFN(1, ("eppcic_io_map: offset=%#x, size=%#x, width=%d",(unsigned)offset,(unsigned)size,width)); 448 449 switch (width) { 450 case PCMCIA_WIDTH_IO8: 451 DPRINTFN(1, ("(8bit)\n")); 452 ph->ph_width = 8; 453 break; 454 case PCMCIA_WIDTH_IO16: 455 case PCMCIA_WIDTH_AUTO: /* I don't understand how I check it */ 456 DPRINTFN(1, ("(16bit)\n")); 457 ph->ph_width = 16; 458 break; 459 default: 460 DPRINTFN(1, ("(unknown)\n")); 461 return -1; 462 } 463 eppcic_set_pcreg(ph, ph->ph_space[IO].reg); 464 *windowp = 0; /* unused */ 465 return 0; 466 } 467 468 static void 469 eppcic_io_unmap(pcmcia_chipset_handle_t pch, int window) 470 { 471 DPRINTFN(1, ("eppcic_io_unmap: window=%#x\n",window)); 472 } 473 474 static void * 475 eppcic_intr_establish(pcmcia_chipset_handle_t pch, struct pcmcia_function *pf, 476 int ipl, int (*ih_func)(void *), void *ih_arg) 477 { 478 struct eppcic_handle *ph = (struct eppcic_handle *)pch; 479 struct eppcic_softc *sc = ph->ph_sc; 480 481 DPRINTFN(1, ("eppcic_intr_establish\n")); 482 483 if (ph->ph_ih_func) 484 return 0; 485 486 ph->ph_ih_func = ih_func; 487 ph->ph_ih_arg = ih_arg; 488 return epgpio_intr_establish(sc->sc_gpio, ph->ph_port, ph->ph_ireq, 489 LEVEL_SENSE | LOW_LEVEL, 490 ipl, eppcic_intr_socket, ph); 491 } 492 493 static void 494 eppcic_intr_disestablish(pcmcia_chipset_handle_t pch, void *ih) 495 { 496 struct eppcic_handle *ph = (struct eppcic_handle *)pch; 497 struct eppcic_softc *sc = ph->ph_sc; 498 499 DPRINTFN(1, ("eppcic_intr_disestablish\n")); 500 501 ph->ph_ih_func = NULL; 502 ph->ph_ih_arg = NULL; 503 epgpio_intr_disestablish(sc->sc_gpio, ph->ph_port, ph->ph_ireq); 504 } 505 506 static int 507 eppcic_intr_socket(void *arg) 508 { 509 struct eppcic_handle *ph = arg; 510 int err = 0; 511 512 if (ph->ph_ih_func) { 513 #if NEPLED > 0 514 epled_red_on(); 515 #endif 516 err = (*ph->ph_ih_func)(ph->ph_ih_arg); 517 #if NEPLED > 0 518 epled_red_off(); 519 #endif 520 } 521 return err; 522 } 523 524 525 static void 526 eppcic_socket_enable(pcmcia_chipset_handle_t pch) 527 { 528 struct eppcic_handle *ph = (struct eppcic_handle *)pch; 529 struct eppcic_softc *sc = ph->ph_sc; 530 eppcic_chipset_tag_t pcic = sc->sc_pcic; 531 int wait; 532 533 DPRINTFN(1, ("eppcic_socket_enable\n")); 534 535 wait = (pcic->power_ctl)(sc, ph->ph_socket, POWER_ON); 536 delay(wait); 537 #if NEPLED > 0 538 if (!sc->sc_enable++) 539 epled_green_on(); 540 #endif 541 ph->ph_vcc = eppcic_get_voltage(ph); 542 } 543 544 static void 545 eppcic_socket_disable(pcmcia_chipset_handle_t pch) 546 { 547 struct eppcic_handle *ph = (struct eppcic_handle *)pch; 548 struct eppcic_softc *sc = ph->ph_sc; 549 eppcic_chipset_tag_t pcic = sc->sc_pcic; 550 int wait; 551 552 DPRINTFN(1, ("eppcic_socket_disable\n")); 553 554 wait = (pcic->power_ctl)(sc, ph->ph_socket, POWER_OFF); 555 delay(wait); 556 #if NEPLED > 0 557 if (!--sc->sc_enable) 558 epled_green_off(); 559 #endif 560 } 561 562 static void 563 eppcic_socket_settype(pcmcia_chipset_handle_t pch, int type) 564 { 565 DPRINTFN(1, ("eppcic_socket_settype: type=%d",type)); 566 567 switch (type) { 568 case PCMCIA_IFTYPE_MEMORY: 569 DPRINTFN(1, ("(Memory)\n")); 570 break; 571 case PCMCIA_IFTYPE_IO: 572 DPRINTFN(1, ("(I/O)\n")); 573 break; 574 default: 575 DPRINTFN(1, ("(unknown)\n")); 576 return; 577 } 578 } 579 580 static int 581 eppcic_get_voltage(struct eppcic_handle *ph) 582 { 583 struct eppcic_softc *sc = ph->ph_sc; 584 eppcic_chipset_tag_t pcic = sc->sc_pcic; 585 int cap, vcc = 0; 586 587 cap = (pcic->power_capability)(sc, ph->ph_socket); 588 if (epgpio_read(sc->sc_gpio, ph->ph_port, ph->ph_vs[0])) { 589 if (cap | VCC_5V) 590 vcc = 5; 591 else 592 printf("%s: unsupported Vcc 5 Volts", 593 sc->sc_dev.dv_xname); 594 } else { 595 if (cap | VCC_3V) 596 vcc = 3; 597 else 598 printf("%s: unsupported Vcc 3.3 Volts", 599 sc->sc_dev.dv_xname); 600 } 601 DPRINTFN(1, ("eppcic_get_voltage: vs1=%d, vs2=%d (%dV)\n",epgpio_read_bit(sc->sc_gpio, ph->ph_port, ph->ph_vs[0]),epgpio_read_bit(sc->sc_gpio, ph->ph_port, ph->ph_vs[1]),vcc)); 602 return vcc; 603 } 604 605 #define EXTRA_DELAY 40 606 607 static void 608 eppcic_set_pcreg(struct eppcic_handle *ph, int kind) 609 { 610 struct eppcic_softc *sc = ph->ph_sc; 611 int atiming, htiming, ptiming; 612 int period = 1000000000 / sc->sc_hclk; 613 int width; 614 615 switch (ph->ph_width) { 616 case 8: 617 width = 0; 618 break; 619 case 16: 620 width = EP93XX_PCMCIA_WIDTH_16; 621 break; 622 default: 623 return; 624 } 625 switch (kind) { 626 case IO: 627 atiming = 165; htiming = 20; ptiming = 70; 628 break; 629 case COMMON: 630 #if linux_timing!=hamajima20050816 631 switch (ph->ph_vcc) { 632 case 3: 633 atiming = 465; htiming = 35; ptiming = 100; 634 break; 635 case 5: 636 atiming = 200; htiming = 20; ptiming = 30; 637 break; 638 default: 639 return; 640 } 641 break; 642 #endif 643 case ATTRIBUTE: 644 switch (ph->ph_vcc) { 645 case 3: 646 #if linux_timing!=hamajima20050816 647 atiming = 465; htiming = 35; ptiming = 100; 648 #else 649 atiming = 600; htiming = 35; ptiming = 100; 650 #endif 651 break; 652 case 5: 653 #if linux_timing!=hamajima20050816 654 atiming = 250; htiming = 20; ptiming = 30; 655 #else 656 atiming = 300; htiming = 20; ptiming = 30; 657 #endif 658 break; 659 default: 660 return; 661 } 662 break; 663 default: 664 return; 665 } 666 667 #if linux_timing!=hamajima20050816 668 period = 1000000000 / 50000000; 669 width = EP93XX_PCMCIA_WIDTH_16; 670 #endif 671 672 atiming = (atiming + EXTRA_DELAY) / period; 673 if (atiming>0xff) 674 atiming = 0xff; 675 htiming = ((htiming + EXTRA_DELAY) / period) + 1; 676 if (htiming>0xf) 677 htiming = 0xf; 678 ptiming = (ptiming + EXTRA_DELAY) / period; 679 if (ptiming>0xff) 680 ptiming = 0xff; 681 682 DPRINTFN(1, ("eppcic_set_pcreg: width=%d, access=%d, hold=%d, pre-charge=%d\n",ph->ph_width,atiming,htiming,ptiming)); 683 684 bus_space_write_4(sc->sc_iot, sc->sc_ioh, ph->ph_space[kind].reg, 685 width 686 | (atiming<<EP93XX_PCMCIA_ACCESS_SHIFT) 687 | (htiming<<EP93XX_PCMCIA_HOLD_SHIFT) 688 | (ptiming<<EP93XX_PCMCIA_PRECHARGE_SHIFT)); 689 } 690
Indexes created Tue Sep 30 07:10:03 GMT 2025