eppcic.c revision 1.5
1 /* $NetBSD: eppcic.c,v 1.5 2011/07/01 19:31:17 dyoung Exp $ */ 2 3 /* 4 * Copyright (c) 2005 HAMAJIMA Katsuomi. All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 */ 27 28 #include <sys/cdefs.h> 29 __KERNEL_RCSID(0, "$NetBSD: eppcic.c,v 1.5 2011/07/01 19:31:17 dyoung Exp $"); 30 31 #include <sys/param.h> 32 #include <sys/systm.h> 33 #include <sys/kernel.h> 34 #include <sys/malloc.h> 35 #include <sys/device.h> 36 #include <sys/kthread.h> 37 #include <uvm/uvm_param.h> 38 #include <sys/bus.h> 39 #include <dev/pcmcia/pcmciareg.h> 40 #include <dev/pcmcia/pcmciavar.h> 41 #include <dev/pcmcia/pcmciachip.h> 42 #include <arm/ep93xx/epsocvar.h> 43 #include <arm/ep93xx/epgpiovar.h> 44 #include <arm/ep93xx/eppcicvar.h> 45 #include <arm/ep93xx/ep93xxreg.h> 46 #include <arm/ep93xx/epsmcreg.h> 47 #include "epled.h" 48 #if NEPLED > 0 49 #include <arm/ep93xx/epledvar.h> 50 #endif 51 52 #include "epgpio.h" 53 #if NEPGPIO == 0 54 #error "epgpio requires in eppcic" 55 #endif 56 57 #ifdef EPPCIC_DEBUG 58 int eppcic_debug = EPPCIC_DEBUG; 59 #define DPRINTFN(n,x) if (eppcic_debug>(n)) printf x; 60 #else 61 #define DPRINTFN(n,x) 62 #endif 63 64 /* Mem & I/O */ 65 #define SOCKET0_MCCD1 1 /* pin36/pin26 (negative) Card Detect 1 */ 66 #define SOCKET0_MCCD2 2 /* pin67/pin25 (negative) Card Detect 2 */ 67 #define SOCKET0_VS1 5 /* pin33/pin43 (negative) Voltage Sense 1 */ 68 #define SOCKET0_VS2 7 /* pin57/pin40 (negative) Voltage Sense 2 */ 69 /* Memory */ 70 #define SOCKET0_WP 0 /* pin33/pin24 Write Protect */ 71 #define SOCKET0_MCBVD1 3 /* pin63/pin46 Battery Voltage Detect 1 */ 72 #define SOCKET0_MCBVD2 4 /* pin62/pin45 Battery Voltage Detect 2 */ 73 #define SOCKET0_READY 6 /* pin16/pin37 Ready */ 74 /* I/O */ 75 #define SOCKET0_STSCHG 3 /* pin63/pin46 (negative) Status Change */ 76 #define SOCKET0_SPKR 4 /* pin62/pin45 (negative) Speaker */ 77 #define SOCKET0_IREQ 6 /* pin16/pin37 Interrupt Request */ 78 79 struct eppcic_handle { 80 int ph_socket; /* socket number */ 81 struct eppcic_softc *ph_sc; 82 struct device *ph_card; 83 int (*ph_ih_func)(void *); 84 void *ph_ih_arg; 85 lwp_t *ph_event_thread; 86 int ph_run; /* ktread running */ 87 int ph_width; /* 8 or 16 */ 88 int ph_vcc; /* 3 or 5 */ 89 int ph_status[2]; /* cd1 and cd2 */ 90 int ph_port; /* GPIO port */ 91 int ph_cd[2]; /* card detect */ 92 int ph_vs[2]; /* voltage sense */ 93 int ph_ireq; /* interrupt request */ 94 struct { 95 bus_size_t reg; 96 bus_addr_t base; 97 bus_size_t size; 98 } ph_space[3]; 99 #define IO 0 100 #define COMMON 1 101 #define ATTRIBUTE 2 102 }; 103 104 static int eppcic_intr_carddetect(void *); 105 static int eppcic_intr_socket(void *); 106 static int eppcic_print(void *, const char *); 107 static void eppcic_event_thread(void *); 108 void eppcic_shutdown(void *); 109 110 static int eppcic_mem_alloc(pcmcia_chipset_handle_t, bus_size_t, 111 struct pcmcia_mem_handle *); 112 static void eppcic_mem_free(pcmcia_chipset_handle_t, 113 struct pcmcia_mem_handle *); 114 static int eppcic_mem_map(pcmcia_chipset_handle_t, int, bus_addr_t, bus_size_t, 115 struct pcmcia_mem_handle *, bus_size_t *, int *); 116 static void eppcic_mem_unmap(pcmcia_chipset_handle_t, int); 117 static int eppcic_io_alloc(pcmcia_chipset_handle_t, bus_addr_t, bus_size_t, 118 bus_size_t, struct pcmcia_io_handle *); 119 static void eppcic_io_free(pcmcia_chipset_handle_t, struct pcmcia_io_handle *); 120 static int eppcic_io_map(pcmcia_chipset_handle_t, int, bus_addr_t, bus_size_t, 121 struct pcmcia_io_handle *, int *); 122 static void eppcic_io_unmap(pcmcia_chipset_handle_t, int); 123 static void *eppcic_intr_establish(pcmcia_chipset_handle_t, 124 struct pcmcia_function *, 125 int, int (*)(void *), void *); 126 static void eppcic_intr_disestablish(pcmcia_chipset_handle_t, void *); 127 static void eppcic_socket_enable(pcmcia_chipset_handle_t); 128 static void eppcic_socket_disable(pcmcia_chipset_handle_t); 129 static void eppcic_socket_settype(pcmcia_chipset_handle_t, int); 130 131 static void eppcic_attach_socket(struct eppcic_handle *); 132 static void eppcic_config_socket(struct eppcic_handle *); 133 static int eppcic_get_voltage(struct eppcic_handle *); 134 static void eppcic_set_pcreg(struct eppcic_handle *, int); 135 136 static struct pcmcia_chip_functions eppcic_functions = { 137 eppcic_mem_alloc, eppcic_mem_free, 138 eppcic_mem_map, eppcic_mem_unmap, 139 eppcic_io_alloc, eppcic_io_free, 140 eppcic_io_map, eppcic_io_unmap, 141 eppcic_intr_establish, eppcic_intr_disestablish, 142 eppcic_socket_enable, eppcic_socket_disable, 143 eppcic_socket_settype 144 }; 145 146 void 147 eppcic_attach_common(struct device *parent, struct device *self, void *aux, 148 eppcic_chipset_tag_t pcic) 149 { 150 struct eppcic_softc *sc = (struct eppcic_softc *)self; 151 struct epsoc_attach_args *sa = aux; 152 struct eppcic_handle *ph; 153 int reg; 154 int i; 155 156 if (!sa->sa_gpio) { 157 printf("%s: epgpio requires\n", self->dv_xname); 158 return; 159 } 160 sc->sc_gpio = sa->sa_gpio; 161 sc->sc_iot = sa->sa_iot; 162 sc->sc_hclk = sa->sa_hclk; 163 sc->sc_pcic = pcic; 164 sc->sc_enable = 0; 165 if (bus_space_map(sa->sa_iot, sa->sa_addr, 166 sa->sa_size, 0, &sc->sc_ioh)){ 167 printf("%s: Cannot map registers\n", self->dv_xname); 168 return; 169 } 170 printf("\n"); 171 172 #if NEPLED > 0 173 epled_green_on(); 174 epled_red_off(); 175 #endif 176 /* socket 0 */ 177 if (!(ph = malloc(sizeof(struct eppcic_handle), M_DEVBUF, M_NOWAIT))) { 178 printf("%s: Cannot allocate memory\n", self->dv_xname); 179 return; /* ENOMEM */ 180 } 181 sc->sc_ph[0] = ph; 182 ph->ph_sc = sc; 183 ph->ph_socket = 0; 184 ph->ph_port = PORT_F; 185 ph->ph_cd[0] = SOCKET0_MCCD1; 186 ph->ph_cd[1] = SOCKET0_MCCD2; 187 ph->ph_vs[0] = SOCKET0_VS1; 188 ph->ph_vs[1] = SOCKET0_VS2; 189 ph->ph_ireq = SOCKET0_IREQ; 190 ph->ph_space[IO].reg = EP93XX_PCMCIA0_IO; 191 ph->ph_space[IO].base = EP93XX_PCMCIA0_HWBASE + EP93XX_PCMCIA_IO; 192 ph->ph_space[IO].size = EP93XX_PCMCIA_IO_SIZE; 193 ph->ph_space[COMMON].reg = EP93XX_PCMCIA0_Common; 194 ph->ph_space[COMMON].base = EP93XX_PCMCIA0_HWBASE 195 + EP93XX_PCMCIA_COMMON; 196 ph->ph_space[COMMON].size = EP93XX_PCMCIA_COMMON_SIZE; 197 ph->ph_space[ATTRIBUTE].reg = EP93XX_PCMCIA0_Attribute; 198 ph->ph_space[ATTRIBUTE].base = EP93XX_PCMCIA0_HWBASE 199 + EP93XX_PCMCIA_ATTRIBUTE; 200 ph->ph_space[ATTRIBUTE].size = EP93XX_PCMCIA_ATTRIBUTE_SIZE; 201 eppcic_attach_socket(ph); 202 203 reg = EP93XX_PCMCIA_WEN | (pcic->socket_type)(sc, 0); 204 bus_space_write_4(sc->sc_iot, sc->sc_ioh, EP93XX_PCMCIA_Ctrl, 205 EP93XX_PCMCIA_RST | reg); 206 delay(10); 207 bus_space_write_4(sc->sc_iot, sc->sc_ioh, EP93XX_PCMCIA_Ctrl, reg); 208 delay(500); 209 210 for (i = 0; i < EP93XX_PCMCIA_NSOCKET; i++) 211 eppcic_config_socket(sc->sc_ph[i]); 212 #if NEPLED > 0 213 epled_green_off(); 214 #endif 215 } 216 217 static void 218 eppcic_attach_socket(struct eppcic_handle *ph) 219 { 220 struct eppcic_softc *sc = ph->ph_sc; 221 222 ph->ph_width = 16; 223 ph->ph_vcc = 3; 224 ph->ph_event_thread = NULL; 225 ph->ph_run = 0; 226 ph->ph_ih_func = NULL; 227 ph->ph_ih_arg = NULL; 228 epgpio_in(sc->sc_gpio, ph->ph_port, ph->ph_cd[0]); 229 epgpio_in(sc->sc_gpio, ph->ph_port, ph->ph_cd[1]); 230 epgpio_in(sc->sc_gpio, ph->ph_port, ph->ph_vs[0]); 231 epgpio_in(sc->sc_gpio, ph->ph_port, ph->ph_vs[1]); 232 ph->ph_status[0] = epgpio_read(sc->sc_gpio, ph->ph_port, ph->ph_cd[0]); 233 ph->ph_status[1] = epgpio_read(sc->sc_gpio, ph->ph_port, ph->ph_cd[1]); 234 } 235 236 static void 237 eppcic_config_socket(struct eppcic_handle *ph) 238 { 239 struct eppcic_softc *sc = ph->ph_sc; 240 eppcic_chipset_tag_t pcic = sc->sc_pcic; 241 struct pcmciabus_attach_args paa; 242 int wait; 243 244 paa.paa_busname = "pcmcia"; 245 paa.pct = (pcmcia_chipset_tag_t)&eppcic_functions; 246 paa.pch = (pcmcia_chipset_handle_t)ph; 247 paa.iobase = ph->ph_space[IO].base; 248 paa.iosize = ph->ph_space[IO].size; 249 ph->ph_card = config_found_ia((void*)sc, "pcmciabus", &paa, 250 eppcic_print); 251 252 epgpio_intr_establish(sc->sc_gpio, ph->ph_port, ph->ph_cd[0], 253 EDGE_TRIGGER | FALLING_EDGE | DEBOUNCE, 254 IPL_TTY, eppcic_intr_carddetect, ph); 255 epgpio_intr_establish(sc->sc_gpio, ph->ph_port, ph->ph_cd[1], 256 EDGE_TRIGGER | RISING_EDGE | DEBOUNCE, 257 IPL_TTY, eppcic_intr_carddetect, ph); 258 wait = (pcic->power_ctl)(sc, ph->ph_socket, POWER_OFF); 259 delay(wait); 260 261 262 ph->ph_status[0] = epgpio_read(sc->sc_gpio, ph->ph_port, ph->ph_cd[0]); 263 ph->ph_status[1] = epgpio_read(sc->sc_gpio, ph->ph_port, ph->ph_cd[1]); 264 265 DPRINTFN(1, ("eppcic_config_socket: cd1=%d, cd2=%d\n",ph->ph_status[0],ph->ph_status[1])); 266 267 ph->ph_run = 1; 268 kthread_create(PRI_NONE, 0, NULL, eppcic_event_thread, ph, 269 &ph->ph_event_thread, "%s,%d", sc->sc_dev.dv_xname, 270 ph->ph_socket); 271 } 272 273 static int 274 eppcic_print(void *arg, const char *pnp) 275 { 276 return (UNCONF); 277 } 278 279 static void 280 eppcic_event_thread(void *arg) 281 { 282 struct eppcic_handle *ph = arg; 283 284 if (!(ph->ph_status[0] | ph->ph_status[1])) 285 pcmcia_card_attach(ph->ph_card); 286 287 for (;;) { 288 tsleep(ph, PWAIT, "CSC wait", 0); 289 if (!ph->ph_run) 290 break; 291 292 DPRINTFN(1, ("eppcic_event_thread: cd1=%d, cd2=%d\n",ph->ph_status[0],ph->ph_status[1])); 293 294 if (!ph->ph_status[0] && !ph->ph_status[1]) 295 pcmcia_card_attach(ph->ph_card); 296 else if (ph->ph_status[0] && ph->ph_status[1]) 297 pcmcia_card_detach(ph->ph_card, DETACH_FORCE); 298 } 299 300 DPRINTFN(1, ("eppcic_event_thread: run=%d\n",ph->ph_run)); 301 ph->ph_event_thread = NULL; 302 kthread_exit(0); 303 } 304 305 void 306 eppcic_shutdown(void *arg) 307 { 308 struct eppcic_handle *ph = arg; 309 310 DPRINTFN(1, ("eppcic_shutdown\n")); 311 ph->ph_run = 0; 312 wakeup(ph); 313 } 314 315 static int 316 eppcic_intr_carddetect(void *arg) 317 { 318 struct eppcic_handle *ph = arg; 319 struct eppcic_softc *sc = ph->ph_sc; 320 int nstatus[2]; 321 322 nstatus[0] = epgpio_read(sc->sc_gpio, ph->ph_port, ph->ph_cd[0]); 323 nstatus[1] = epgpio_read(sc->sc_gpio, ph->ph_port, ph->ph_cd[1]); 324 325 DPRINTFN(1, ("eppcic_intr: cd1=%#x, cd2=%#x\n",nstatus[0],nstatus[1])); 326 327 if (nstatus[0] != ph->ph_status[0] || nstatus[1] != ph->ph_status[1]) { 328 ph->ph_status[0] = nstatus[0]; 329 ph->ph_status[1] = nstatus[1]; 330 wakeup(ph); 331 } 332 return 0; 333 } 334 335 static int 336 eppcic_mem_alloc(pcmcia_chipset_handle_t pch, bus_size_t size, 337 struct pcmcia_mem_handle *pmh) 338 { 339 struct eppcic_handle *ph = (struct eppcic_handle *)pch; 340 struct eppcic_softc *sc = ph->ph_sc; 341 342 DPRINTFN(1, ("eppcic_mem_alloc: size=%#x\n",(unsigned)size)); 343 344 pmh->memt = sc->sc_iot; 345 return 0; 346 } 347 348 static void 349 eppcic_mem_free(pcmcia_chipset_handle_t pch, struct pcmcia_mem_handle *pmh) 350 { 351 DPRINTFN(1, ("eppcic_mem_free\n")); 352 } 353 354 static int 355 eppcic_mem_map(pcmcia_chipset_handle_t pch, int kind, bus_addr_t addr, 356 bus_size_t size, struct pcmcia_mem_handle *pmh, 357 bus_size_t *offsetp, int *windowp) 358 { 359 struct eppcic_handle *ph = (struct eppcic_handle *)pch; 360 struct eppcic_softc *sc = ph->ph_sc; 361 bus_addr_t pa; 362 int err; 363 364 DPRINTFN(1, ("eppcic_mem_map: kind=%d, addr=%#x, size=%#x\n",kind,(unsigned)addr,(unsigned)size)); 365 366 pa = addr; 367 *offsetp = 0; 368 size = round_page(size); 369 pmh->realsize = size; 370 if (kind & PCMCIA_WIDTH_MEM8) 371 ph->ph_width = 8; 372 else 373 ph->ph_width = 16; 374 switch (kind & ~PCMCIA_WIDTH_MEM_MASK) { 375 case PCMCIA_MEM_ATTR: 376 eppcic_set_pcreg(ph, ATTRIBUTE); 377 pa += ph->ph_space[ATTRIBUTE].base; 378 break; 379 case PCMCIA_MEM_COMMON: 380 eppcic_set_pcreg(ph, COMMON); 381 pa += ph->ph_space[COMMON].base; 382 break; 383 default: 384 return -1; 385 } 386 387 DPRINTFN(1, ("eppcic_mem_map: pa=%#x, *offsetp=%#x, size=%#x\n",(unsigned)pa,(unsigned)addr,(unsigned)size)); 388 389 if (!(err = bus_space_map(sc->sc_iot, pa, size, 0, &pmh->memh))) 390 *windowp = (int)pmh->memh; 391 return err; 392 } 393 394 static void 395 eppcic_mem_unmap(pcmcia_chipset_handle_t pch, int window) 396 { 397 struct eppcic_handle *ph = (struct eppcic_handle *)pch; 398 struct eppcic_softc *sc = ph->ph_sc; 399 400 DPRINTFN(1, ("eppcic_mem_unmap: window=%#x\n",window)); 401 402 bus_space_unmap(sc->sc_iot, (bus_addr_t)window, 0x400); 403 } 404 405 static int 406 eppcic_io_alloc(pcmcia_chipset_handle_t pch, bus_addr_t start, bus_size_t size, 407 bus_size_t align, struct pcmcia_io_handle *pih) 408 { 409 struct eppcic_handle *ph = (struct eppcic_handle *)pch; 410 struct eppcic_softc *sc = ph->ph_sc; 411 bus_addr_t pa; 412 413 DPRINTFN(1, ("eppcic_io_alloc: start=%#x, size=%#x, align=%#x\n",(unsigned)start,(unsigned)size,(unsigned)align)); 414 415 pih->iot = sc->sc_iot; 416 pih->addr = start; 417 pih->size = size; 418 pa = pih->addr + ph->ph_space[IO].base; 419 return bus_space_map(sc->sc_iot, pa, size, 0, &pih->ioh); 420 } 421 422 static void 423 eppcic_io_free(pcmcia_chipset_handle_t pch, struct pcmcia_io_handle *pih) 424 { 425 struct eppcic_handle *ph = (struct eppcic_handle *)pch; 426 struct eppcic_softc *sc = ph->ph_sc; 427 428 DPRINTFN(1, ("eppcic_io_free\n")); 429 430 bus_space_unmap(sc->sc_iot, pih->ioh, pih->size); 431 } 432 433 static int 434 eppcic_io_map(pcmcia_chipset_handle_t pch, int width, bus_addr_t offset, 435 bus_size_t size, struct pcmcia_io_handle *pih, int *windowp) 436 { 437 struct eppcic_handle *ph = (struct eppcic_handle *)pch; 438 439 DPRINTFN(1, ("eppcic_io_map: offset=%#x, size=%#x, width=%d",(unsigned)offset,(unsigned)size,width)); 440 441 switch (width) { 442 case PCMCIA_WIDTH_IO8: 443 DPRINTFN(1, ("(8bit)\n")); 444 ph->ph_width = 8; 445 break; 446 case PCMCIA_WIDTH_IO16: 447 case PCMCIA_WIDTH_AUTO: /* I don't understand how I check it */ 448 DPRINTFN(1, ("(16bit)\n")); 449 ph->ph_width = 16; 450 break; 451 default: 452 DPRINTFN(1, ("(unknown)\n")); 453 return -1; 454 } 455 eppcic_set_pcreg(ph, IO); 456 *windowp = 0; /* unused */ 457 return 0; 458 } 459 460 static void 461 eppcic_io_unmap(pcmcia_chipset_handle_t pch, int window) 462 { 463 DPRINTFN(1, ("eppcic_io_unmap: window=%#x\n",window)); 464 } 465 466 static void * 467 eppcic_intr_establish(pcmcia_chipset_handle_t pch, struct pcmcia_function *pf, 468 int ipl, int (*ih_func)(void *), void *ih_arg) 469 { 470 struct eppcic_handle *ph = (struct eppcic_handle *)pch; 471 struct eppcic_softc *sc = ph->ph_sc; 472 473 DPRINTFN(1, ("eppcic_intr_establish\n")); 474 475 if (ph->ph_ih_func) 476 return 0; 477 478 ph->ph_ih_func = ih_func; 479 ph->ph_ih_arg = ih_arg; 480 return epgpio_intr_establish(sc->sc_gpio, ph->ph_port, ph->ph_ireq, 481 LEVEL_SENSE | LOW_LEVEL, 482 ipl, eppcic_intr_socket, ph); 483 } 484 485 static void 486 eppcic_intr_disestablish(pcmcia_chipset_handle_t pch, void *ih) 487 { 488 struct eppcic_handle *ph = (struct eppcic_handle *)pch; 489 struct eppcic_softc *sc = ph->ph_sc; 490 491 DPRINTFN(1, ("eppcic_intr_disestablish\n")); 492 493 ph->ph_ih_func = NULL; 494 ph->ph_ih_arg = NULL; 495 epgpio_intr_disestablish(sc->sc_gpio, ph->ph_port, ph->ph_ireq); 496 } 497 498 static int 499 eppcic_intr_socket(void *arg) 500 { 501 struct eppcic_handle *ph = arg; 502 int err = 0; 503 504 if (ph->ph_ih_func) { 505 #if NEPLED > 0 506 epled_red_on(); 507 #endif 508 err = (*ph->ph_ih_func)(ph->ph_ih_arg); 509 #if NEPLED > 0 510 epled_red_off(); 511 #endif 512 } 513 return err; 514 } 515 516 517 static void 518 eppcic_socket_enable(pcmcia_chipset_handle_t pch) 519 { 520 struct eppcic_handle *ph = (struct eppcic_handle *)pch; 521 struct eppcic_softc *sc = ph->ph_sc; 522 eppcic_chipset_tag_t pcic = sc->sc_pcic; 523 int wait; 524 525 DPRINTFN(1, ("eppcic_socket_enable\n")); 526 527 wait = (pcic->power_ctl)(sc, ph->ph_socket, POWER_ON); 528 delay(wait); 529 #if NEPLED > 0 530 if (!sc->sc_enable++) 531 epled_green_on(); 532 #endif 533 ph->ph_vcc = eppcic_get_voltage(ph); 534 } 535 536 static void 537 eppcic_socket_disable(pcmcia_chipset_handle_t pch) 538 { 539 struct eppcic_handle *ph = (struct eppcic_handle *)pch; 540 struct eppcic_softc *sc = ph->ph_sc; 541 eppcic_chipset_tag_t pcic = sc->sc_pcic; 542 int wait; 543 544 DPRINTFN(1, ("eppcic_socket_disable\n")); 545 546 wait = (pcic->power_ctl)(sc, ph->ph_socket, POWER_OFF); 547 delay(wait); 548 #if NEPLED > 0 549 if (!--sc->sc_enable) 550 epled_green_off(); 551 #endif 552 } 553 554 static void 555 eppcic_socket_settype(pcmcia_chipset_handle_t pch, int type) 556 { 557 DPRINTFN(1, ("eppcic_socket_settype: type=%d",type)); 558 559 switch (type) { 560 case PCMCIA_IFTYPE_MEMORY: 561 DPRINTFN(1, ("(Memory)\n")); 562 break; 563 case PCMCIA_IFTYPE_IO: 564 DPRINTFN(1, ("(I/O)\n")); 565 break; 566 default: 567 DPRINTFN(1, ("(unknown)\n")); 568 return; 569 } 570 } 571 572 static int 573 eppcic_get_voltage(struct eppcic_handle *ph) 574 { 575 struct eppcic_softc *sc = ph->ph_sc; 576 eppcic_chipset_tag_t pcic = sc->sc_pcic; 577 int cap, vcc = 0; 578 579 cap = (pcic->power_capability)(sc, ph->ph_socket); 580 if (epgpio_read(sc->sc_gpio, ph->ph_port, ph->ph_vs[0])) { 581 if (cap | VCC_5V) 582 vcc = 5; 583 else 584 printf("%s: unsupported Vcc 5 Volts", 585 sc->sc_dev.dv_xname); 586 } else { 587 if (cap | VCC_3V) 588 vcc = 3; 589 else 590 printf("%s: unsupported Vcc 3.3 Volts", 591 sc->sc_dev.dv_xname); 592 } 593 DPRINTFN(1, ("eppcic_get_voltage: vs1=%d, vs2=%d (%dV)\n",epgpio_read_bit(sc->sc_gpio, ph->ph_port, ph->ph_vs[0]),epgpio_read_bit(sc->sc_gpio, ph->ph_port, ph->ph_vs[1]),vcc)); 594 return vcc; 595 } 596 597 #define EXTRA_DELAY 40 598 599 static void 600 eppcic_set_pcreg(struct eppcic_handle *ph, int kind) 601 { 602 struct eppcic_softc *sc = ph->ph_sc; 603 int atiming, htiming, ptiming; 604 int period = 1000000000 / sc->sc_hclk; 605 int width; 606 607 switch (ph->ph_width) { 608 case 8: 609 width = 0; 610 break; 611 case 16: 612 width = EP93XX_PCMCIA_WIDTH_16; 613 break; 614 default: 615 return; 616 } 617 switch (kind) { 618 case IO: 619 atiming = 165; htiming = 20; ptiming = 70; 620 break; 621 case COMMON: 622 #if linux_timing!=hamajima20050816 623 switch (ph->ph_vcc) { 624 case 3: 625 atiming = 465; htiming = 35; ptiming = 100; 626 break; 627 case 5: 628 atiming = 200; htiming = 20; ptiming = 30; 629 break; 630 default: 631 return; 632 } 633 break; 634 #endif 635 case ATTRIBUTE: 636 switch (ph->ph_vcc) { 637 case 3: 638 #if linux_timing!=hamajima20050816 639 atiming = 465; htiming = 35; ptiming = 100; 640 #else 641 atiming = 600; htiming = 35; ptiming = 100; 642 #endif 643 break; 644 case 5: 645 #if linux_timing!=hamajima20050816 646 atiming = 250; htiming = 20; ptiming = 30; 647 #else 648 atiming = 300; htiming = 20; ptiming = 30; 649 #endif 650 break; 651 default: 652 return; 653 } 654 break; 655 default: 656 return; 657 } 658 659 #if linux_timing!=hamajima20050816 660 period = 1000000000 / 50000000; 661 width = EP93XX_PCMCIA_WIDTH_16; 662 #endif 663 664 atiming = (atiming + EXTRA_DELAY) / period; 665 if (atiming>0xff) 666 atiming = 0xff; 667 htiming = ((htiming + EXTRA_DELAY) / period) + 1; 668 if (htiming>0xf) 669 htiming = 0xf; 670 ptiming = (ptiming + EXTRA_DELAY) / period; 671 if (ptiming>0xff) 672 ptiming = 0xff; 673 674 DPRINTFN(1, ("eppcic_set_pcreg: width=%d, access=%d, hold=%d, pre-charge=%d\n",ph->ph_width,atiming,htiming,ptiming)); 675 676 bus_space_write_4(sc->sc_iot, sc->sc_ioh, ph->ph_space[kind].reg, 677 width 678 | (atiming<<EP93XX_PCMCIA_ACCESS_SHIFT) 679 | (htiming<<EP93XX_PCMCIA_HOLD_SHIFT) 680 | (ptiming<<EP93XX_PCMCIA_PRECHARGE_SHIFT)); 681 tsleep(ph->ph_space, PWAIT, "eppcic_set_pcreg", hz / 4); 682 } 683
Indexes created Tue Sep 30 17:09:57 GMT 2025