eppcic.c revision 1.7
1 /* $NetBSD: eppcic.c,v 1.7 2012/10/27 17:17:37 chs Exp $ */ 2 3 /* 4 * Copyright (c) 2005 HAMAJIMA Katsuomi. All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 */ 27 28 #include <sys/cdefs.h> 29 __KERNEL_RCSID(0, "$NetBSD: eppcic.c,v 1.7 2012/10/27 17:17:37 chs Exp $"); 30 31 #include <sys/param.h> 32 #include <sys/systm.h> 33 #include <sys/kernel.h> 34 #include <sys/malloc.h> 35 #include <sys/device.h> 36 #include <sys/kthread.h> 37 #include <uvm/uvm_param.h> 38 #include <sys/bus.h> 39 #include <dev/pcmcia/pcmciareg.h> 40 #include <dev/pcmcia/pcmciavar.h> 41 #include <dev/pcmcia/pcmciachip.h> 42 #include <arm/ep93xx/epsocvar.h> 43 #include <arm/ep93xx/epgpiovar.h> 44 #include <arm/ep93xx/eppcicvar.h> 45 #include <arm/ep93xx/ep93xxreg.h> 46 #include <arm/ep93xx/epsmcreg.h> 47 #include "epled.h" 48 #if NEPLED > 0 49 #include <arm/ep93xx/epledvar.h> 50 #endif 51 52 #include "epgpio.h" 53 #if NEPGPIO == 0 54 #error "epgpio requires in eppcic" 55 #endif 56 57 #ifdef EPPCIC_DEBUG 58 int eppcic_debug = EPPCIC_DEBUG; 59 #define DPRINTFN(n,x) if (eppcic_debug>(n)) printf x; 60 #else 61 #define DPRINTFN(n,x) 62 #endif 63 64 /* Mem & I/O */ 65 #define SOCKET0_MCCD1 1 /* pin36/pin26 (negative) Card Detect 1 */ 66 #define SOCKET0_MCCD2 2 /* pin67/pin25 (negative) Card Detect 2 */ 67 #define SOCKET0_VS1 5 /* pin33/pin43 (negative) Voltage Sense 1 */ 68 #define SOCKET0_VS2 7 /* pin57/pin40 (negative) Voltage Sense 2 */ 69 /* Memory */ 70 #define SOCKET0_WP 0 /* pin33/pin24 Write Protect */ 71 #define SOCKET0_MCBVD1 3 /* pin63/pin46 Battery Voltage Detect 1 */ 72 #define SOCKET0_MCBVD2 4 /* pin62/pin45 Battery Voltage Detect 2 */ 73 #define SOCKET0_READY 6 /* pin16/pin37 Ready */ 74 /* I/O */ 75 #define SOCKET0_STSCHG 3 /* pin63/pin46 (negative) Status Change */ 76 #define SOCKET0_SPKR 4 /* pin62/pin45 (negative) Speaker */ 77 #define SOCKET0_IREQ 6 /* pin16/pin37 Interrupt Request */ 78 79 struct eppcic_handle { 80 int ph_socket; /* socket number */ 81 struct eppcic_softc *ph_sc; 82 device_t ph_card; 83 int (*ph_ih_func)(void *); 84 void *ph_ih_arg; 85 lwp_t *ph_event_thread; 86 int ph_run; /* ktread running */ 87 int ph_width; /* 8 or 16 */ 88 int ph_vcc; /* 3 or 5 */ 89 int ph_status[2]; /* cd1 and cd2 */ 90 int ph_port; /* GPIO port */ 91 int ph_cd[2]; /* card detect */ 92 int ph_vs[2]; /* voltage sense */ 93 int ph_ireq; /* interrupt request */ 94 struct { 95 bus_size_t reg; 96 bus_addr_t base; 97 bus_size_t size; 98 } ph_space[3]; 99 #define IO 0 100 #define COMMON 1 101 #define ATTRIBUTE 2 102 }; 103 104 static int eppcic_intr_carddetect(void *); 105 static int eppcic_intr_socket(void *); 106 static int eppcic_print(void *, const char *); 107 static void eppcic_event_thread(void *); 108 void eppcic_shutdown(void *); 109 110 static int eppcic_mem_alloc(pcmcia_chipset_handle_t, bus_size_t, 111 struct pcmcia_mem_handle *); 112 static void eppcic_mem_free(pcmcia_chipset_handle_t, 113 struct pcmcia_mem_handle *); 114 static int eppcic_mem_map(pcmcia_chipset_handle_t, int, bus_addr_t, bus_size_t, 115 struct pcmcia_mem_handle *, bus_size_t *, int *); 116 static void eppcic_mem_unmap(pcmcia_chipset_handle_t, int); 117 static int eppcic_io_alloc(pcmcia_chipset_handle_t, bus_addr_t, bus_size_t, 118 bus_size_t, struct pcmcia_io_handle *); 119 static void eppcic_io_free(pcmcia_chipset_handle_t, struct pcmcia_io_handle *); 120 static int eppcic_io_map(pcmcia_chipset_handle_t, int, bus_addr_t, bus_size_t, 121 struct pcmcia_io_handle *, int *); 122 static void eppcic_io_unmap(pcmcia_chipset_handle_t, int); 123 static void *eppcic_intr_establish(pcmcia_chipset_handle_t, 124 struct pcmcia_function *, 125 int, int (*)(void *), void *); 126 static void eppcic_intr_disestablish(pcmcia_chipset_handle_t, void *); 127 static void eppcic_socket_enable(pcmcia_chipset_handle_t); 128 static void eppcic_socket_disable(pcmcia_chipset_handle_t); 129 static void eppcic_socket_settype(pcmcia_chipset_handle_t, int); 130 131 static void eppcic_attach_socket(struct eppcic_handle *); 132 static void eppcic_config_socket(struct eppcic_handle *); 133 static int eppcic_get_voltage(struct eppcic_handle *); 134 static void eppcic_set_pcreg(struct eppcic_handle *, int); 135 136 static struct pcmcia_chip_functions eppcic_functions = { 137 eppcic_mem_alloc, eppcic_mem_free, 138 eppcic_mem_map, eppcic_mem_unmap, 139 eppcic_io_alloc, eppcic_io_free, 140 eppcic_io_map, eppcic_io_unmap, 141 eppcic_intr_establish, eppcic_intr_disestablish, 142 eppcic_socket_enable, eppcic_socket_disable, 143 eppcic_socket_settype 144 }; 145 146 void 147 eppcic_attach_common(device_t parent, device_t self, void *aux, 148 eppcic_chipset_tag_t pcic) 149 { 150 struct eppcic_softc *sc = device_private(self); 151 struct epsoc_attach_args *sa = aux; 152 struct eppcic_handle *ph; 153 int reg; 154 int i; 155 156 if (!sa->sa_gpio) { 157 printf("%s: epgpio requires\n", device_xname(self)); 158 return; 159 } 160 sc->sc_dev = self; 161 sc->sc_gpio = sa->sa_gpio; 162 sc->sc_iot = sa->sa_iot; 163 sc->sc_hclk = sa->sa_hclk; 164 sc->sc_pcic = pcic; 165 sc->sc_enable = 0; 166 if (bus_space_map(sa->sa_iot, sa->sa_addr, 167 sa->sa_size, 0, &sc->sc_ioh)){ 168 printf("%s: Cannot map registers\n", device_xname(self)); 169 return; 170 } 171 printf("\n"); 172 173 #if NEPLED > 0 174 epled_green_on(); 175 epled_red_off(); 176 #endif 177 /* socket 0 */ 178 if (!(ph = malloc(sizeof(struct eppcic_handle), M_DEVBUF, M_NOWAIT))) { 179 printf("%s: Cannot allocate memory\n", device_xname(self)); 180 return; /* ENOMEM */ 181 } 182 sc->sc_ph[0] = ph; 183 ph->ph_sc = sc; 184 ph->ph_socket = 0; 185 ph->ph_port = PORT_F; 186 ph->ph_cd[0] = SOCKET0_MCCD1; 187 ph->ph_cd[1] = SOCKET0_MCCD2; 188 ph->ph_vs[0] = SOCKET0_VS1; 189 ph->ph_vs[1] = SOCKET0_VS2; 190 ph->ph_ireq = SOCKET0_IREQ; 191 ph->ph_space[IO].reg = EP93XX_PCMCIA0_IO; 192 ph->ph_space[IO].base = EP93XX_PCMCIA0_HWBASE + EP93XX_PCMCIA_IO; 193 ph->ph_space[IO].size = EP93XX_PCMCIA_IO_SIZE; 194 ph->ph_space[COMMON].reg = EP93XX_PCMCIA0_Common; 195 ph->ph_space[COMMON].base = EP93XX_PCMCIA0_HWBASE 196 + EP93XX_PCMCIA_COMMON; 197 ph->ph_space[COMMON].size = EP93XX_PCMCIA_COMMON_SIZE; 198 ph->ph_space[ATTRIBUTE].reg = EP93XX_PCMCIA0_Attribute; 199 ph->ph_space[ATTRIBUTE].base = EP93XX_PCMCIA0_HWBASE 200 + EP93XX_PCMCIA_ATTRIBUTE; 201 ph->ph_space[ATTRIBUTE].size = EP93XX_PCMCIA_ATTRIBUTE_SIZE; 202 eppcic_attach_socket(ph); 203 204 reg = EP93XX_PCMCIA_WEN | (pcic->socket_type)(sc, 0); 205 bus_space_write_4(sc->sc_iot, sc->sc_ioh, EP93XX_PCMCIA_Ctrl, 206 EP93XX_PCMCIA_RST | reg); 207 delay(10); 208 bus_space_write_4(sc->sc_iot, sc->sc_ioh, EP93XX_PCMCIA_Ctrl, reg); 209 delay(500); 210 211 for (i = 0; i < EP93XX_PCMCIA_NSOCKET; i++) 212 eppcic_config_socket(sc->sc_ph[i]); 213 #if NEPLED > 0 214 epled_green_off(); 215 #endif 216 } 217 218 static void 219 eppcic_attach_socket(struct eppcic_handle *ph) 220 { 221 struct eppcic_softc *sc = ph->ph_sc; 222 223 ph->ph_width = 16; 224 ph->ph_vcc = 3; 225 ph->ph_event_thread = NULL; 226 ph->ph_run = 0; 227 ph->ph_ih_func = NULL; 228 ph->ph_ih_arg = NULL; 229 epgpio_in(sc->sc_gpio, ph->ph_port, ph->ph_cd[0]); 230 epgpio_in(sc->sc_gpio, ph->ph_port, ph->ph_cd[1]); 231 epgpio_in(sc->sc_gpio, ph->ph_port, ph->ph_vs[0]); 232 epgpio_in(sc->sc_gpio, ph->ph_port, ph->ph_vs[1]); 233 ph->ph_status[0] = epgpio_read(sc->sc_gpio, ph->ph_port, ph->ph_cd[0]); 234 ph->ph_status[1] = epgpio_read(sc->sc_gpio, ph->ph_port, ph->ph_cd[1]); 235 } 236 237 static void 238 eppcic_config_socket(struct eppcic_handle *ph) 239 { 240 struct eppcic_softc *sc = ph->ph_sc; 241 eppcic_chipset_tag_t pcic = sc->sc_pcic; 242 struct pcmciabus_attach_args paa; 243 int wait; 244 245 paa.paa_busname = "pcmcia"; 246 paa.pct = (pcmcia_chipset_tag_t)&eppcic_functions; 247 paa.pch = (pcmcia_chipset_handle_t)ph; 248 ph->ph_card = config_found_ia((void*)sc, "pcmciabus", &paa, 249 eppcic_print); 250 251 epgpio_intr_establish(sc->sc_gpio, ph->ph_port, ph->ph_cd[0], 252 EDGE_TRIGGER | FALLING_EDGE | DEBOUNCE, 253 IPL_TTY, eppcic_intr_carddetect, ph); 254 epgpio_intr_establish(sc->sc_gpio, ph->ph_port, ph->ph_cd[1], 255 EDGE_TRIGGER | RISING_EDGE | DEBOUNCE, 256 IPL_TTY, eppcic_intr_carddetect, ph); 257 wait = (pcic->power_ctl)(sc, ph->ph_socket, POWER_OFF); 258 delay(wait); 259 260 261 ph->ph_status[0] = epgpio_read(sc->sc_gpio, ph->ph_port, ph->ph_cd[0]); 262 ph->ph_status[1] = epgpio_read(sc->sc_gpio, ph->ph_port, ph->ph_cd[1]); 263 264 DPRINTFN(1, ("eppcic_config_socket: cd1=%d, cd2=%d\n",ph->ph_status[0],ph->ph_status[1])); 265 266 ph->ph_run = 1; 267 kthread_create(PRI_NONE, 0, NULL, eppcic_event_thread, ph, 268 &ph->ph_event_thread, "%s,%d", device_xname(sc->sc_dev), 269 ph->ph_socket); 270 } 271 272 static int 273 eppcic_print(void *arg, const char *pnp) 274 { 275 return (UNCONF); 276 } 277 278 static void 279 eppcic_event_thread(void *arg) 280 { 281 struct eppcic_handle *ph = arg; 282 283 if (!(ph->ph_status[0] | ph->ph_status[1])) 284 pcmcia_card_attach(ph->ph_card); 285 286 for (;;) { 287 tsleep(ph, PWAIT, "CSC wait", 0); 288 if (!ph->ph_run) 289 break; 290 291 DPRINTFN(1, ("eppcic_event_thread: cd1=%d, cd2=%d\n",ph->ph_status[0],ph->ph_status[1])); 292 293 if (!ph->ph_status[0] && !ph->ph_status[1]) 294 pcmcia_card_attach(ph->ph_card); 295 else if (ph->ph_status[0] && ph->ph_status[1]) 296 pcmcia_card_detach(ph->ph_card, DETACH_FORCE); 297 } 298 299 DPRINTFN(1, ("eppcic_event_thread: run=%d\n",ph->ph_run)); 300 ph->ph_event_thread = NULL; 301 kthread_exit(0); 302 } 303 304 void 305 eppcic_shutdown(void *arg) 306 { 307 struct eppcic_handle *ph = arg; 308 309 DPRINTFN(1, ("eppcic_shutdown\n")); 310 ph->ph_run = 0; 311 wakeup(ph); 312 } 313 314 static int 315 eppcic_intr_carddetect(void *arg) 316 { 317 struct eppcic_handle *ph = arg; 318 struct eppcic_softc *sc = ph->ph_sc; 319 int nstatus[2]; 320 321 nstatus[0] = epgpio_read(sc->sc_gpio, ph->ph_port, ph->ph_cd[0]); 322 nstatus[1] = epgpio_read(sc->sc_gpio, ph->ph_port, ph->ph_cd[1]); 323 324 DPRINTFN(1, ("eppcic_intr: cd1=%#x, cd2=%#x\n",nstatus[0],nstatus[1])); 325 326 if (nstatus[0] != ph->ph_status[0] || nstatus[1] != ph->ph_status[1]) { 327 ph->ph_status[0] = nstatus[0]; 328 ph->ph_status[1] = nstatus[1]; 329 wakeup(ph); 330 } 331 return 0; 332 } 333 334 static int 335 eppcic_mem_alloc(pcmcia_chipset_handle_t pch, bus_size_t size, 336 struct pcmcia_mem_handle *pmh) 337 { 338 struct eppcic_handle *ph = (struct eppcic_handle *)pch; 339 struct eppcic_softc *sc = ph->ph_sc; 340 341 DPRINTFN(1, ("eppcic_mem_alloc: size=%#x\n",(unsigned)size)); 342 343 pmh->memt = sc->sc_iot; 344 return 0; 345 } 346 347 static void 348 eppcic_mem_free(pcmcia_chipset_handle_t pch, struct pcmcia_mem_handle *pmh) 349 { 350 DPRINTFN(1, ("eppcic_mem_free\n")); 351 } 352 353 static int 354 eppcic_mem_map(pcmcia_chipset_handle_t pch, int kind, bus_addr_t addr, 355 bus_size_t size, struct pcmcia_mem_handle *pmh, 356 bus_size_t *offsetp, int *windowp) 357 { 358 struct eppcic_handle *ph = (struct eppcic_handle *)pch; 359 struct eppcic_softc *sc = ph->ph_sc; 360 bus_addr_t pa; 361 int err; 362 363 DPRINTFN(1, ("eppcic_mem_map: kind=%d, addr=%#x, size=%#x\n",kind,(unsigned)addr,(unsigned)size)); 364 365 pa = addr; 366 *offsetp = 0; 367 size = round_page(size); 368 pmh->realsize = size; 369 if (kind & PCMCIA_WIDTH_MEM8) 370 ph->ph_width = 8; 371 else 372 ph->ph_width = 16; 373 switch (kind & ~PCMCIA_WIDTH_MEM_MASK) { 374 case PCMCIA_MEM_ATTR: 375 eppcic_set_pcreg(ph, ATTRIBUTE); 376 pa += ph->ph_space[ATTRIBUTE].base; 377 break; 378 case PCMCIA_MEM_COMMON: 379 eppcic_set_pcreg(ph, COMMON); 380 pa += ph->ph_space[COMMON].base; 381 break; 382 default: 383 return -1; 384 } 385 386 DPRINTFN(1, ("eppcic_mem_map: pa=%#x, *offsetp=%#x, size=%#x\n",(unsigned)pa,(unsigned)addr,(unsigned)size)); 387 388 if (!(err = bus_space_map(sc->sc_iot, pa, size, 0, &pmh->memh))) 389 *windowp = (int)pmh->memh; 390 return err; 391 } 392 393 static void 394 eppcic_mem_unmap(pcmcia_chipset_handle_t pch, int window) 395 { 396 struct eppcic_handle *ph = (struct eppcic_handle *)pch; 397 struct eppcic_softc *sc = ph->ph_sc; 398 399 DPRINTFN(1, ("eppcic_mem_unmap: window=%#x\n",window)); 400 401 bus_space_unmap(sc->sc_iot, (bus_addr_t)window, 0x400); 402 } 403 404 static int 405 eppcic_io_alloc(pcmcia_chipset_handle_t pch, bus_addr_t start, bus_size_t size, 406 bus_size_t align, struct pcmcia_io_handle *pih) 407 { 408 struct eppcic_handle *ph = (struct eppcic_handle *)pch; 409 struct eppcic_softc *sc = ph->ph_sc; 410 bus_addr_t pa; 411 412 DPRINTFN(1, ("eppcic_io_alloc: start=%#x, size=%#x, align=%#x\n",(unsigned)start,(unsigned)size,(unsigned)align)); 413 414 pih->iot = sc->sc_iot; 415 pih->addr = start; 416 pih->size = size; 417 pa = pih->addr + ph->ph_space[IO].base; 418 return bus_space_map(sc->sc_iot, pa, size, 0, &pih->ioh); 419 } 420 421 static void 422 eppcic_io_free(pcmcia_chipset_handle_t pch, struct pcmcia_io_handle *pih) 423 { 424 struct eppcic_handle *ph = (struct eppcic_handle *)pch; 425 struct eppcic_softc *sc = ph->ph_sc; 426 427 DPRINTFN(1, ("eppcic_io_free\n")); 428 429 bus_space_unmap(sc->sc_iot, pih->ioh, pih->size); 430 } 431 432 static int 433 eppcic_io_map(pcmcia_chipset_handle_t pch, int width, bus_addr_t offset, 434 bus_size_t size, struct pcmcia_io_handle *pih, int *windowp) 435 { 436 struct eppcic_handle *ph = (struct eppcic_handle *)pch; 437 438 DPRINTFN(1, ("eppcic_io_map: offset=%#x, size=%#x, width=%d",(unsigned)offset,(unsigned)size,width)); 439 440 switch (width) { 441 case PCMCIA_WIDTH_IO8: 442 DPRINTFN(1, ("(8bit)\n")); 443 ph->ph_width = 8; 444 break; 445 case PCMCIA_WIDTH_IO16: 446 case PCMCIA_WIDTH_AUTO: /* I don't understand how I check it */ 447 DPRINTFN(1, ("(16bit)\n")); 448 ph->ph_width = 16; 449 break; 450 default: 451 DPRINTFN(1, ("(unknown)\n")); 452 return -1; 453 } 454 eppcic_set_pcreg(ph, IO); 455 *windowp = 0; /* unused */ 456 return 0; 457 } 458 459 static void 460 eppcic_io_unmap(pcmcia_chipset_handle_t pch, int window) 461 { 462 DPRINTFN(1, ("eppcic_io_unmap: window=%#x\n",window)); 463 } 464 465 static void * 466 eppcic_intr_establish(pcmcia_chipset_handle_t pch, struct pcmcia_function *pf, 467 int ipl, int (*ih_func)(void *), void *ih_arg) 468 { 469 struct eppcic_handle *ph = (struct eppcic_handle *)pch; 470 struct eppcic_softc *sc = ph->ph_sc; 471 472 DPRINTFN(1, ("eppcic_intr_establish\n")); 473 474 if (ph->ph_ih_func) 475 return 0; 476 477 ph->ph_ih_func = ih_func; 478 ph->ph_ih_arg = ih_arg; 479 return epgpio_intr_establish(sc->sc_gpio, ph->ph_port, ph->ph_ireq, 480 LEVEL_SENSE | LOW_LEVEL, 481 ipl, eppcic_intr_socket, ph); 482 } 483 484 static void 485 eppcic_intr_disestablish(pcmcia_chipset_handle_t pch, void *ih) 486 { 487 struct eppcic_handle *ph = (struct eppcic_handle *)pch; 488 struct eppcic_softc *sc = ph->ph_sc; 489 490 DPRINTFN(1, ("eppcic_intr_disestablish\n")); 491 492 ph->ph_ih_func = NULL; 493 ph->ph_ih_arg = NULL; 494 epgpio_intr_disestablish(sc->sc_gpio, ph->ph_port, ph->ph_ireq); 495 } 496 497 static int 498 eppcic_intr_socket(void *arg) 499 { 500 struct eppcic_handle *ph = arg; 501 int err = 0; 502 503 if (ph->ph_ih_func) { 504 #if NEPLED > 0 505 epled_red_on(); 506 #endif 507 err = (*ph->ph_ih_func)(ph->ph_ih_arg); 508 #if NEPLED > 0 509 epled_red_off(); 510 #endif 511 } 512 return err; 513 } 514 515 516 static void 517 eppcic_socket_enable(pcmcia_chipset_handle_t pch) 518 { 519 struct eppcic_handle *ph = (struct eppcic_handle *)pch; 520 struct eppcic_softc *sc = ph->ph_sc; 521 eppcic_chipset_tag_t pcic = sc->sc_pcic; 522 int wait; 523 524 DPRINTFN(1, ("eppcic_socket_enable\n")); 525 526 wait = (pcic->power_ctl)(sc, ph->ph_socket, POWER_ON); 527 delay(wait); 528 #if NEPLED > 0 529 if (!sc->sc_enable++) 530 epled_green_on(); 531 #endif 532 ph->ph_vcc = eppcic_get_voltage(ph); 533 } 534 535 static void 536 eppcic_socket_disable(pcmcia_chipset_handle_t pch) 537 { 538 struct eppcic_handle *ph = (struct eppcic_handle *)pch; 539 struct eppcic_softc *sc = ph->ph_sc; 540 eppcic_chipset_tag_t pcic = sc->sc_pcic; 541 int wait; 542 543 DPRINTFN(1, ("eppcic_socket_disable\n")); 544 545 wait = (pcic->power_ctl)(sc, ph->ph_socket, POWER_OFF); 546 delay(wait); 547 #if NEPLED > 0 548 if (!--sc->sc_enable) 549 epled_green_off(); 550 #endif 551 } 552 553 static void 554 eppcic_socket_settype(pcmcia_chipset_handle_t pch, int type) 555 { 556 DPRINTFN(1, ("eppcic_socket_settype: type=%d",type)); 557 558 switch (type) { 559 case PCMCIA_IFTYPE_MEMORY: 560 DPRINTFN(1, ("(Memory)\n")); 561 break; 562 case PCMCIA_IFTYPE_IO: 563 DPRINTFN(1, ("(I/O)\n")); 564 break; 565 default: 566 DPRINTFN(1, ("(unknown)\n")); 567 return; 568 } 569 } 570 571 static int 572 eppcic_get_voltage(struct eppcic_handle *ph) 573 { 574 struct eppcic_softc *sc = ph->ph_sc; 575 eppcic_chipset_tag_t pcic = sc->sc_pcic; 576 int cap, vcc = 0; 577 578 cap = (pcic->power_capability)(sc, ph->ph_socket); 579 if (epgpio_read(sc->sc_gpio, ph->ph_port, ph->ph_vs[0])) { 580 if (cap | VCC_5V) 581 vcc = 5; 582 else 583 printf("%s: unsupported Vcc 5 Volts", 584 device_xname(sc->sc_dev)); 585 } else { 586 if (cap | VCC_3V) 587 vcc = 3; 588 else 589 printf("%s: unsupported Vcc 3.3 Volts", 590 device_xname(sc->sc_dev)); 591 } 592 DPRINTFN(1, ("eppcic_get_voltage: vs1=%d, vs2=%d (%dV)\n",epgpio_read_bit(sc->sc_gpio, ph->ph_port, ph->ph_vs[0]),epgpio_read_bit(sc->sc_gpio, ph->ph_port, ph->ph_vs[1]),vcc)); 593 return vcc; 594 } 595 596 #define EXTRA_DELAY 40 597 598 static void 599 eppcic_set_pcreg(struct eppcic_handle *ph, int kind) 600 { 601 struct eppcic_softc *sc = ph->ph_sc; 602 int atiming, htiming, ptiming; 603 int period = 1000000000 / sc->sc_hclk; 604 int width; 605 606 switch (ph->ph_width) { 607 case 8: 608 width = 0; 609 break; 610 case 16: 611 width = EP93XX_PCMCIA_WIDTH_16; 612 break; 613 default: 614 return; 615 } 616 switch (kind) { 617 case IO: 618 atiming = 165; htiming = 20; ptiming = 70; 619 break; 620 case COMMON: 621 #if linux_timing!=hamajima20050816 622 switch (ph->ph_vcc) { 623 case 3: 624 atiming = 465; htiming = 35; ptiming = 100; 625 break; 626 case 5: 627 atiming = 200; htiming = 20; ptiming = 30; 628 break; 629 default: 630 return; 631 } 632 break; 633 #endif 634 case ATTRIBUTE: 635 switch (ph->ph_vcc) { 636 case 3: 637 #if linux_timing!=hamajima20050816 638 atiming = 465; htiming = 35; ptiming = 100; 639 #else 640 atiming = 600; htiming = 35; ptiming = 100; 641 #endif 642 break; 643 case 5: 644 #if linux_timing!=hamajima20050816 645 atiming = 250; htiming = 20; ptiming = 30; 646 #else 647 atiming = 300; htiming = 20; ptiming = 30; 648 #endif 649 break; 650 default: 651 return; 652 } 653 break; 654 default: 655 return; 656 } 657 658 #if linux_timing!=hamajima20050816 659 period = 1000000000 / 50000000; 660 width = EP93XX_PCMCIA_WIDTH_16; 661 #endif 662 663 atiming = (atiming + EXTRA_DELAY) / period; 664 if (atiming>0xff) 665 atiming = 0xff; 666 htiming = ((htiming + EXTRA_DELAY) / period) + 1; 667 if (htiming>0xf) 668 htiming = 0xf; 669 ptiming = (ptiming + EXTRA_DELAY) / period; 670 if (ptiming>0xff) 671 ptiming = 0xff; 672 673 DPRINTFN(1, ("eppcic_set_pcreg: width=%d, access=%d, hold=%d, pre-charge=%d\n",ph->ph_width,atiming,htiming,ptiming)); 674 675 bus_space_write_4(sc->sc_iot, sc->sc_ioh, ph->ph_space[kind].reg, 676 width 677 | (atiming<<EP93XX_PCMCIA_ACCESS_SHIFT) 678 | (htiming<<EP93XX_PCMCIA_HOLD_SHIFT) 679 | (ptiming<<EP93XX_PCMCIA_PRECHARGE_SHIFT)); 680 tsleep(ph->ph_space, PWAIT, "eppcic_set_pcreg", hz / 4); 681 } 682
Indexes created Tue Sep 30 11:09:46 GMT 2025