eppcic.c revision 1.8
1 /* $NetBSD: eppcic.c,v 1.8 2019/11/10 21:16:23 chs Exp $ */ 2 3 /* 4 * Copyright (c) 2005 HAMAJIMA Katsuomi. All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 */ 27 28 #include <sys/cdefs.h> 29 __KERNEL_RCSID(0, "$NetBSD: eppcic.c,v 1.8 2019/11/10 21:16:23 chs Exp $"); 30 31 #include <sys/param.h> 32 #include <sys/systm.h> 33 #include <sys/kernel.h> 34 #include <sys/malloc.h> 35 #include <sys/device.h> 36 #include <sys/kthread.h> 37 #include <uvm/uvm_param.h> 38 #include <sys/bus.h> 39 #include <dev/pcmcia/pcmciareg.h> 40 #include <dev/pcmcia/pcmciavar.h> 41 #include <dev/pcmcia/pcmciachip.h> 42 #include <arm/ep93xx/epsocvar.h> 43 #include <arm/ep93xx/epgpiovar.h> 44 #include <arm/ep93xx/eppcicvar.h> 45 #include <arm/ep93xx/ep93xxreg.h> 46 #include <arm/ep93xx/epsmcreg.h> 47 #include "epled.h" 48 #if NEPLED > 0 49 #include <arm/ep93xx/epledvar.h> 50 #endif 51 52 #include "epgpio.h" 53 #if NEPGPIO == 0 54 #error "epgpio requires in eppcic" 55 #endif 56 57 #ifdef EPPCIC_DEBUG 58 int eppcic_debug = EPPCIC_DEBUG; 59 #define DPRINTFN(n,x) if (eppcic_debug>(n)) printf x; 60 #else 61 #define DPRINTFN(n,x) 62 #endif 63 64 /* Mem & I/O */ 65 #define SOCKET0_MCCD1 1 /* pin36/pin26 (negative) Card Detect 1 */ 66 #define SOCKET0_MCCD2 2 /* pin67/pin25 (negative) Card Detect 2 */ 67 #define SOCKET0_VS1 5 /* pin33/pin43 (negative) Voltage Sense 1 */ 68 #define SOCKET0_VS2 7 /* pin57/pin40 (negative) Voltage Sense 2 */ 69 /* Memory */ 70 #define SOCKET0_WP 0 /* pin33/pin24 Write Protect */ 71 #define SOCKET0_MCBVD1 3 /* pin63/pin46 Battery Voltage Detect 1 */ 72 #define SOCKET0_MCBVD2 4 /* pin62/pin45 Battery Voltage Detect 2 */ 73 #define SOCKET0_READY 6 /* pin16/pin37 Ready */ 74 /* I/O */ 75 #define SOCKET0_STSCHG 3 /* pin63/pin46 (negative) Status Change */ 76 #define SOCKET0_SPKR 4 /* pin62/pin45 (negative) Speaker */ 77 #define SOCKET0_IREQ 6 /* pin16/pin37 Interrupt Request */ 78 79 struct eppcic_handle { 80 int ph_socket; /* socket number */ 81 struct eppcic_softc *ph_sc; 82 device_t ph_card; 83 int (*ph_ih_func)(void *); 84 void *ph_ih_arg; 85 lwp_t *ph_event_thread; 86 int ph_run; /* ktread running */ 87 int ph_width; /* 8 or 16 */ 88 int ph_vcc; /* 3 or 5 */ 89 int ph_status[2]; /* cd1 and cd2 */ 90 int ph_port; /* GPIO port */ 91 int ph_cd[2]; /* card detect */ 92 int ph_vs[2]; /* voltage sense */ 93 int ph_ireq; /* interrupt request */ 94 struct { 95 bus_size_t reg; 96 bus_addr_t base; 97 bus_size_t size; 98 } ph_space[3]; 99 #define IO 0 100 #define COMMON 1 101 #define ATTRIBUTE 2 102 }; 103 104 static int eppcic_intr_carddetect(void *); 105 static int eppcic_intr_socket(void *); 106 static int eppcic_print(void *, const char *); 107 static void eppcic_event_thread(void *); 108 void eppcic_shutdown(void *); 109 110 static int eppcic_mem_alloc(pcmcia_chipset_handle_t, bus_size_t, 111 struct pcmcia_mem_handle *); 112 static void eppcic_mem_free(pcmcia_chipset_handle_t, 113 struct pcmcia_mem_handle *); 114 static int eppcic_mem_map(pcmcia_chipset_handle_t, int, bus_addr_t, bus_size_t, 115 struct pcmcia_mem_handle *, bus_size_t *, int *); 116 static void eppcic_mem_unmap(pcmcia_chipset_handle_t, int); 117 static int eppcic_io_alloc(pcmcia_chipset_handle_t, bus_addr_t, bus_size_t, 118 bus_size_t, struct pcmcia_io_handle *); 119 static void eppcic_io_free(pcmcia_chipset_handle_t, struct pcmcia_io_handle *); 120 static int eppcic_io_map(pcmcia_chipset_handle_t, int, bus_addr_t, bus_size_t, 121 struct pcmcia_io_handle *, int *); 122 static void eppcic_io_unmap(pcmcia_chipset_handle_t, int); 123 static void *eppcic_intr_establish(pcmcia_chipset_handle_t, 124 struct pcmcia_function *, 125 int, int (*)(void *), void *); 126 static void eppcic_intr_disestablish(pcmcia_chipset_handle_t, void *); 127 static void eppcic_socket_enable(pcmcia_chipset_handle_t); 128 static void eppcic_socket_disable(pcmcia_chipset_handle_t); 129 static void eppcic_socket_settype(pcmcia_chipset_handle_t, int); 130 131 static void eppcic_attach_socket(struct eppcic_handle *); 132 static void eppcic_config_socket(struct eppcic_handle *); 133 static int eppcic_get_voltage(struct eppcic_handle *); 134 static void eppcic_set_pcreg(struct eppcic_handle *, int); 135 136 static struct pcmcia_chip_functions eppcic_functions = { 137 eppcic_mem_alloc, eppcic_mem_free, 138 eppcic_mem_map, eppcic_mem_unmap, 139 eppcic_io_alloc, eppcic_io_free, 140 eppcic_io_map, eppcic_io_unmap, 141 eppcic_intr_establish, eppcic_intr_disestablish, 142 eppcic_socket_enable, eppcic_socket_disable, 143 eppcic_socket_settype 144 }; 145 146 void 147 eppcic_attach_common(device_t parent, device_t self, void *aux, 148 eppcic_chipset_tag_t pcic) 149 { 150 struct eppcic_softc *sc = device_private(self); 151 struct epsoc_attach_args *sa = aux; 152 struct eppcic_handle *ph; 153 int reg; 154 int i; 155 156 if (!sa->sa_gpio) { 157 printf("%s: epgpio requires\n", device_xname(self)); 158 return; 159 } 160 sc->sc_dev = self; 161 sc->sc_gpio = sa->sa_gpio; 162 sc->sc_iot = sa->sa_iot; 163 sc->sc_hclk = sa->sa_hclk; 164 sc->sc_pcic = pcic; 165 sc->sc_enable = 0; 166 if (bus_space_map(sa->sa_iot, sa->sa_addr, 167 sa->sa_size, 0, &sc->sc_ioh)){ 168 printf("%s: Cannot map registers\n", device_xname(self)); 169 return; 170 } 171 printf("\n"); 172 173 #if NEPLED > 0 174 epled_green_on(); 175 epled_red_off(); 176 #endif 177 /* socket 0 */ 178 ph = malloc(sizeof(struct eppcic_handle), M_DEVBUF, M_WAITOK); 179 sc->sc_ph[0] = ph; 180 ph->ph_sc = sc; 181 ph->ph_socket = 0; 182 ph->ph_port = PORT_F; 183 ph->ph_cd[0] = SOCKET0_MCCD1; 184 ph->ph_cd[1] = SOCKET0_MCCD2; 185 ph->ph_vs[0] = SOCKET0_VS1; 186 ph->ph_vs[1] = SOCKET0_VS2; 187 ph->ph_ireq = SOCKET0_IREQ; 188 ph->ph_space[IO].reg = EP93XX_PCMCIA0_IO; 189 ph->ph_space[IO].base = EP93XX_PCMCIA0_HWBASE + EP93XX_PCMCIA_IO; 190 ph->ph_space[IO].size = EP93XX_PCMCIA_IO_SIZE; 191 ph->ph_space[COMMON].reg = EP93XX_PCMCIA0_Common; 192 ph->ph_space[COMMON].base = EP93XX_PCMCIA0_HWBASE 193 + EP93XX_PCMCIA_COMMON; 194 ph->ph_space[COMMON].size = EP93XX_PCMCIA_COMMON_SIZE; 195 ph->ph_space[ATTRIBUTE].reg = EP93XX_PCMCIA0_Attribute; 196 ph->ph_space[ATTRIBUTE].base = EP93XX_PCMCIA0_HWBASE 197 + EP93XX_PCMCIA_ATTRIBUTE; 198 ph->ph_space[ATTRIBUTE].size = EP93XX_PCMCIA_ATTRIBUTE_SIZE; 199 eppcic_attach_socket(ph); 200 201 reg = EP93XX_PCMCIA_WEN | (pcic->socket_type)(sc, 0); 202 bus_space_write_4(sc->sc_iot, sc->sc_ioh, EP93XX_PCMCIA_Ctrl, 203 EP93XX_PCMCIA_RST | reg); 204 delay(10); 205 bus_space_write_4(sc->sc_iot, sc->sc_ioh, EP93XX_PCMCIA_Ctrl, reg); 206 delay(500); 207 208 for (i = 0; i < EP93XX_PCMCIA_NSOCKET; i++) 209 eppcic_config_socket(sc->sc_ph[i]); 210 #if NEPLED > 0 211 epled_green_off(); 212 #endif 213 } 214 215 static void 216 eppcic_attach_socket(struct eppcic_handle *ph) 217 { 218 struct eppcic_softc *sc = ph->ph_sc; 219 220 ph->ph_width = 16; 221 ph->ph_vcc = 3; 222 ph->ph_event_thread = NULL; 223 ph->ph_run = 0; 224 ph->ph_ih_func = NULL; 225 ph->ph_ih_arg = NULL; 226 epgpio_in(sc->sc_gpio, ph->ph_port, ph->ph_cd[0]); 227 epgpio_in(sc->sc_gpio, ph->ph_port, ph->ph_cd[1]); 228 epgpio_in(sc->sc_gpio, ph->ph_port, ph->ph_vs[0]); 229 epgpio_in(sc->sc_gpio, ph->ph_port, ph->ph_vs[1]); 230 ph->ph_status[0] = epgpio_read(sc->sc_gpio, ph->ph_port, ph->ph_cd[0]); 231 ph->ph_status[1] = epgpio_read(sc->sc_gpio, ph->ph_port, ph->ph_cd[1]); 232 } 233 234 static void 235 eppcic_config_socket(struct eppcic_handle *ph) 236 { 237 struct eppcic_softc *sc = ph->ph_sc; 238 eppcic_chipset_tag_t pcic = sc->sc_pcic; 239 struct pcmciabus_attach_args paa; 240 int wait; 241 242 paa.paa_busname = "pcmcia"; 243 paa.pct = (pcmcia_chipset_tag_t)&eppcic_functions; 244 paa.pch = (pcmcia_chipset_handle_t)ph; 245 ph->ph_card = config_found_ia((void*)sc, "pcmciabus", &paa, 246 eppcic_print); 247 248 epgpio_intr_establish(sc->sc_gpio, ph->ph_port, ph->ph_cd[0], 249 EDGE_TRIGGER | FALLING_EDGE | DEBOUNCE, 250 IPL_TTY, eppcic_intr_carddetect, ph); 251 epgpio_intr_establish(sc->sc_gpio, ph->ph_port, ph->ph_cd[1], 252 EDGE_TRIGGER | RISING_EDGE | DEBOUNCE, 253 IPL_TTY, eppcic_intr_carddetect, ph); 254 wait = (pcic->power_ctl)(sc, ph->ph_socket, POWER_OFF); 255 delay(wait); 256 257 258 ph->ph_status[0] = epgpio_read(sc->sc_gpio, ph->ph_port, ph->ph_cd[0]); 259 ph->ph_status[1] = epgpio_read(sc->sc_gpio, ph->ph_port, ph->ph_cd[1]); 260 261 DPRINTFN(1, ("eppcic_config_socket: cd1=%d, cd2=%d\n",ph->ph_status[0],ph->ph_status[1])); 262 263 ph->ph_run = 1; 264 kthread_create(PRI_NONE, 0, NULL, eppcic_event_thread, ph, 265 &ph->ph_event_thread, "%s,%d", device_xname(sc->sc_dev), 266 ph->ph_socket); 267 } 268 269 static int 270 eppcic_print(void *arg, const char *pnp) 271 { 272 return (UNCONF); 273 } 274 275 static void 276 eppcic_event_thread(void *arg) 277 { 278 struct eppcic_handle *ph = arg; 279 280 if (!(ph->ph_status[0] | ph->ph_status[1])) 281 pcmcia_card_attach(ph->ph_card); 282 283 for (;;) { 284 tsleep(ph, PWAIT, "CSC wait", 0); 285 if (!ph->ph_run) 286 break; 287 288 DPRINTFN(1, ("eppcic_event_thread: cd1=%d, cd2=%d\n",ph->ph_status[0],ph->ph_status[1])); 289 290 if (!ph->ph_status[0] && !ph->ph_status[1]) 291 pcmcia_card_attach(ph->ph_card); 292 else if (ph->ph_status[0] && ph->ph_status[1]) 293 pcmcia_card_detach(ph->ph_card, DETACH_FORCE); 294 } 295 296 DPRINTFN(1, ("eppcic_event_thread: run=%d\n",ph->ph_run)); 297 ph->ph_event_thread = NULL; 298 kthread_exit(0); 299 } 300 301 void 302 eppcic_shutdown(void *arg) 303 { 304 struct eppcic_handle *ph = arg; 305 306 DPRINTFN(1, ("eppcic_shutdown\n")); 307 ph->ph_run = 0; 308 wakeup(ph); 309 } 310 311 static int 312 eppcic_intr_carddetect(void *arg) 313 { 314 struct eppcic_handle *ph = arg; 315 struct eppcic_softc *sc = ph->ph_sc; 316 int nstatus[2]; 317 318 nstatus[0] = epgpio_read(sc->sc_gpio, ph->ph_port, ph->ph_cd[0]); 319 nstatus[1] = epgpio_read(sc->sc_gpio, ph->ph_port, ph->ph_cd[1]); 320 321 DPRINTFN(1, ("eppcic_intr: cd1=%#x, cd2=%#x\n",nstatus[0],nstatus[1])); 322 323 if (nstatus[0] != ph->ph_status[0] || nstatus[1] != ph->ph_status[1]) { 324 ph->ph_status[0] = nstatus[0]; 325 ph->ph_status[1] = nstatus[1]; 326 wakeup(ph); 327 } 328 return 0; 329 } 330 331 static int 332 eppcic_mem_alloc(pcmcia_chipset_handle_t pch, bus_size_t size, 333 struct pcmcia_mem_handle *pmh) 334 { 335 struct eppcic_handle *ph = (struct eppcic_handle *)pch; 336 struct eppcic_softc *sc = ph->ph_sc; 337 338 DPRINTFN(1, ("eppcic_mem_alloc: size=%#x\n",(unsigned)size)); 339 340 pmh->memt = sc->sc_iot; 341 return 0; 342 } 343 344 static void 345 eppcic_mem_free(pcmcia_chipset_handle_t pch, struct pcmcia_mem_handle *pmh) 346 { 347 DPRINTFN(1, ("eppcic_mem_free\n")); 348 } 349 350 static int 351 eppcic_mem_map(pcmcia_chipset_handle_t pch, int kind, bus_addr_t addr, 352 bus_size_t size, struct pcmcia_mem_handle *pmh, 353 bus_size_t *offsetp, int *windowp) 354 { 355 struct eppcic_handle *ph = (struct eppcic_handle *)pch; 356 struct eppcic_softc *sc = ph->ph_sc; 357 bus_addr_t pa; 358 int err; 359 360 DPRINTFN(1, ("eppcic_mem_map: kind=%d, addr=%#x, size=%#x\n",kind,(unsigned)addr,(unsigned)size)); 361 362 pa = addr; 363 *offsetp = 0; 364 size = round_page(size); 365 pmh->realsize = size; 366 if (kind & PCMCIA_WIDTH_MEM8) 367 ph->ph_width = 8; 368 else 369 ph->ph_width = 16; 370 switch (kind & ~PCMCIA_WIDTH_MEM_MASK) { 371 case PCMCIA_MEM_ATTR: 372 eppcic_set_pcreg(ph, ATTRIBUTE); 373 pa += ph->ph_space[ATTRIBUTE].base; 374 break; 375 case PCMCIA_MEM_COMMON: 376 eppcic_set_pcreg(ph, COMMON); 377 pa += ph->ph_space[COMMON].base; 378 break; 379 default: 380 return -1; 381 } 382 383 DPRINTFN(1, ("eppcic_mem_map: pa=%#x, *offsetp=%#x, size=%#x\n",(unsigned)pa,(unsigned)addr,(unsigned)size)); 384 385 if (!(err = bus_space_map(sc->sc_iot, pa, size, 0, &pmh->memh))) 386 *windowp = (int)pmh->memh; 387 return err; 388 } 389 390 static void 391 eppcic_mem_unmap(pcmcia_chipset_handle_t pch, int window) 392 { 393 struct eppcic_handle *ph = (struct eppcic_handle *)pch; 394 struct eppcic_softc *sc = ph->ph_sc; 395 396 DPRINTFN(1, ("eppcic_mem_unmap: window=%#x\n",window)); 397 398 bus_space_unmap(sc->sc_iot, (bus_addr_t)window, 0x400); 399 } 400 401 static int 402 eppcic_io_alloc(pcmcia_chipset_handle_t pch, bus_addr_t start, bus_size_t size, 403 bus_size_t align, struct pcmcia_io_handle *pih) 404 { 405 struct eppcic_handle *ph = (struct eppcic_handle *)pch; 406 struct eppcic_softc *sc = ph->ph_sc; 407 bus_addr_t pa; 408 409 DPRINTFN(1, ("eppcic_io_alloc: start=%#x, size=%#x, align=%#x\n",(unsigned)start,(unsigned)size,(unsigned)align)); 410 411 pih->iot = sc->sc_iot; 412 pih->addr = start; 413 pih->size = size; 414 pa = pih->addr + ph->ph_space[IO].base; 415 return bus_space_map(sc->sc_iot, pa, size, 0, &pih->ioh); 416 } 417 418 static void 419 eppcic_io_free(pcmcia_chipset_handle_t pch, struct pcmcia_io_handle *pih) 420 { 421 struct eppcic_handle *ph = (struct eppcic_handle *)pch; 422 struct eppcic_softc *sc = ph->ph_sc; 423 424 DPRINTFN(1, ("eppcic_io_free\n")); 425 426 bus_space_unmap(sc->sc_iot, pih->ioh, pih->size); 427 } 428 429 static int 430 eppcic_io_map(pcmcia_chipset_handle_t pch, int width, bus_addr_t offset, 431 bus_size_t size, struct pcmcia_io_handle *pih, int *windowp) 432 { 433 struct eppcic_handle *ph = (struct eppcic_handle *)pch; 434 435 DPRINTFN(1, ("eppcic_io_map: offset=%#x, size=%#x, width=%d",(unsigned)offset,(unsigned)size,width)); 436 437 switch (width) { 438 case PCMCIA_WIDTH_IO8: 439 DPRINTFN(1, ("(8bit)\n")); 440 ph->ph_width = 8; 441 break; 442 case PCMCIA_WIDTH_IO16: 443 case PCMCIA_WIDTH_AUTO: /* I don't understand how I check it */ 444 DPRINTFN(1, ("(16bit)\n")); 445 ph->ph_width = 16; 446 break; 447 default: 448 DPRINTFN(1, ("(unknown)\n")); 449 return -1; 450 } 451 eppcic_set_pcreg(ph, IO); 452 *windowp = 0; /* unused */ 453 return 0; 454 } 455 456 static void 457 eppcic_io_unmap(pcmcia_chipset_handle_t pch, int window) 458 { 459 DPRINTFN(1, ("eppcic_io_unmap: window=%#x\n",window)); 460 } 461 462 static void * 463 eppcic_intr_establish(pcmcia_chipset_handle_t pch, struct pcmcia_function *pf, 464 int ipl, int (*ih_func)(void *), void *ih_arg) 465 { 466 struct eppcic_handle *ph = (struct eppcic_handle *)pch; 467 struct eppcic_softc *sc = ph->ph_sc; 468 469 DPRINTFN(1, ("eppcic_intr_establish\n")); 470 471 if (ph->ph_ih_func) 472 return 0; 473 474 ph->ph_ih_func = ih_func; 475 ph->ph_ih_arg = ih_arg; 476 return epgpio_intr_establish(sc->sc_gpio, ph->ph_port, ph->ph_ireq, 477 LEVEL_SENSE | LOW_LEVEL, 478 ipl, eppcic_intr_socket, ph); 479 } 480 481 static void 482 eppcic_intr_disestablish(pcmcia_chipset_handle_t pch, void *ih) 483 { 484 struct eppcic_handle *ph = (struct eppcic_handle *)pch; 485 struct eppcic_softc *sc = ph->ph_sc; 486 487 DPRINTFN(1, ("eppcic_intr_disestablish\n")); 488 489 ph->ph_ih_func = NULL; 490 ph->ph_ih_arg = NULL; 491 epgpio_intr_disestablish(sc->sc_gpio, ph->ph_port, ph->ph_ireq); 492 } 493 494 static int 495 eppcic_intr_socket(void *arg) 496 { 497 struct eppcic_handle *ph = arg; 498 int err = 0; 499 500 if (ph->ph_ih_func) { 501 #if NEPLED > 0 502 epled_red_on(); 503 #endif 504 err = (*ph->ph_ih_func)(ph->ph_ih_arg); 505 #if NEPLED > 0 506 epled_red_off(); 507 #endif 508 } 509 return err; 510 } 511 512 513 static void 514 eppcic_socket_enable(pcmcia_chipset_handle_t pch) 515 { 516 struct eppcic_handle *ph = (struct eppcic_handle *)pch; 517 struct eppcic_softc *sc = ph->ph_sc; 518 eppcic_chipset_tag_t pcic = sc->sc_pcic; 519 int wait; 520 521 DPRINTFN(1, ("eppcic_socket_enable\n")); 522 523 wait = (pcic->power_ctl)(sc, ph->ph_socket, POWER_ON); 524 delay(wait); 525 #if NEPLED > 0 526 if (!sc->sc_enable++) 527 epled_green_on(); 528 #endif 529 ph->ph_vcc = eppcic_get_voltage(ph); 530 } 531 532 static void 533 eppcic_socket_disable(pcmcia_chipset_handle_t pch) 534 { 535 struct eppcic_handle *ph = (struct eppcic_handle *)pch; 536 struct eppcic_softc *sc = ph->ph_sc; 537 eppcic_chipset_tag_t pcic = sc->sc_pcic; 538 int wait; 539 540 DPRINTFN(1, ("eppcic_socket_disable\n")); 541 542 wait = (pcic->power_ctl)(sc, ph->ph_socket, POWER_OFF); 543 delay(wait); 544 #if NEPLED > 0 545 if (!--sc->sc_enable) 546 epled_green_off(); 547 #endif 548 } 549 550 static void 551 eppcic_socket_settype(pcmcia_chipset_handle_t pch, int type) 552 { 553 DPRINTFN(1, ("eppcic_socket_settype: type=%d",type)); 554 555 switch (type) { 556 case PCMCIA_IFTYPE_MEMORY: 557 DPRINTFN(1, ("(Memory)\n")); 558 break; 559 case PCMCIA_IFTYPE_IO: 560 DPRINTFN(1, ("(I/O)\n")); 561 break; 562 default: 563 DPRINTFN(1, ("(unknown)\n")); 564 return; 565 } 566 } 567 568 static int 569 eppcic_get_voltage(struct eppcic_handle *ph) 570 { 571 struct eppcic_softc *sc = ph->ph_sc; 572 eppcic_chipset_tag_t pcic = sc->sc_pcic; 573 int cap, vcc = 0; 574 575 cap = (pcic->power_capability)(sc, ph->ph_socket); 576 if (epgpio_read(sc->sc_gpio, ph->ph_port, ph->ph_vs[0])) { 577 if (cap | VCC_5V) 578 vcc = 5; 579 else 580 printf("%s: unsupported Vcc 5 Volts", 581 device_xname(sc->sc_dev)); 582 } else { 583 if (cap | VCC_3V) 584 vcc = 3; 585 else 586 printf("%s: unsupported Vcc 3.3 Volts", 587 device_xname(sc->sc_dev)); 588 } 589 DPRINTFN(1, ("eppcic_get_voltage: vs1=%d, vs2=%d (%dV)\n",epgpio_read_bit(sc->sc_gpio, ph->ph_port, ph->ph_vs[0]),epgpio_read_bit(sc->sc_gpio, ph->ph_port, ph->ph_vs[1]),vcc)); 590 return vcc; 591 } 592 593 #define EXTRA_DELAY 40 594 595 static void 596 eppcic_set_pcreg(struct eppcic_handle *ph, int kind) 597 { 598 struct eppcic_softc *sc = ph->ph_sc; 599 int atiming, htiming, ptiming; 600 int period = 1000000000 / sc->sc_hclk; 601 int width; 602 603 switch (ph->ph_width) { 604 case 8: 605 width = 0; 606 break; 607 case 16: 608 width = EP93XX_PCMCIA_WIDTH_16; 609 break; 610 default: 611 return; 612 } 613 switch (kind) { 614 case IO: 615 atiming = 165; htiming = 20; ptiming = 70; 616 break; 617 case COMMON: 618 #if linux_timing!=hamajima20050816 619 switch (ph->ph_vcc) { 620 case 3: 621 atiming = 465; htiming = 35; ptiming = 100; 622 break; 623 case 5: 624 atiming = 200; htiming = 20; ptiming = 30; 625 break; 626 default: 627 return; 628 } 629 break; 630 #endif 631 case ATTRIBUTE: 632 switch (ph->ph_vcc) { 633 case 3: 634 #if linux_timing!=hamajima20050816 635 atiming = 465; htiming = 35; ptiming = 100; 636 #else 637 atiming = 600; htiming = 35; ptiming = 100; 638 #endif 639 break; 640 case 5: 641 #if linux_timing!=hamajima20050816 642 atiming = 250; htiming = 20; ptiming = 30; 643 #else 644 atiming = 300; htiming = 20; ptiming = 30; 645 #endif 646 break; 647 default: 648 return; 649 } 650 break; 651 default: 652 return; 653 } 654 655 #if linux_timing!=hamajima20050816 656 period = 1000000000 / 50000000; 657 width = EP93XX_PCMCIA_WIDTH_16; 658 #endif 659 660 atiming = (atiming + EXTRA_DELAY) / period; 661 if (atiming>0xff) 662 atiming = 0xff; 663 htiming = ((htiming + EXTRA_DELAY) / period) + 1; 664 if (htiming>0xf) 665 htiming = 0xf; 666 ptiming = (ptiming + EXTRA_DELAY) / period; 667 if (ptiming>0xff) 668 ptiming = 0xff; 669 670 DPRINTFN(1, ("eppcic_set_pcreg: width=%d, access=%d, hold=%d, pre-charge=%d\n",ph->ph_width,atiming,htiming,ptiming)); 671 672 bus_space_write_4(sc->sc_iot, sc->sc_ioh, ph->ph_space[kind].reg, 673 width 674 | (atiming<<EP93XX_PCMCIA_ACCESS_SHIFT) 675 | (htiming<<EP93XX_PCMCIA_HOLD_SHIFT) 676 | (ptiming<<EP93XX_PCMCIA_PRECHARGE_SHIFT)); 677 tsleep(ph->ph_space, PWAIT, "eppcic_set_pcreg", hz / 4); 678 } 679
Indexes created Tue Sep 30 20:09:53 GMT 2025