a9tmr_fdt.c revision 1.2 
1/* $NetBSD: a9tmr_fdt.c,v 1.2 2019/01/19 20:56:03 jmcneill Exp $ */
2
3/*-
4 * Copyright (c) 2017 Jared McNeill <jmcneill@invisible.ca>
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 *    notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 *    notice, this list of conditions and the following disclaimer in the
14 *    documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
21 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
22 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
23 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
24 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
27 */
28
29#include <sys/cdefs.h>
30__KERNEL_RCSID(0, "$NetBSD: a9tmr_fdt.c,v 1.2 2019/01/19 20:56:03 jmcneill Exp $");
31
32#include <sys/param.h>
33#include <sys/bus.h>
34#include <sys/device.h>
35#include <sys/intr.h>
36#include <sys/systm.h>
37#include <sys/kernel.h>
38#include <sys/kmem.h>
39
40#include <arm/cortex/a9tmr_intr.h>
41#include <arm/cortex/mpcore_var.h>
42#include <arm/cortex/a9tmr_var.h>
43
44#include <dev/fdt/fdtvar.h>
45#include <arm/fdt/arm_fdtvar.h>
46
47static int	a9tmr_fdt_match(device_t, cfdata_t, void *);
48static void	a9tmr_fdt_attach(device_t, device_t, void *);
49
50static void	a9tmr_fdt_cpu_hatch(void *, struct cpu_info *);
51
52CFATTACH_DECL_NEW(a9tmr_fdt, 0, a9tmr_fdt_match, a9tmr_fdt_attach, NULL, NULL);
53
54static int
55a9tmr_fdt_match(device_t parent, cfdata_t cf, void *aux)
56{
57	const char * const compatible[] = {
58		"arm,cortex-a5-global-timer",
59		"arm,cortex-a9-global-timer",
60		NULL
61	};
62	struct fdt_attach_args * const faa = aux;
63
64	return of_compatible(faa->faa_phandle, compatible) >= 0;
65}
66
67static void
68a9tmr_fdt_attach(device_t parent, device_t self, void *aux)
69{
70	struct fdt_attach_args * const faa = aux;
71	const int phandle = faa->faa_phandle;
72	bus_space_handle_t bsh;
73
74	struct clk *clk = fdtbus_clock_get_index(phandle, 0);
75	if (clk == NULL) {
76		aprint_error(": couldn't get clock\n");
77		return;
78	}
79	if (clk_enable(clk) != 0) {
80		aprint_error(": couldn't enable clock\n");
81		return;
82	}
83
84	uint32_t rate = clk_get_rate(clk);
85	prop_dictionary_t dict = device_properties(self);
86	prop_dictionary_set_uint32(dict, "frequency", rate);
87
88	char intrstr[128];
89	if (!fdtbus_intr_str(phandle, 0, intrstr, sizeof(intrstr))) {
90		aprint_error(": failed to decode interrupt\n");
91		return;
92	}
93
94	aprint_naive("\n");
95	aprint_normal("\n");
96
97	void *ih = fdtbus_intr_establish(phandle, 0, IPL_CLOCK,
98	    FDT_INTR_MPSAFE, a9tmr_intr, NULL);
99	if (ih == NULL) {
100		aprint_error_dev(self, "couldn't install interrupt handler\n");
101		return;
102	}
103	aprint_normal_dev(self, "interrupting on %s\n", intrstr);
104
105	bus_addr_t addr;
106	bus_size_t size;
107	if (fdtbus_get_reg(phandle, 0, &addr, &size) != 0) {
108		aprint_error(": couldn't get distributor address\n");
109		return;
110	}
111	if (bus_space_map(faa->faa_bst, addr, size, 0, &bsh)) {
112		aprint_error(": couldn't map registers\n");
113		return;
114	}
115
116	struct mpcore_attach_args mpcaa = {
117		.mpcaa_name = "arma9tmr",
118		.mpcaa_memt = faa->faa_bst,
119		.mpcaa_memh = bsh,
120		.mpcaa_irq = -1,
121	};
122
123	config_found(self, &mpcaa, NULL);
124
125	arm_fdt_cpu_hatch_register(self, a9tmr_fdt_cpu_hatch);
126	arm_fdt_timer_register(a9tmr_cpu_initclocks);
127}
128
129static void
130a9tmr_fdt_cpu_hatch(void *priv, struct cpu_info *ci)
131{
132	a9tmr_init_cpu_clock(ci);
133}
134