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cpu_fdt.c revision 1.4
      1  1.4     skrll /* $NetBSD: cpu_fdt.c,v 1.4 2017/12/10 21:38:26 skrll Exp $ */
      2  1.1  jmcneill 
      3  1.1  jmcneill /*-
      4  1.1  jmcneill  * Copyright (c) 2017 Jared McNeill <jmcneill (at) invisible.ca>
      5  1.1  jmcneill  * All rights reserved.
      6  1.1  jmcneill  *
      7  1.1  jmcneill  * Redistribution and use in source and binary forms, with or without
      8  1.1  jmcneill  * modification, are permitted provided that the following conditions
      9  1.1  jmcneill  * are met:
     10  1.1  jmcneill  * 1. Redistributions of source code must retain the above copyright
     11  1.1  jmcneill  *    notice, this list of conditions and the following disclaimer.
     12  1.1  jmcneill  * 2. Redistributions in binary form must reproduce the above copyright
     13  1.1  jmcneill  *    notice, this list of conditions and the following disclaimer in the
     14  1.1  jmcneill  *    documentation and/or other materials provided with the distribution.
     15  1.1  jmcneill  *
     16  1.1  jmcneill  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     17  1.1  jmcneill  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     18  1.1  jmcneill  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     19  1.1  jmcneill  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     20  1.1  jmcneill  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
     21  1.1  jmcneill  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
     22  1.1  jmcneill  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
     23  1.1  jmcneill  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
     24  1.1  jmcneill  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     25  1.1  jmcneill  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     26  1.1  jmcneill  * SUCH DAMAGE.
     27  1.1  jmcneill  */
     28  1.1  jmcneill 
     29  1.1  jmcneill #include <sys/cdefs.h>
     30  1.4     skrll __KERNEL_RCSID(0, "$NetBSD: cpu_fdt.c,v 1.4 2017/12/10 21:38:26 skrll Exp $");
     31  1.1  jmcneill 
     32  1.1  jmcneill #include <sys/param.h>
     33  1.1  jmcneill #include <sys/bus.h>
     34  1.1  jmcneill #include <sys/device.h>
     35  1.4     skrll #include <sys/lwp.h>
     36  1.1  jmcneill #include <sys/systm.h>
     37  1.1  jmcneill #include <sys/kernel.h>
     38  1.1  jmcneill 
     39  1.1  jmcneill #include <dev/fdt/fdtvar.h>
     40  1.1  jmcneill 
     41  1.1  jmcneill #include <arm/cpu.h>
     42  1.1  jmcneill 
     43  1.1  jmcneill static int	cpu_fdt_match(device_t, cfdata_t, void *);
     44  1.1  jmcneill static void	cpu_fdt_attach(device_t, device_t, void *);
     45  1.1  jmcneill 
     46  1.3  jmcneill enum cpu_fdt_type {
     47  1.3  jmcneill 	ARM_CPU_UP = 1,
     48  1.3  jmcneill 	ARM_CPU_ARMV7,
     49  1.3  jmcneill 	ARM_CPU_ARMV8,
     50  1.3  jmcneill };
     51  1.3  jmcneill 
     52  1.1  jmcneill struct cpu_fdt_softc {
     53  1.1  jmcneill 	device_t		sc_dev;
     54  1.1  jmcneill 	int			sc_phandle;
     55  1.1  jmcneill };
     56  1.1  jmcneill 
     57  1.3  jmcneill static const struct of_compat_data compat_data[] = {
     58  1.3  jmcneill 	{ "arm,arm1176jzf-s",		ARM_CPU_UP },
     59  1.3  jmcneill 
     60  1.3  jmcneill 	{ "arm,cortex-a5",		ARM_CPU_ARMV7 },
     61  1.3  jmcneill 	{ "arm,cortex-a7",		ARM_CPU_ARMV7 },
     62  1.3  jmcneill 	{ "arm,cortex-a8",		ARM_CPU_ARMV7 },
     63  1.3  jmcneill 	{ "arm,cortex-a9",		ARM_CPU_ARMV7 },
     64  1.3  jmcneill 	{ "arm,cortex-a12",		ARM_CPU_ARMV7 },
     65  1.3  jmcneill 	{ "arm,cortex-a15",		ARM_CPU_ARMV7 },
     66  1.3  jmcneill 	{ "arm,cortex-a17",		ARM_CPU_ARMV7 },
     67  1.3  jmcneill 
     68  1.3  jmcneill 	{ "arm,cortex-a53",		ARM_CPU_ARMV8 },
     69  1.3  jmcneill 	{ "arm,cortex-a57",		ARM_CPU_ARMV8 },
     70  1.3  jmcneill 	{ "arm,cortex-a72",		ARM_CPU_ARMV8 },
     71  1.3  jmcneill 	{ "arm,cortex-a73",		ARM_CPU_ARMV8 },
     72  1.3  jmcneill 	{ NULL }
     73  1.3  jmcneill };
     74  1.3  jmcneill 
     75  1.1  jmcneill CFATTACH_DECL_NEW(cpu_fdt, sizeof(struct cpu_fdt_softc),
     76  1.1  jmcneill 	cpu_fdt_match, cpu_fdt_attach, NULL, NULL);
     77  1.1  jmcneill 
     78  1.1  jmcneill static int
     79  1.1  jmcneill cpu_fdt_match(device_t parent, cfdata_t cf, void *aux)
     80  1.1  jmcneill {
     81  1.1  jmcneill 	struct fdt_attach_args * const faa = aux;
     82  1.3  jmcneill 	const int phandle = faa->faa_phandle;
     83  1.3  jmcneill 	enum cpu_fdt_type type;
     84  1.2  jmcneill 	int is_compatible;
     85  1.2  jmcneill 	bus_addr_t mpidr;
     86  1.2  jmcneill 
     87  1.3  jmcneill 	is_compatible = of_match_compat_data(phandle, compat_data);
     88  1.2  jmcneill 	if (!is_compatible)
     89  1.2  jmcneill 		return 0;
     90  1.2  jmcneill 
     91  1.3  jmcneill 	type = of_search_compatible(phandle, compat_data)->data;
     92  1.3  jmcneill 	switch (type) {
     93  1.3  jmcneill 	case ARM_CPU_ARMV7:
     94  1.3  jmcneill 	case ARM_CPU_ARMV8:
     95  1.3  jmcneill 		/* XXX NetBSD requires all CPUs to be in the same cluster */
     96  1.3  jmcneill 		if (fdtbus_get_reg(phandle, 0, &mpidr, NULL) != 0)
     97  1.3  jmcneill 			return 0;
     98  1.3  jmcneill 		const uint32_t bp_mpidr = armreg_mpidr_read();
     99  1.3  jmcneill 		const u_int bp_clid = __SHIFTOUT(bp_mpidr, CORTEXA9_MPIDR_CLID);
    100  1.3  jmcneill 		const u_int clid = __SHIFTOUT(mpidr, CORTEXA9_MPIDR_CLID);
    101  1.3  jmcneill 		if (bp_clid != clid)
    102  1.3  jmcneill 			return 0;
    103  1.3  jmcneill 		break;
    104  1.3  jmcneill 	default:
    105  1.3  jmcneill 		break;
    106  1.3  jmcneill 	}
    107  1.1  jmcneill 
    108  1.2  jmcneill 	return is_compatible;
    109  1.1  jmcneill }
    110  1.1  jmcneill 
    111  1.1  jmcneill static void
    112  1.1  jmcneill cpu_fdt_attach(device_t parent, device_t self, void *aux)
    113  1.1  jmcneill {
    114  1.1  jmcneill 	struct cpu_fdt_softc * const sc = device_private(self);
    115  1.1  jmcneill 	struct fdt_attach_args * const faa = aux;
    116  1.3  jmcneill 	const int phandle = faa->faa_phandle;
    117  1.3  jmcneill 	enum cpu_fdt_type type;
    118  1.1  jmcneill 	bus_addr_t mpidr;
    119  1.3  jmcneill 	cpuid_t cpuid;
    120  1.1  jmcneill 
    121  1.1  jmcneill 	sc->sc_dev = self;
    122  1.3  jmcneill 	sc->sc_phandle = phandle;
    123  1.3  jmcneill 
    124  1.3  jmcneill 	type = of_search_compatible(phandle, compat_data)->data;
    125  1.1  jmcneill 
    126  1.3  jmcneill 	switch (type) {
    127  1.3  jmcneill 	case ARM_CPU_ARMV7:
    128  1.3  jmcneill 	case ARM_CPU_ARMV8:
    129  1.3  jmcneill 		if (fdtbus_get_reg(phandle, 0, &mpidr, NULL) != 0) {
    130  1.3  jmcneill 			aprint_error(": missing 'reg' property\n");
    131  1.3  jmcneill 			return;
    132  1.3  jmcneill 		}
    133  1.3  jmcneill 		cpuid = __SHIFTOUT(mpidr, CORTEXA9_MPIDR_CPUID);
    134  1.3  jmcneill 		break;
    135  1.3  jmcneill 	default:
    136  1.3  jmcneill 		cpuid = 0;
    137  1.3  jmcneill 		break;
    138  1.1  jmcneill 	}
    139  1.1  jmcneill 
    140  1.2  jmcneill 	/* Attach the CPU */
    141  1.3  jmcneill 	cpu_attach(self, cpuid);
    142  1.1  jmcneill }
    143