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cpu_fdt.c revision 1.4.2.1
      1  1.4.2.1  pgoyette /* $NetBSD: cpu_fdt.c,v 1.4.2.1 2018/04/07 04:12:11 pgoyette Exp $ */
      2      1.1  jmcneill 
      3      1.1  jmcneill /*-
      4      1.1  jmcneill  * Copyright (c) 2017 Jared McNeill <jmcneill (at) invisible.ca>
      5      1.1  jmcneill  * All rights reserved.
      6      1.1  jmcneill  *
      7      1.1  jmcneill  * Redistribution and use in source and binary forms, with or without
      8      1.1  jmcneill  * modification, are permitted provided that the following conditions
      9      1.1  jmcneill  * are met:
     10      1.1  jmcneill  * 1. Redistributions of source code must retain the above copyright
     11      1.1  jmcneill  *    notice, this list of conditions and the following disclaimer.
     12      1.1  jmcneill  * 2. Redistributions in binary form must reproduce the above copyright
     13      1.1  jmcneill  *    notice, this list of conditions and the following disclaimer in the
     14      1.1  jmcneill  *    documentation and/or other materials provided with the distribution.
     15      1.1  jmcneill  *
     16      1.1  jmcneill  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     17      1.1  jmcneill  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     18      1.1  jmcneill  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     19      1.1  jmcneill  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     20      1.1  jmcneill  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
     21      1.1  jmcneill  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
     22      1.1  jmcneill  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
     23      1.1  jmcneill  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
     24      1.1  jmcneill  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     25      1.1  jmcneill  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     26      1.1  jmcneill  * SUCH DAMAGE.
     27      1.1  jmcneill  */
     28      1.1  jmcneill 
     29      1.1  jmcneill #include <sys/cdefs.h>
     30  1.4.2.1  pgoyette __KERNEL_RCSID(0, "$NetBSD: cpu_fdt.c,v 1.4.2.1 2018/04/07 04:12:11 pgoyette Exp $");
     31      1.1  jmcneill 
     32      1.1  jmcneill #include <sys/param.h>
     33      1.1  jmcneill #include <sys/bus.h>
     34      1.1  jmcneill #include <sys/device.h>
     35      1.4     skrll #include <sys/lwp.h>
     36      1.1  jmcneill #include <sys/systm.h>
     37      1.1  jmcneill #include <sys/kernel.h>
     38      1.1  jmcneill 
     39      1.1  jmcneill #include <dev/fdt/fdtvar.h>
     40      1.1  jmcneill 
     41  1.4.2.1  pgoyette #include <arm/armreg.h>
     42      1.1  jmcneill #include <arm/cpu.h>
     43  1.4.2.1  pgoyette #include <arm/cpufunc.h>
     44      1.1  jmcneill 
     45      1.1  jmcneill static int	cpu_fdt_match(device_t, cfdata_t, void *);
     46      1.1  jmcneill static void	cpu_fdt_attach(device_t, device_t, void *);
     47      1.1  jmcneill 
     48      1.3  jmcneill enum cpu_fdt_type {
     49      1.3  jmcneill 	ARM_CPU_UP = 1,
     50      1.3  jmcneill 	ARM_CPU_ARMV7,
     51      1.3  jmcneill 	ARM_CPU_ARMV8,
     52      1.3  jmcneill };
     53      1.3  jmcneill 
     54      1.1  jmcneill struct cpu_fdt_softc {
     55      1.1  jmcneill 	device_t		sc_dev;
     56      1.1  jmcneill 	int			sc_phandle;
     57      1.1  jmcneill };
     58      1.1  jmcneill 
     59      1.3  jmcneill static const struct of_compat_data compat_data[] = {
     60      1.3  jmcneill 	{ "arm,arm1176jzf-s",		ARM_CPU_UP },
     61      1.3  jmcneill 
     62      1.3  jmcneill 	{ "arm,cortex-a5",		ARM_CPU_ARMV7 },
     63      1.3  jmcneill 	{ "arm,cortex-a7",		ARM_CPU_ARMV7 },
     64      1.3  jmcneill 	{ "arm,cortex-a8",		ARM_CPU_ARMV7 },
     65      1.3  jmcneill 	{ "arm,cortex-a9",		ARM_CPU_ARMV7 },
     66      1.3  jmcneill 	{ "arm,cortex-a12",		ARM_CPU_ARMV7 },
     67      1.3  jmcneill 	{ "arm,cortex-a15",		ARM_CPU_ARMV7 },
     68      1.3  jmcneill 	{ "arm,cortex-a17",		ARM_CPU_ARMV7 },
     69      1.3  jmcneill 
     70      1.3  jmcneill 	{ "arm,cortex-a53",		ARM_CPU_ARMV8 },
     71      1.3  jmcneill 	{ "arm,cortex-a57",		ARM_CPU_ARMV8 },
     72      1.3  jmcneill 	{ "arm,cortex-a72",		ARM_CPU_ARMV8 },
     73      1.3  jmcneill 	{ "arm,cortex-a73",		ARM_CPU_ARMV8 },
     74      1.3  jmcneill 	{ NULL }
     75      1.3  jmcneill };
     76      1.3  jmcneill 
     77      1.1  jmcneill CFATTACH_DECL_NEW(cpu_fdt, sizeof(struct cpu_fdt_softc),
     78      1.1  jmcneill 	cpu_fdt_match, cpu_fdt_attach, NULL, NULL);
     79      1.1  jmcneill 
     80      1.1  jmcneill static int
     81      1.1  jmcneill cpu_fdt_match(device_t parent, cfdata_t cf, void *aux)
     82      1.1  jmcneill {
     83      1.1  jmcneill 	struct fdt_attach_args * const faa = aux;
     84      1.3  jmcneill 	const int phandle = faa->faa_phandle;
     85      1.3  jmcneill 	enum cpu_fdt_type type;
     86      1.2  jmcneill 	int is_compatible;
     87      1.2  jmcneill 	bus_addr_t mpidr;
     88      1.2  jmcneill 
     89      1.3  jmcneill 	is_compatible = of_match_compat_data(phandle, compat_data);
     90      1.2  jmcneill 	if (!is_compatible)
     91      1.2  jmcneill 		return 0;
     92      1.2  jmcneill 
     93      1.3  jmcneill 	type = of_search_compatible(phandle, compat_data)->data;
     94      1.3  jmcneill 	switch (type) {
     95      1.3  jmcneill 	case ARM_CPU_ARMV7:
     96      1.3  jmcneill 	case ARM_CPU_ARMV8:
     97      1.3  jmcneill 		/* XXX NetBSD requires all CPUs to be in the same cluster */
     98      1.3  jmcneill 		if (fdtbus_get_reg(phandle, 0, &mpidr, NULL) != 0)
     99      1.3  jmcneill 			return 0;
    100  1.4.2.1  pgoyette 
    101  1.4.2.1  pgoyette 		const u_int bp_clid = cpu_clusterid();
    102  1.4.2.1  pgoyette 		const u_int clid = __SHIFTOUT(mpidr, MPIDR_AFF1);
    103  1.4.2.1  pgoyette 
    104      1.3  jmcneill 		if (bp_clid != clid)
    105      1.3  jmcneill 			return 0;
    106      1.3  jmcneill 		break;
    107      1.3  jmcneill 	default:
    108      1.3  jmcneill 		break;
    109      1.3  jmcneill 	}
    110      1.1  jmcneill 
    111      1.2  jmcneill 	return is_compatible;
    112      1.1  jmcneill }
    113      1.1  jmcneill 
    114      1.1  jmcneill static void
    115      1.1  jmcneill cpu_fdt_attach(device_t parent, device_t self, void *aux)
    116      1.1  jmcneill {
    117      1.1  jmcneill 	struct cpu_fdt_softc * const sc = device_private(self);
    118      1.1  jmcneill 	struct fdt_attach_args * const faa = aux;
    119      1.3  jmcneill 	const int phandle = faa->faa_phandle;
    120      1.3  jmcneill 	enum cpu_fdt_type type;
    121      1.1  jmcneill 	bus_addr_t mpidr;
    122      1.3  jmcneill 	cpuid_t cpuid;
    123      1.1  jmcneill 
    124      1.1  jmcneill 	sc->sc_dev = self;
    125      1.3  jmcneill 	sc->sc_phandle = phandle;
    126      1.3  jmcneill 
    127      1.3  jmcneill 	type = of_search_compatible(phandle, compat_data)->data;
    128      1.1  jmcneill 
    129      1.3  jmcneill 	switch (type) {
    130      1.3  jmcneill 	case ARM_CPU_ARMV7:
    131      1.3  jmcneill 	case ARM_CPU_ARMV8:
    132      1.3  jmcneill 		if (fdtbus_get_reg(phandle, 0, &mpidr, NULL) != 0) {
    133      1.3  jmcneill 			aprint_error(": missing 'reg' property\n");
    134      1.3  jmcneill 			return;
    135      1.3  jmcneill 		}
    136  1.4.2.1  pgoyette 
    137  1.4.2.1  pgoyette 		cpuid = __SHIFTOUT(mpidr, MPIDR_AFF0);
    138      1.3  jmcneill 		break;
    139      1.3  jmcneill 	default:
    140      1.3  jmcneill 		cpuid = 0;
    141      1.3  jmcneill 		break;
    142      1.1  jmcneill 	}
    143      1.1  jmcneill 
    144      1.2  jmcneill 	/* Attach the CPU */
    145      1.3  jmcneill 	cpu_attach(self, cpuid);
    146      1.1  jmcneill }
    147