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cpu_fdt.c revision 1.35 
      1 /* $NetBSD: cpu_fdt.c,v 1.35 2020/02/21 13:15:54 skrll Exp $ */
      2 
      3 /*-
      4  * Copyright (c) 2017 Jared McNeill <jmcneill (at) invisible.ca>
      5  * All rights reserved.
      6  *
      7  * Redistribution and use in source and binary forms, with or without
      8  * modification, are permitted provided that the following conditions
      9  * are met:
     10  * 1. Redistributions of source code must retain the above copyright
     11  *    notice, this list of conditions and the following disclaimer.
     12  * 2. Redistributions in binary form must reproduce the above copyright
     13  *    notice, this list of conditions and the following disclaimer in the
     14  *    documentation and/or other materials provided with the distribution.
     15  *
     16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     17  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     18  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     19  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     20  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
     21  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
     22  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
     23  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
     24  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     25  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     26  * SUCH DAMAGE.
     27  */
     28 
     29 #include "opt_multiprocessor.h"
     30 #include "psci_fdt.h"
     31 
     32 #include <sys/cdefs.h>
     33 __KERNEL_RCSID(0, "$NetBSD: cpu_fdt.c,v 1.35 2020/02/21 13:15:54 skrll Exp $");
     34 
     35 #include <sys/param.h>
     36 #include <sys/atomic.h>
     37 #include <sys/bus.h>
     38 #include <sys/device.h>
     39 #include <sys/lwp.h>
     40 #include <sys/systm.h>
     41 #include <sys/kernel.h>
     42 
     43 #include <dev/fdt/fdtvar.h>
     44 
     45 #include <arm/armreg.h>
     46 #include <arm/cpu.h>
     47 #include <arm/cpufunc.h>
     48 #include <arm/cpuvar.h>
     49 #include <arm/locore.h>
     50 
     51 #include <arm/arm/psci.h>
     52 #include <arm/fdt/arm_fdtvar.h>
     53 #include <arm/fdt/psci_fdtvar.h>
     54 
     55 #include <uvm/uvm_extern.h>
     56 
     57 static int	cpu_fdt_match(device_t, cfdata_t, void *);
     58 static void	cpu_fdt_attach(device_t, device_t, void *);
     59 
     60 struct cpu_fdt_softc {
     61 	device_t		sc_dev;
     62 	int			sc_phandle;
     63 };
     64 
     65 CFATTACH_DECL_NEW(cpu_fdt, sizeof(struct cpu_fdt_softc),
     66 	cpu_fdt_match, cpu_fdt_attach, NULL, NULL);
     67 
     68 static int
     69 cpu_fdt_match(device_t parent, cfdata_t cf, void *aux)
     70 {
     71 	struct fdt_attach_args * const faa = aux;
     72 	const int phandle = faa->faa_phandle;
     73 	const char *device_type;
     74 
     75 	device_type = fdtbus_get_string(phandle, "device_type");
     76 
     77 	return device_type != NULL && strcmp(device_type, "cpu") == 0;
     78 }
     79 
     80 static void
     81 cpu_fdt_attach(device_t parent, device_t self, void *aux)
     82 {
     83 	struct cpu_fdt_softc * const sc = device_private(self);
     84 	struct fdt_attach_args * const faa = aux;
     85 	const int phandle = faa->faa_phandle;
     86 	bus_addr_t cpuid;
     87 	const uint32_t *cap_ptr;
     88 	int len;
     89 
     90 	sc->sc_dev = self;
     91 	sc->sc_phandle = phandle;
     92 
     93  	cap_ptr = fdtbus_get_prop(phandle, "capacity-dmips-mhz", &len);
     94 	if (cap_ptr && len == 4) {
     95 		prop_dictionary_t dict = device_properties(self);
     96 		uint32_t capacity_dmips_mhz = be32toh(*cap_ptr);
     97 
     98 		prop_dictionary_set_uint32(dict, "capacity_dmips_mhz",
     99 		    capacity_dmips_mhz);
    100 	}
    101 
    102 	if (fdtbus_get_reg(phandle, 0, &cpuid, NULL) != 0)
    103 		cpuid = 0;
    104 
    105 	/* Attach the CPU */
    106 	cpu_attach(self, cpuid);
    107 
    108 	/* Attach CPU frequency scaling provider */
    109 	config_found(self, faa, NULL);
    110 }
    111 
    112 #if defined(MULTIPROCESSOR) && (NPSCI_FDT > 0 || defined(__aarch64__))
    113 static register_t
    114 cpu_fdt_mpstart_pa(void)
    115 {
    116 	bool ok __diagused;
    117 	paddr_t pa;
    118 
    119 	ok = pmap_extract(pmap_kernel(), (vaddr_t)cpu_mpstart, &pa);
    120 	KASSERT(ok);
    121 
    122 	return pa;
    123 }
    124 #endif
    125 
    126 #ifdef MULTIPROCESSOR
    127 static bool
    128 arm_fdt_cpu_okay(const int child)
    129 {
    130 	const char *s;
    131 
    132 	s = fdtbus_get_string(child, "device_type");
    133 	if (!s || strcmp(s, "cpu") != 0)
    134 		return false;
    135 
    136 	s = fdtbus_get_string(child, "status");
    137 	if (s) {
    138 		if (strcmp(s, "okay") == 0)
    139 			return false;
    140 		if (strcmp(s, "disabled") == 0)
    141 			return of_hasprop(child, "enable-method");
    142 		return false;
    143 	} else {
    144 		return true;
    145 	}
    146 }
    147 #endif /* MULTIPROCESSOR */
    148 
    149 void
    150 arm_fdt_cpu_bootstrap(void)
    151 {
    152 #ifdef MULTIPROCESSOR
    153 	uint64_t mpidr, bp_mpidr;
    154 	u_int cpuindex;
    155 	int child;
    156 
    157 	const int cpus = OF_finddevice("/cpus");
    158 	if (cpus == -1) {
    159 		aprint_error("%s: no /cpus node found\n", __func__);
    160 		arm_cpu_max = 1;
    161 		return;
    162 	}
    163 
    164 	/* Count CPUs */
    165 	arm_cpu_max = 0;
    166 
    167 	/* MPIDR affinity levels of boot processor. */
    168 	bp_mpidr = cpu_mpidr_aff_read();
    169 
    170 	/* Boot APs */
    171 	cpuindex = 1;
    172 	for (child = OF_child(cpus); child; child = OF_peer(child)) {
    173 		if (!arm_fdt_cpu_okay(child))
    174 			continue;
    175 
    176 		arm_cpu_max++;
    177 		if (fdtbus_get_reg64(child, 0, &mpidr, NULL) != 0)
    178 			continue;
    179 		if (mpidr == bp_mpidr)
    180 			continue; 	/* BP already started */
    181 
    182 		KASSERT(cpuindex < MAXCPUS);
    183 		cpu_mpidr[cpuindex] = mpidr;
    184 		cpu_dcache_wb_range((vaddr_t)&cpu_mpidr[cpuindex],
    185 		    sizeof(cpu_mpidr[cpuindex]));
    186 
    187 		cpuindex++;
    188 	}
    189 #endif
    190 }
    191 
    192 #ifdef MULTIPROCESSOR
    193 static struct arm_cpu_method *
    194 arm_fdt_cpu_enable_method(int phandle)
    195 {
    196 	const char *method;
    197 
    198  	method = fdtbus_get_string(phandle, "enable-method");
    199 	if (method == NULL)
    200 		return NULL;
    201 
    202 	__link_set_decl(arm_cpu_methods, struct arm_cpu_method);
    203 	struct arm_cpu_method * const *acmp;
    204 	__link_set_foreach(acmp, arm_cpu_methods) {
    205 		if (strcmp(method, (*acmp)->acm_compat) == 0)
    206 			return *acmp;
    207 	}
    208 
    209 	return NULL;
    210 }
    211 
    212 static int
    213 arm_fdt_cpu_enable(int phandle, struct arm_cpu_method *acm)
    214 {
    215 	return acm->acm_enable(phandle);
    216 }
    217 #endif
    218 
    219 int
    220 arm_fdt_cpu_mpstart(void)
    221 {
    222 	int ret = 0;
    223 #ifdef MULTIPROCESSOR
    224 	uint64_t mpidr, bp_mpidr;
    225 	u_int cpuindex, i;
    226 	int child, error;
    227 	struct arm_cpu_method *acm;
    228 
    229 	const int cpus = OF_finddevice("/cpus");
    230 	if (cpus == -1) {
    231 		aprint_error("%s: no /cpus node found\n", __func__);
    232 		return 0;
    233 	}
    234 
    235 	/* MPIDR affinity levels of boot processor. */
    236 	bp_mpidr = cpu_mpidr_aff_read();
    237 
    238 	/* Boot APs */
    239 	cpuindex = 1;
    240 	for (child = OF_child(cpus); child; child = OF_peer(child)) {
    241 		if (!arm_fdt_cpu_okay(child))
    242 			continue;
    243 
    244 		if (fdtbus_get_reg64(child, 0, &mpidr, NULL) != 0)
    245 			continue;
    246 
    247 		if (mpidr == bp_mpidr)
    248 			continue; 	/* BP already started */
    249 
    250 		acm = arm_fdt_cpu_enable_method(child);
    251 		if (acm == NULL)
    252 			acm = arm_fdt_cpu_enable_method(cpus);
    253 		if (acm == NULL)
    254 			continue;
    255 
    256 		error = arm_fdt_cpu_enable(child, acm);
    257 		if (error != 0) {
    258 			aprint_error("%s: failed to enable CPU %#" PRIx64 "\n",
    259 			    __func__, mpidr);
    260 			continue;
    261 		}
    262 
    263 		/* Wake up AP in case firmware has placed it in WFE state */
    264 		__asm __volatile("sev" ::: "memory");
    265 
    266 		/* Wait for AP to start */
    267 		for (i = 0x10000000; i > 0; i--) {
    268 			if (cpu_hatched_p(cpuindex))
    269 				break;
    270 		}
    271 
    272 		if (i == 0) {
    273 			ret++;
    274 			aprint_error("cpu%d: WARNING: AP failed to start\n", cpuindex);
    275 		}
    276 
    277 		cpuindex++;
    278 	}
    279 #endif /* MULTIPROCESSOR */
    280 	return ret;
    281 }
    282 
    283 static int
    284 cpu_enable_nullop(int phandle)
    285 {
    286 	return ENXIO;
    287 }
    288 ARM_CPU_METHOD(default, "", cpu_enable_nullop);
    289 
    290 #if defined(MULTIPROCESSOR) && NPSCI_FDT > 0
    291 static int
    292 cpu_enable_psci(int phandle)
    293 {
    294 	static bool psci_probed, psci_p;
    295 	uint64_t mpidr;
    296 	int ret;
    297 
    298 	if (!psci_probed) {
    299 		psci_probed = true;
    300 		psci_p = psci_fdt_preinit() == 0;
    301 	}
    302 	if (!psci_p)
    303 		return ENXIO;
    304 
    305 	fdtbus_get_reg64(phandle, 0, &mpidr, NULL);
    306 
    307 #if !defined(AARCH64)
    308 	/*
    309 	 * not necessary on AARCH64. beside there it hangs the system
    310 	 * because cache ops are only functional after cpu_attach()
    311 	 * was called.
    312 	 */
    313 	cpu_dcache_wbinv_all();
    314 #endif
    315 	ret = psci_cpu_on(mpidr, cpu_fdt_mpstart_pa(), 0);
    316 	if (ret != PSCI_SUCCESS)
    317 		return EIO;
    318 
    319 	return 0;
    320 }
    321 ARM_CPU_METHOD(psci, "psci", cpu_enable_psci);
    322 #endif
    323 
    324 #if defined(MULTIPROCESSOR) && defined(__aarch64__)
    325 static int
    326 spintable_cpu_on(u_int cpuindex, paddr_t entry_point_address, paddr_t cpu_release_addr)
    327 {
    328 	/*
    329 	 * we need devmap for cpu-release-addr in advance.
    330 	 * __HAVE_MM_MD_DIRECT_MAPPED_PHYS nor pmap work at this point.
    331 	 */
    332 	if (pmap_devmap_find_pa(cpu_release_addr, sizeof(paddr_t)) == NULL) {
    333 		aprint_error("%s: devmap for cpu-release-addr"
    334 		    " 0x%08"PRIxPADDR" required\n", __func__, cpu_release_addr);
    335 		return -1;
    336 	} else {
    337 		extern struct bus_space arm_generic_bs_tag;
    338 		bus_space_handle_t ioh;
    339 
    340 		bus_space_map(&arm_generic_bs_tag, cpu_release_addr,
    341 		    sizeof(paddr_t), 0, &ioh);
    342 		bus_space_write_4(&arm_generic_bs_tag, ioh, 0,
    343 		    entry_point_address);
    344 		bus_space_unmap(&arm_generic_bs_tag, ioh, sizeof(paddr_t));
    345 	}
    346 
    347 	return 0;
    348 }
    349 
    350 static int
    351 cpu_enable_spin_table(int phandle)
    352 {
    353 	uint64_t mpidr, addr;
    354 	int ret;
    355 
    356 	fdtbus_get_reg64(phandle, 0, &mpidr, NULL);
    357 
    358 	if (of_getprop_uint64(phandle, "cpu-release-addr", &addr) != 0)
    359 		return ENXIO;
    360 
    361 	ret = spintable_cpu_on(mpidr, cpu_fdt_mpstart_pa(), (paddr_t)addr);
    362 	if (ret != 0)
    363 		return EIO;
    364 
    365 	return 0;
    366 }
    367 ARM_CPU_METHOD(spin_table, "spin-table", cpu_enable_spin_table);
    368 #endif
    369