cpu_fdt.c revision 1.4.2.4 1 /* $NetBSD: cpu_fdt.c,v 1.4.2.4 2018/09/06 06:55:26 pgoyette Exp $ */
2
3 /*-
4 * Copyright (c) 2017 Jared McNeill <jmcneill (at) invisible.ca>
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
21 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
22 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
23 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
24 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
27 */
28
29 #include <sys/cdefs.h>
30 __KERNEL_RCSID(0, "$NetBSD: cpu_fdt.c,v 1.4.2.4 2018/09/06 06:55:26 pgoyette Exp $");
31
32 #include <sys/param.h>
33 #include <sys/bus.h>
34 #include <sys/device.h>
35 #include <sys/lwp.h>
36 #include <sys/systm.h>
37 #include <sys/kernel.h>
38
39 #include <dev/fdt/fdtvar.h>
40
41 #include <arm/armreg.h>
42 #include <arm/cpu.h>
43 #include <arm/cpufunc.h>
44
45 static int cpu_fdt_match(device_t, cfdata_t, void *);
46 static void cpu_fdt_attach(device_t, device_t, void *);
47
48 enum cpu_fdt_type {
49 ARM_CPU_UP = 1,
50 ARM_CPU_ARMV7,
51 ARM_CPU_ARMV8,
52 };
53
54 struct cpu_fdt_softc {
55 device_t sc_dev;
56 int sc_phandle;
57 };
58
59 static const struct of_compat_data compat_data[] = {
60 { "arm,arm1176jzf-s", ARM_CPU_UP },
61
62 { "arm,arm-v7", ARM_CPU_ARMV7 },
63 { "arm,cortex-a5", ARM_CPU_ARMV7 },
64 { "arm,cortex-a7", ARM_CPU_ARMV7 },
65 { "arm,cortex-a8", ARM_CPU_ARMV7 },
66 { "arm,cortex-a9", ARM_CPU_ARMV7 },
67 { "arm,cortex-a12", ARM_CPU_ARMV7 },
68 { "arm,cortex-a15", ARM_CPU_ARMV7 },
69 { "arm,cortex-a17", ARM_CPU_ARMV7 },
70
71 { "arm,armv8", ARM_CPU_ARMV8 }, /* nonstandard */
72 { "arm,arm-v8", ARM_CPU_ARMV8 },
73 { "arm,cortex-a53", ARM_CPU_ARMV8 },
74 { "arm,cortex-a57", ARM_CPU_ARMV8 },
75 { "arm,cortex-a72", ARM_CPU_ARMV8 },
76 { "arm,cortex-a73", ARM_CPU_ARMV8 },
77
78 { NULL }
79 };
80
81 CFATTACH_DECL_NEW(cpu_fdt, sizeof(struct cpu_fdt_softc),
82 cpu_fdt_match, cpu_fdt_attach, NULL, NULL);
83
84 static int
85 cpu_fdt_match(device_t parent, cfdata_t cf, void *aux)
86 {
87 struct fdt_attach_args * const faa = aux;
88 const int phandle = faa->faa_phandle;
89 enum cpu_fdt_type type;
90 int is_compatible;
91 bus_addr_t mpidr;
92
93 is_compatible = of_match_compat_data(phandle, compat_data);
94 if (!is_compatible)
95 return 0;
96
97 type = of_search_compatible(phandle, compat_data)->data;
98 switch (type) {
99 case ARM_CPU_ARMV7:
100 case ARM_CPU_ARMV8:
101 if (fdtbus_get_reg(phandle, 0, &mpidr, NULL) != 0)
102 return 0;
103
104 #ifndef __aarch64__
105 /* XXX NetBSD/arm requires all CPUs to be in the same cluster */
106 const u_int bp_clid = cpu_clusterid();
107 const u_int clid = __SHIFTOUT(mpidr, MPIDR_AFF1);
108
109 if (bp_clid != clid)
110 return 0;
111 #endif
112 break;
113 default:
114 break;
115 }
116
117 return is_compatible;
118 }
119
120 static void
121 cpu_fdt_attach(device_t parent, device_t self, void *aux)
122 {
123 struct cpu_fdt_softc * const sc = device_private(self);
124 struct fdt_attach_args * const faa = aux;
125 const int phandle = faa->faa_phandle;
126 enum cpu_fdt_type type;
127 bus_addr_t mpidr;
128 cpuid_t cpuid;
129
130 sc->sc_dev = self;
131 sc->sc_phandle = phandle;
132
133 type = of_search_compatible(phandle, compat_data)->data;
134
135 switch (type) {
136 case ARM_CPU_ARMV7:
137 case ARM_CPU_ARMV8:
138 if (fdtbus_get_reg(phandle, 0, &mpidr, NULL) != 0) {
139 aprint_error(": missing 'reg' property\n");
140 return;
141 }
142 #ifndef __aarch64__
143 mpidr = __SHIFTOUT(mpidr, MPIDR_AFF0);
144 #endif
145 cpuid = mpidr;
146 break;
147 default:
148 cpuid = 0;
149 break;
150 }
151
152 /* Attach the CPU */
153 cpu_attach(self, cpuid);
154
155 /* Attach CPU frequency scaling provider */
156 config_found(self, faa, NULL);
157 }
158