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gic_fdt.c revision 1.3
      1 /* $NetBSD: gic_fdt.c,v 1.3 2017/05/28 00:40:20 jmcneill Exp $ */
      2 
      3 /*-
      4  * Copyright (c) 2015-2017 Jared McNeill <jmcneill (at) invisible.ca>
      5  * All rights reserved.
      6  *
      7  * Redistribution and use in source and binary forms, with or without
      8  * modification, are permitted provided that the following conditions
      9  * are met:
     10  * 1. Redistributions of source code must retain the above copyright
     11  *    notice, this list of conditions and the following disclaimer.
     12  * 2. Redistributions in binary form must reproduce the above copyright
     13  *    notice, this list of conditions and the following disclaimer in the
     14  *    documentation and/or other materials provided with the distribution.
     15  *
     16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     17  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     18  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     19  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     20  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
     21  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
     22  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
     23  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
     24  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     25  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     26  * SUCH DAMAGE.
     27  */
     28 
     29 #include <sys/cdefs.h>
     30 __KERNEL_RCSID(0, "$NetBSD: gic_fdt.c,v 1.3 2017/05/28 00:40:20 jmcneill Exp $");
     31 
     32 #include <sys/param.h>
     33 #include <sys/bus.h>
     34 #include <sys/device.h>
     35 #include <sys/intr.h>
     36 #include <sys/systm.h>
     37 #include <sys/kernel.h>
     38 #include <sys/kmem.h>
     39 
     40 #include <arm/cortex/gic_intr.h>
     41 #include <arm/cortex/mpcore_var.h>
     42 
     43 #include <dev/fdt/fdtvar.h>
     44 
     45 static int	gic_fdt_match(device_t, cfdata_t, void *);
     46 static void	gic_fdt_attach(device_t, device_t, void *);
     47 
     48 static void *	gic_fdt_establish(device_t, u_int *, int, int,
     49 		    int (*)(void *), void *);
     50 static void	gic_fdt_disestablish(device_t, void *);
     51 static bool	gic_fdt_intrstr(device_t, u_int *, char *, size_t);
     52 
     53 struct fdtbus_interrupt_controller_func gic_fdt_funcs = {
     54 	.establish = gic_fdt_establish,
     55 	.disestablish = gic_fdt_disestablish,
     56 	.intrstr = gic_fdt_intrstr
     57 };
     58 
     59 struct gic_fdt_softc {
     60 	device_t		sc_dev;
     61 	int			sc_phandle;
     62 };
     63 
     64 CFATTACH_DECL_NEW(gic_fdt, sizeof(struct gic_fdt_softc),
     65 	gic_fdt_match, gic_fdt_attach, NULL, NULL);
     66 
     67 static int
     68 gic_fdt_match(device_t parent, cfdata_t cf, void *aux)
     69 {
     70 	const char * const compatible[] = {
     71 		"arm,gic-400",
     72 		"arm,cortex-a15-gic",
     73 		"arm,cortex-a9-gic",
     74 		"arm,cortex-a7-gic",
     75 		NULL
     76 	};
     77 	struct fdt_attach_args * const faa = aux;
     78 
     79 	return of_compatible(faa->faa_phandle, compatible) >= 0;
     80 }
     81 
     82 static void
     83 gic_fdt_attach(device_t parent, device_t self, void *aux)
     84 {
     85 	struct gic_fdt_softc * const sc = device_private(self);
     86 	struct fdt_attach_args * const faa = aux;
     87 	bus_addr_t addr_d, addr_c;
     88 	bus_size_t size_d, size_c;
     89 	bus_space_handle_t bsh;
     90 	int error;
     91 
     92 	sc->sc_dev = self;
     93 	sc->sc_phandle = faa->faa_phandle;
     94 
     95 	error = fdtbus_register_interrupt_controller(self, faa->faa_phandle,
     96 	    &gic_fdt_funcs);
     97 	if (error) {
     98 		aprint_error(": couldn't register with fdtbus: %d\n", error);
     99 		return;
    100 	}
    101 
    102 	aprint_naive("\n");
    103 	aprint_normal(": GIC\n");
    104 
    105 	if (fdtbus_get_reg(sc->sc_phandle, 0, &addr_d, &size_d) != 0) {
    106 		aprint_error(": couldn't get distributor address\n");
    107 		return;
    108 	}
    109 	if (fdtbus_get_reg(sc->sc_phandle, 1, &addr_c, &size_c) != 0) {
    110 		aprint_error(": couldn't get cpu interface address\n");
    111 		return;
    112 	}
    113 
    114 	const bus_addr_t addr = addr_d;
    115 	const bus_size_t size = (addr_c + size_c) - addr_d;
    116 
    117 	error = bus_space_map(faa->faa_bst, addr, size, 0, &bsh);
    118 	if (error) {
    119 		aprint_error(": couldn't map registers: %d\n", error);
    120 		return;
    121 	}
    122 
    123 	struct mpcore_attach_args mpcaa = {
    124 		.mpcaa_name = "armgic",
    125 		.mpcaa_memt = faa->faa_bst,
    126 		.mpcaa_memh = bsh,
    127 		.mpcaa_off1 = 0,
    128 		.mpcaa_off2 = addr_c - addr_d
    129 	};
    130 
    131 	config_found(self, &mpcaa, NULL);
    132 }
    133 
    134 static void *
    135 gic_fdt_establish(device_t dev, u_int *specifier, int ipl, int flags,
    136     int (*func)(void *), void *arg)
    137 {
    138 	int iflags = (flags & FDT_INTR_MPSAFE) ? IST_MPSAFE : 0;
    139 
    140 	/* 1st cell is the interrupt type; 0 is SPI, 1 is PPI */
    141 	/* 2nd cell is the interrupt number */
    142 	/* 3rd cell is flags */
    143 
    144 	const u_int type = be32toh(specifier[0]);
    145 	const u_int intr = be32toh(specifier[1]);
    146 	const u_int irq = type == 0 ? IRQ_SPI(intr) : IRQ_PPI(intr);
    147 	const u_int trig = be32toh(specifier[2]) & 0xf;
    148 	const u_int level = (trig & 0x3) ? IST_EDGE : IST_LEVEL;
    149 
    150 	return intr_establish(irq, ipl, level | iflags, func, arg);
    151 }
    152 
    153 static void
    154 gic_fdt_disestablish(device_t dev, void *ih)
    155 {
    156 	intr_disestablish(ih);
    157 }
    158 
    159 static bool
    160 gic_fdt_intrstr(device_t dev, u_int *specifier, char *buf, size_t buflen)
    161 {
    162 	/* 1st cell is the interrupt type; 0 is SPI, 1 is PPI */
    163 	/* 2nd cell is the interrupt number */
    164 	/* 3rd cell is flags */
    165 
    166 	if (!specifier)
    167 		return false;
    168 	const u_int type = be32toh(specifier[0]);
    169 	const u_int intr = be32toh(specifier[1]);
    170 	const u_int irq = type == 0 ? IRQ_SPI(intr) : IRQ_PPI(intr);
    171 
    172 	snprintf(buf, buflen, "GIC irq %d", irq);
    173 
    174 	return true;
    175 }
    176