pcihost_fdt.c revision 1.2.2.3
1 1.2.2.3 pgoyette /* $NetBSD: pcihost_fdt.c,v 1.2.2.3 2018/11/26 01:52:18 pgoyette Exp $ */ 2 1.2.2.2 pgoyette 3 1.2.2.2 pgoyette /*- 4 1.2.2.2 pgoyette * Copyright (c) 2018 Jared D. McNeill <jmcneill (at) invisible.ca> 5 1.2.2.2 pgoyette * All rights reserved. 6 1.2.2.2 pgoyette * 7 1.2.2.2 pgoyette * Redistribution and use in source and binary forms, with or without 8 1.2.2.2 pgoyette * modification, are permitted provided that the following conditions 9 1.2.2.2 pgoyette * are met: 10 1.2.2.2 pgoyette * 1. Redistributions of source code must retain the above copyright 11 1.2.2.2 pgoyette * notice, this list of conditions and the following disclaimer. 12 1.2.2.2 pgoyette * 2. Redistributions in binary form must reproduce the above copyright 13 1.2.2.2 pgoyette * notice, this list of conditions and the following disclaimer in the 14 1.2.2.2 pgoyette * documentation and/or other materials provided with the distribution. 15 1.2.2.2 pgoyette * 16 1.2.2.2 pgoyette * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 17 1.2.2.2 pgoyette * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 18 1.2.2.2 pgoyette * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 19 1.2.2.2 pgoyette * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 20 1.2.2.2 pgoyette * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 21 1.2.2.2 pgoyette * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 22 1.2.2.2 pgoyette * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 23 1.2.2.2 pgoyette * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 24 1.2.2.2 pgoyette * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 1.2.2.2 pgoyette * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 1.2.2.2 pgoyette * SUCH DAMAGE. 27 1.2.2.2 pgoyette */ 28 1.2.2.2 pgoyette 29 1.2.2.2 pgoyette #include <sys/cdefs.h> 30 1.2.2.3 pgoyette __KERNEL_RCSID(0, "$NetBSD: pcihost_fdt.c,v 1.2.2.3 2018/11/26 01:52:18 pgoyette Exp $"); 31 1.2.2.2 pgoyette 32 1.2.2.2 pgoyette #include <sys/param.h> 33 1.2.2.2 pgoyette #include <sys/bus.h> 34 1.2.2.2 pgoyette #include <sys/device.h> 35 1.2.2.2 pgoyette #include <sys/intr.h> 36 1.2.2.2 pgoyette #include <sys/systm.h> 37 1.2.2.2 pgoyette #include <sys/kernel.h> 38 1.2.2.2 pgoyette #include <sys/extent.h> 39 1.2.2.2 pgoyette #include <sys/queue.h> 40 1.2.2.2 pgoyette #include <sys/mutex.h> 41 1.2.2.2 pgoyette #include <sys/kmem.h> 42 1.2.2.2 pgoyette 43 1.2.2.2 pgoyette #include <machine/cpu.h> 44 1.2.2.2 pgoyette 45 1.2.2.2 pgoyette #include <arm/cpufunc.h> 46 1.2.2.2 pgoyette 47 1.2.2.2 pgoyette #include <dev/pci/pcireg.h> 48 1.2.2.2 pgoyette #include <dev/pci/pcivar.h> 49 1.2.2.2 pgoyette #include <dev/pci/pciconf.h> 50 1.2.2.2 pgoyette 51 1.2.2.2 pgoyette #include <dev/fdt/fdtvar.h> 52 1.2.2.2 pgoyette 53 1.2.2.3 pgoyette #include <arm/pci/pci_msi_machdep.h> 54 1.2.2.3 pgoyette 55 1.2.2.2 pgoyette #define IH_INDEX_MASK 0x0000ffff 56 1.2.2.2 pgoyette #define IH_MPSAFE 0x80000000 57 1.2.2.2 pgoyette 58 1.2.2.2 pgoyette #define PCIHOST_DEFAULT_BUS_MIN 0 59 1.2.2.2 pgoyette #define PCIHOST_DEFAULT_BUS_MAX 255 60 1.2.2.2 pgoyette 61 1.2.2.2 pgoyette #define PCIHOST_CACHELINE_SIZE arm_dcache_align 62 1.2.2.2 pgoyette 63 1.2.2.2 pgoyette /* Physical address format bit definitions */ 64 1.2.2.2 pgoyette #define PHYS_HI_RELO __BIT(31) 65 1.2.2.2 pgoyette #define PHYS_HI_PREFETCH __BIT(30) 66 1.2.2.2 pgoyette #define PHYS_HI_ALIASED __BIT(29) 67 1.2.2.2 pgoyette #define PHYS_HI_SPACE __BITS(25,24) 68 1.2.2.2 pgoyette #define PHYS_HI_SPACE_CFG 0 69 1.2.2.2 pgoyette #define PHYS_HI_SPACE_IO 1 70 1.2.2.2 pgoyette #define PHYS_HI_SPACE_MEM32 2 71 1.2.2.2 pgoyette #define PHYS_HI_SPACE_MEM64 3 72 1.2.2.2 pgoyette #define PHYS_HI_BUS __BITS(23,16) 73 1.2.2.2 pgoyette #define PHYS_HI_DEVICE __BITS(15,11) 74 1.2.2.2 pgoyette #define PHYS_HI_FUNCTION __BITS(10,8) 75 1.2.2.2 pgoyette #define PHYS_HI_REGISTER __BITS(7,0) 76 1.2.2.2 pgoyette 77 1.2.2.3 pgoyette static int pcihost_segment = 0; 78 1.2.2.3 pgoyette 79 1.2.2.2 pgoyette enum pcihost_type { 80 1.2.2.2 pgoyette PCIHOST_CAM = 1, 81 1.2.2.2 pgoyette PCIHOST_ECAM, 82 1.2.2.2 pgoyette }; 83 1.2.2.2 pgoyette 84 1.2.2.2 pgoyette struct pcihost_softc { 85 1.2.2.2 pgoyette device_t sc_dev; 86 1.2.2.2 pgoyette bus_dma_tag_t sc_dmat; 87 1.2.2.2 pgoyette bus_space_tag_t sc_bst; 88 1.2.2.2 pgoyette bus_space_handle_t sc_bsh; 89 1.2.2.2 pgoyette int sc_phandle; 90 1.2.2.2 pgoyette 91 1.2.2.2 pgoyette enum pcihost_type sc_type; 92 1.2.2.2 pgoyette 93 1.2.2.3 pgoyette u_int sc_seg; 94 1.2.2.2 pgoyette u_int sc_bus_min; 95 1.2.2.2 pgoyette u_int sc_bus_max; 96 1.2.2.2 pgoyette 97 1.2.2.2 pgoyette struct arm32_pci_chipset sc_pc; 98 1.2.2.2 pgoyette }; 99 1.2.2.2 pgoyette 100 1.2.2.2 pgoyette static int pcihost_match(device_t, cfdata_t, void *); 101 1.2.2.2 pgoyette static void pcihost_attach(device_t, device_t, void *); 102 1.2.2.2 pgoyette 103 1.2.2.2 pgoyette static void pcihost_init(pci_chipset_tag_t, void *); 104 1.2.2.2 pgoyette static int pcihost_config(struct pcihost_softc *); 105 1.2.2.2 pgoyette 106 1.2.2.2 pgoyette static void pcihost_attach_hook(device_t, device_t, 107 1.2.2.2 pgoyette struct pcibus_attach_args *); 108 1.2.2.2 pgoyette static int pcihost_bus_maxdevs(void *, int); 109 1.2.2.2 pgoyette static pcitag_t pcihost_make_tag(void *, int, int, int); 110 1.2.2.2 pgoyette static void pcihost_decompose_tag(void *, pcitag_t, int *, int *, int *); 111 1.2.2.3 pgoyette static u_int pcihost_get_segment(void *); 112 1.2.2.2 pgoyette static pcireg_t pcihost_conf_read(void *, pcitag_t, int); 113 1.2.2.2 pgoyette static void pcihost_conf_write(void *, pcitag_t, int, pcireg_t); 114 1.2.2.2 pgoyette static int pcihost_conf_hook(void *, int, int, int, pcireg_t); 115 1.2.2.2 pgoyette static void pcihost_conf_interrupt(void *, int, int, int, int, int *); 116 1.2.2.2 pgoyette 117 1.2.2.2 pgoyette static int pcihost_intr_map(const struct pci_attach_args *, 118 1.2.2.2 pgoyette pci_intr_handle_t *); 119 1.2.2.2 pgoyette static const char *pcihost_intr_string(void *, pci_intr_handle_t, 120 1.2.2.2 pgoyette char *, size_t); 121 1.2.2.3 pgoyette static const struct evcnt *pcihost_intr_evcnt(void *, pci_intr_handle_t); 122 1.2.2.2 pgoyette static int pcihost_intr_setattr(void *, pci_intr_handle_t *, int, 123 1.2.2.2 pgoyette uint64_t); 124 1.2.2.2 pgoyette static void * pcihost_intr_establish(void *, pci_intr_handle_t, 125 1.2.2.3 pgoyette int, int (*)(void *), void *, 126 1.2.2.3 pgoyette const char *); 127 1.2.2.2 pgoyette static void pcihost_intr_disestablish(void *, void *); 128 1.2.2.2 pgoyette 129 1.2.2.2 pgoyette CFATTACH_DECL_NEW(pcihost_fdt, sizeof(struct pcihost_softc), 130 1.2.2.2 pgoyette pcihost_match, pcihost_attach, NULL, NULL); 131 1.2.2.2 pgoyette 132 1.2.2.2 pgoyette static const struct of_compat_data compat_data[] = { 133 1.2.2.2 pgoyette { "pci-host-cam-generic", PCIHOST_CAM }, 134 1.2.2.2 pgoyette { "pci-host-ecam-generic", PCIHOST_ECAM }, 135 1.2.2.2 pgoyette { NULL, 0 } 136 1.2.2.2 pgoyette }; 137 1.2.2.2 pgoyette 138 1.2.2.2 pgoyette static int 139 1.2.2.2 pgoyette pcihost_match(device_t parent, cfdata_t cf, void *aux) 140 1.2.2.2 pgoyette { 141 1.2.2.2 pgoyette struct fdt_attach_args * const faa = aux; 142 1.2.2.2 pgoyette 143 1.2.2.2 pgoyette return of_match_compat_data(faa->faa_phandle, compat_data); 144 1.2.2.2 pgoyette } 145 1.2.2.2 pgoyette 146 1.2.2.2 pgoyette static void 147 1.2.2.2 pgoyette pcihost_attach(device_t parent, device_t self, void *aux) 148 1.2.2.2 pgoyette { 149 1.2.2.2 pgoyette struct pcihost_softc * const sc = device_private(self); 150 1.2.2.2 pgoyette struct fdt_attach_args * const faa = aux; 151 1.2.2.2 pgoyette struct pcibus_attach_args pba; 152 1.2.2.2 pgoyette bus_addr_t cs_addr; 153 1.2.2.2 pgoyette bus_size_t cs_size; 154 1.2.2.2 pgoyette const u_int *data; 155 1.2.2.2 pgoyette int error, len; 156 1.2.2.2 pgoyette 157 1.2.2.2 pgoyette if (fdtbus_get_reg(faa->faa_phandle, 0, &cs_addr, &cs_size) != 0) { 158 1.2.2.2 pgoyette aprint_error(": couldn't get registers\n"); 159 1.2.2.2 pgoyette return; 160 1.2.2.2 pgoyette } 161 1.2.2.2 pgoyette 162 1.2.2.2 pgoyette sc->sc_dev = self; 163 1.2.2.2 pgoyette sc->sc_dmat = faa->faa_dmat; 164 1.2.2.2 pgoyette sc->sc_bst = faa->faa_bst; 165 1.2.2.2 pgoyette sc->sc_phandle = faa->faa_phandle; 166 1.2.2.2 pgoyette error = bus_space_map(sc->sc_bst, cs_addr, cs_size, 0, &sc->sc_bsh); 167 1.2.2.2 pgoyette if (error) { 168 1.2.2.2 pgoyette aprint_error(": couldn't map registers: %d\n", error); 169 1.2.2.2 pgoyette return; 170 1.2.2.2 pgoyette } 171 1.2.2.2 pgoyette sc->sc_type = of_search_compatible(sc->sc_phandle, compat_data)->data; 172 1.2.2.2 pgoyette 173 1.2.2.2 pgoyette aprint_naive("\n"); 174 1.2.2.2 pgoyette aprint_normal(": Generic PCI host controller\n"); 175 1.2.2.2 pgoyette 176 1.2.2.2 pgoyette if ((data = fdtbus_get_prop(sc->sc_phandle, "bus-range", &len)) != NULL) { 177 1.2.2.2 pgoyette if (len != 8) { 178 1.2.2.2 pgoyette aprint_error_dev(self, "malformed 'bus-range' property\n"); 179 1.2.2.2 pgoyette return; 180 1.2.2.2 pgoyette } 181 1.2.2.2 pgoyette sc->sc_bus_min = be32toh(data[0]); 182 1.2.2.2 pgoyette sc->sc_bus_max = be32toh(data[1]); 183 1.2.2.2 pgoyette } else { 184 1.2.2.2 pgoyette sc->sc_bus_min = PCIHOST_DEFAULT_BUS_MIN; 185 1.2.2.2 pgoyette sc->sc_bus_max = PCIHOST_DEFAULT_BUS_MAX; 186 1.2.2.2 pgoyette } 187 1.2.2.2 pgoyette 188 1.2.2.3 pgoyette /* 189 1.2.2.3 pgoyette * Assign a fixed PCI segment ("domain") number. If the property is not 190 1.2.2.3 pgoyette * present, assign one. The binding spec says if this property is used to 191 1.2.2.3 pgoyette * assign static segment numbers, all host bridges should have segments 192 1.2.2.3 pgoyette * astatic assigned to prevent overlaps. 193 1.2.2.3 pgoyette */ 194 1.2.2.3 pgoyette if (of_getprop_uint32(sc->sc_phandle, "linux,pci-domain", &sc->sc_seg)) 195 1.2.2.3 pgoyette sc->sc_seg = pcihost_segment++; 196 1.2.2.3 pgoyette 197 1.2.2.2 pgoyette pcihost_init(&sc->sc_pc, sc); 198 1.2.2.2 pgoyette 199 1.2.2.2 pgoyette if (pcihost_config(sc) != 0) 200 1.2.2.2 pgoyette return; 201 1.2.2.2 pgoyette 202 1.2.2.2 pgoyette memset(&pba, 0, sizeof(pba)); 203 1.2.2.2 pgoyette pba.pba_flags = PCI_FLAGS_MRL_OKAY | 204 1.2.2.2 pgoyette PCI_FLAGS_MRM_OKAY | 205 1.2.2.2 pgoyette PCI_FLAGS_MWI_OKAY | 206 1.2.2.3 pgoyette PCI_FLAGS_MEM_OKAY; 207 1.2.2.3 pgoyette #ifdef __HAVE_PCI_MSI_MSIX 208 1.2.2.3 pgoyette if (sc->sc_type == PCIHOST_ECAM) { 209 1.2.2.3 pgoyette pba.pba_flags |= PCI_FLAGS_MSI_OKAY | 210 1.2.2.3 pgoyette PCI_FLAGS_MSIX_OKAY; 211 1.2.2.3 pgoyette } 212 1.2.2.3 pgoyette #endif 213 1.2.2.3 pgoyette pba.pba_iot = 0; 214 1.2.2.2 pgoyette pba.pba_memt = sc->sc_bst; 215 1.2.2.2 pgoyette pba.pba_dmat = sc->sc_dmat; 216 1.2.2.2 pgoyette #ifdef _PCI_HAVE_DMA64 217 1.2.2.2 pgoyette pba.pba_dmat64 = sc->sc_dmat; 218 1.2.2.2 pgoyette #endif 219 1.2.2.2 pgoyette pba.pba_pc = &sc->sc_pc; 220 1.2.2.3 pgoyette pba.pba_bus = sc->sc_bus_min; 221 1.2.2.2 pgoyette 222 1.2.2.2 pgoyette config_found_ia(self, "pcibus", &pba, pcibusprint); 223 1.2.2.2 pgoyette } 224 1.2.2.2 pgoyette 225 1.2.2.2 pgoyette static void 226 1.2.2.2 pgoyette pcihost_init(pci_chipset_tag_t pc, void *priv) 227 1.2.2.2 pgoyette { 228 1.2.2.2 pgoyette pc->pc_conf_v = priv; 229 1.2.2.2 pgoyette pc->pc_attach_hook = pcihost_attach_hook; 230 1.2.2.2 pgoyette pc->pc_bus_maxdevs = pcihost_bus_maxdevs; 231 1.2.2.2 pgoyette pc->pc_make_tag = pcihost_make_tag; 232 1.2.2.2 pgoyette pc->pc_decompose_tag = pcihost_decompose_tag; 233 1.2.2.3 pgoyette pc->pc_get_segment = pcihost_get_segment; 234 1.2.2.2 pgoyette pc->pc_conf_read = pcihost_conf_read; 235 1.2.2.2 pgoyette pc->pc_conf_write = pcihost_conf_write; 236 1.2.2.2 pgoyette pc->pc_conf_hook = pcihost_conf_hook; 237 1.2.2.2 pgoyette pc->pc_conf_interrupt = pcihost_conf_interrupt; 238 1.2.2.2 pgoyette 239 1.2.2.2 pgoyette pc->pc_intr_v = priv; 240 1.2.2.2 pgoyette pc->pc_intr_map = pcihost_intr_map; 241 1.2.2.2 pgoyette pc->pc_intr_string = pcihost_intr_string; 242 1.2.2.2 pgoyette pc->pc_intr_evcnt = pcihost_intr_evcnt; 243 1.2.2.2 pgoyette pc->pc_intr_setattr = pcihost_intr_setattr; 244 1.2.2.2 pgoyette pc->pc_intr_establish = pcihost_intr_establish; 245 1.2.2.2 pgoyette pc->pc_intr_disestablish = pcihost_intr_disestablish; 246 1.2.2.2 pgoyette } 247 1.2.2.2 pgoyette 248 1.2.2.2 pgoyette static int 249 1.2.2.2 pgoyette pcihost_config(struct pcihost_softc *sc) 250 1.2.2.2 pgoyette { 251 1.2.2.2 pgoyette struct extent *ioext = NULL, *memext = NULL, *pmemext = NULL; 252 1.2.2.2 pgoyette const u_int *ranges; 253 1.2.2.3 pgoyette u_int probe_only; 254 1.2.2.2 pgoyette int error, len; 255 1.2.2.2 pgoyette 256 1.2.2.3 pgoyette /* 257 1.2.2.3 pgoyette * If this flag is set, skip configuration of the PCI bus and use existing config. 258 1.2.2.3 pgoyette */ 259 1.2.2.3 pgoyette if (of_getprop_uint32(sc->sc_phandle, "linux,pci-probe-only", &probe_only)) 260 1.2.2.3 pgoyette probe_only = 0; 261 1.2.2.3 pgoyette if (probe_only) 262 1.2.2.3 pgoyette return 0; 263 1.2.2.3 pgoyette 264 1.2.2.2 pgoyette ranges = fdtbus_get_prop(sc->sc_phandle, "ranges", &len); 265 1.2.2.2 pgoyette if (ranges == NULL) { 266 1.2.2.2 pgoyette aprint_error_dev(sc->sc_dev, "missing 'ranges' property\n"); 267 1.2.2.2 pgoyette return EINVAL; 268 1.2.2.2 pgoyette } 269 1.2.2.2 pgoyette 270 1.2.2.2 pgoyette /* 271 1.2.2.2 pgoyette * Each entry in the ranges table contains: 272 1.2.2.2 pgoyette * - bus address (3 cells) 273 1.2.2.2 pgoyette * - cpu physical address (2 cells) 274 1.2.2.2 pgoyette * - size (2 cells) 275 1.2.2.2 pgoyette * Total size for each entry is 28 bytes (7 cells). 276 1.2.2.2 pgoyette */ 277 1.2.2.2 pgoyette while (len >= 28) { 278 1.2.2.2 pgoyette const uint32_t phys_hi = be32dec(&ranges[0]); 279 1.2.2.2 pgoyette const uint64_t cpu_phys = be64dec(&ranges[3]); 280 1.2.2.2 pgoyette const uint64_t size = be64dec(&ranges[5]); 281 1.2.2.2 pgoyette 282 1.2.2.2 pgoyette switch (__SHIFTOUT(phys_hi, PHYS_HI_SPACE)) { 283 1.2.2.2 pgoyette case PHYS_HI_SPACE_IO: 284 1.2.2.2 pgoyette if (ioext != NULL) { 285 1.2.2.2 pgoyette aprint_error_dev(sc->sc_dev, "ignoring duplicate IO space range\n"); 286 1.2.2.2 pgoyette continue; 287 1.2.2.2 pgoyette } 288 1.2.2.2 pgoyette ioext = extent_create("pciio", cpu_phys, cpu_phys + size - 1, NULL, 0, EX_NOWAIT); 289 1.2.2.2 pgoyette aprint_verbose_dev(sc->sc_dev, 290 1.2.2.2 pgoyette "I/O memory @ 0x%" PRIx64 " size 0x%" PRIx64 "\n", 291 1.2.2.2 pgoyette cpu_phys, size); 292 1.2.2.2 pgoyette break; 293 1.2.2.2 pgoyette case PHYS_HI_SPACE_MEM32: 294 1.2.2.2 pgoyette if ((phys_hi & PHYS_HI_PREFETCH) != 0) { 295 1.2.2.2 pgoyette if (pmemext != NULL) { 296 1.2.2.2 pgoyette aprint_error_dev(sc->sc_dev, "ignoring duplicate mem (prefetchable) range\n"); 297 1.2.2.2 pgoyette continue; 298 1.2.2.2 pgoyette } 299 1.2.2.2 pgoyette pmemext = extent_create("pcipmem", cpu_phys, cpu_phys + size - 1, NULL, 0, EX_NOWAIT); 300 1.2.2.2 pgoyette aprint_verbose_dev(sc->sc_dev, 301 1.2.2.2 pgoyette "32-bit MMIO (prefetchable) @ 0x%" PRIx64 " size 0x%" PRIx64 "\n", 302 1.2.2.2 pgoyette cpu_phys, size); 303 1.2.2.2 pgoyette } else { 304 1.2.2.2 pgoyette if (memext != NULL) { 305 1.2.2.2 pgoyette aprint_error_dev(sc->sc_dev, "ignoring duplicate mem (non-prefetchable) range\n"); 306 1.2.2.2 pgoyette continue; 307 1.2.2.2 pgoyette } 308 1.2.2.2 pgoyette memext = extent_create("pcimem", cpu_phys, cpu_phys + size - 1, NULL, 0, EX_NOWAIT); 309 1.2.2.2 pgoyette aprint_verbose_dev(sc->sc_dev, 310 1.2.2.2 pgoyette "32-bit MMIO (non-prefetchable) @ 0x%" PRIx64 " size 0x%" PRIx64 "\n", 311 1.2.2.2 pgoyette cpu_phys, size); 312 1.2.2.2 pgoyette } 313 1.2.2.2 pgoyette break; 314 1.2.2.2 pgoyette default: 315 1.2.2.2 pgoyette break; 316 1.2.2.2 pgoyette } 317 1.2.2.2 pgoyette 318 1.2.2.2 pgoyette len -= 28; 319 1.2.2.2 pgoyette ranges += 7; 320 1.2.2.2 pgoyette } 321 1.2.2.2 pgoyette 322 1.2.2.2 pgoyette error = pci_configure_bus(&sc->sc_pc, ioext, memext, pmemext, sc->sc_bus_min, PCIHOST_CACHELINE_SIZE); 323 1.2.2.2 pgoyette 324 1.2.2.2 pgoyette if (ioext) 325 1.2.2.2 pgoyette extent_destroy(ioext); 326 1.2.2.2 pgoyette if (memext) 327 1.2.2.2 pgoyette extent_destroy(memext); 328 1.2.2.2 pgoyette if (pmemext) 329 1.2.2.2 pgoyette extent_destroy(pmemext); 330 1.2.2.2 pgoyette 331 1.2.2.2 pgoyette if (error) { 332 1.2.2.2 pgoyette aprint_error_dev(sc->sc_dev, "configuration failed: %d\n", error); 333 1.2.2.2 pgoyette return error; 334 1.2.2.2 pgoyette } 335 1.2.2.2 pgoyette 336 1.2.2.2 pgoyette return 0; 337 1.2.2.2 pgoyette } 338 1.2.2.2 pgoyette 339 1.2.2.2 pgoyette static void 340 1.2.2.2 pgoyette pcihost_attach_hook(device_t parent, device_t self, 341 1.2.2.2 pgoyette struct pcibus_attach_args *pba) 342 1.2.2.2 pgoyette { 343 1.2.2.2 pgoyette } 344 1.2.2.2 pgoyette 345 1.2.2.2 pgoyette static int 346 1.2.2.2 pgoyette pcihost_bus_maxdevs(void *v, int busno) 347 1.2.2.2 pgoyette { 348 1.2.2.2 pgoyette return 32; 349 1.2.2.2 pgoyette } 350 1.2.2.2 pgoyette 351 1.2.2.2 pgoyette static pcitag_t 352 1.2.2.2 pgoyette pcihost_make_tag(void *v, int b, int d, int f) 353 1.2.2.2 pgoyette { 354 1.2.2.2 pgoyette return (b << 16) | (d << 11) | (f << 8); 355 1.2.2.2 pgoyette } 356 1.2.2.2 pgoyette 357 1.2.2.2 pgoyette static void 358 1.2.2.2 pgoyette pcihost_decompose_tag(void *v, pcitag_t tag, int *bp, int *dp, int *fp) 359 1.2.2.2 pgoyette { 360 1.2.2.2 pgoyette if (bp) 361 1.2.2.2 pgoyette *bp = (tag >> 16) & 0xff; 362 1.2.2.2 pgoyette if (dp) 363 1.2.2.2 pgoyette *dp = (tag >> 11) & 0x1f; 364 1.2.2.2 pgoyette if (fp) 365 1.2.2.2 pgoyette *fp = (tag >> 8) & 0x7; 366 1.2.2.2 pgoyette } 367 1.2.2.2 pgoyette 368 1.2.2.3 pgoyette static u_int 369 1.2.2.3 pgoyette pcihost_get_segment(void *v) 370 1.2.2.3 pgoyette { 371 1.2.2.3 pgoyette struct pcihost_softc *sc = v; 372 1.2.2.3 pgoyette 373 1.2.2.3 pgoyette return sc->sc_seg; 374 1.2.2.3 pgoyette } 375 1.2.2.3 pgoyette 376 1.2.2.2 pgoyette static pcireg_t 377 1.2.2.2 pgoyette pcihost_conf_read(void *v, pcitag_t tag, int offset) 378 1.2.2.2 pgoyette { 379 1.2.2.2 pgoyette struct pcihost_softc *sc = v; 380 1.2.2.2 pgoyette int b, d, f; 381 1.2.2.2 pgoyette u_int reg; 382 1.2.2.2 pgoyette 383 1.2.2.2 pgoyette pcihost_decompose_tag(v, tag, &b, &d, &f); 384 1.2.2.2 pgoyette 385 1.2.2.2 pgoyette if (b < sc->sc_bus_min || b > sc->sc_bus_max) 386 1.2.2.2 pgoyette return (pcireg_t) -1; 387 1.2.2.2 pgoyette 388 1.2.2.2 pgoyette if (sc->sc_type == PCIHOST_CAM) { 389 1.2.2.2 pgoyette if (offset & ~0xff) 390 1.2.2.2 pgoyette return (pcireg_t) -1; 391 1.2.2.2 pgoyette reg = (b << 16) | (d << 11) | (f << 8) | offset; 392 1.2.2.2 pgoyette } else if (sc->sc_type == PCIHOST_ECAM) { 393 1.2.2.2 pgoyette if (offset & ~0xfff) 394 1.2.2.2 pgoyette return (pcireg_t) -1; 395 1.2.2.2 pgoyette reg = (b << 20) | (d << 15) | (f << 12) | offset; 396 1.2.2.2 pgoyette } else { 397 1.2.2.2 pgoyette return (pcireg_t) -1; 398 1.2.2.2 pgoyette } 399 1.2.2.2 pgoyette 400 1.2.2.2 pgoyette return bus_space_read_4(sc->sc_bst, sc->sc_bsh, reg); 401 1.2.2.2 pgoyette } 402 1.2.2.2 pgoyette 403 1.2.2.2 pgoyette static void 404 1.2.2.2 pgoyette pcihost_conf_write(void *v, pcitag_t tag, int offset, pcireg_t val) 405 1.2.2.2 pgoyette { 406 1.2.2.2 pgoyette struct pcihost_softc *sc = v; 407 1.2.2.2 pgoyette int b, d, f; 408 1.2.2.2 pgoyette u_int reg; 409 1.2.2.2 pgoyette 410 1.2.2.2 pgoyette pcihost_decompose_tag(v, tag, &b, &d, &f); 411 1.2.2.2 pgoyette 412 1.2.2.2 pgoyette if (b < sc->sc_bus_min || b > sc->sc_bus_max) 413 1.2.2.2 pgoyette return; 414 1.2.2.2 pgoyette 415 1.2.2.2 pgoyette if (sc->sc_type == PCIHOST_CAM) { 416 1.2.2.2 pgoyette if (offset & ~0xff) 417 1.2.2.2 pgoyette return; 418 1.2.2.2 pgoyette reg = (b << 16) | (d << 11) | (f << 8) | offset; 419 1.2.2.2 pgoyette } else if (sc->sc_type == PCIHOST_ECAM) { 420 1.2.2.2 pgoyette if (offset & ~0xfff) 421 1.2.2.2 pgoyette return; 422 1.2.2.2 pgoyette reg = (b << 20) | (d << 15) | (f << 12) | offset; 423 1.2.2.2 pgoyette } else { 424 1.2.2.2 pgoyette return; 425 1.2.2.2 pgoyette } 426 1.2.2.2 pgoyette 427 1.2.2.2 pgoyette bus_space_write_4(sc->sc_bst, sc->sc_bsh, reg, val); 428 1.2.2.2 pgoyette } 429 1.2.2.2 pgoyette 430 1.2.2.2 pgoyette static int 431 1.2.2.2 pgoyette pcihost_conf_hook(void *v, int b, int d, int f, pcireg_t id) 432 1.2.2.2 pgoyette { 433 1.2.2.2 pgoyette return PCI_CONF_DEFAULT; 434 1.2.2.2 pgoyette } 435 1.2.2.2 pgoyette 436 1.2.2.2 pgoyette static void 437 1.2.2.2 pgoyette pcihost_conf_interrupt(void *v, int bus, int dev, int ipin, int swiz, int *ilinep) 438 1.2.2.2 pgoyette { 439 1.2.2.2 pgoyette } 440 1.2.2.2 pgoyette 441 1.2.2.2 pgoyette static int 442 1.2.2.2 pgoyette pcihost_intr_map(const struct pci_attach_args *pa, pci_intr_handle_t *ih) 443 1.2.2.2 pgoyette { 444 1.2.2.2 pgoyette struct pcihost_softc *sc = pa->pa_pc->pc_intr_v; 445 1.2.2.2 pgoyette u_int addr_cells, interrupt_cells; 446 1.2.2.2 pgoyette const u_int *imap, *imask; 447 1.2.2.2 pgoyette int imaplen, imasklen; 448 1.2.2.2 pgoyette u_int match[4]; 449 1.2.2.2 pgoyette int index; 450 1.2.2.2 pgoyette 451 1.2.2.2 pgoyette if (pa->pa_intrpin == 0) 452 1.2.2.2 pgoyette return EINVAL; 453 1.2.2.2 pgoyette 454 1.2.2.2 pgoyette imap = fdtbus_get_prop(sc->sc_phandle, "interrupt-map", &imaplen); 455 1.2.2.2 pgoyette imask = fdtbus_get_prop(sc->sc_phandle, "interrupt-map-mask", &imasklen); 456 1.2.2.2 pgoyette if (imap == NULL || imask == NULL || imasklen != 16) 457 1.2.2.2 pgoyette return EINVAL; 458 1.2.2.2 pgoyette 459 1.2.2.2 pgoyette /* Convert attach args to specifier */ 460 1.2.2.2 pgoyette match[0] = htobe32( 461 1.2.2.2 pgoyette __SHIFTIN(pa->pa_bus, PHYS_HI_BUS) | 462 1.2.2.2 pgoyette __SHIFTIN(pa->pa_device, PHYS_HI_DEVICE) | 463 1.2.2.2 pgoyette __SHIFTIN(pa->pa_function, PHYS_HI_FUNCTION) 464 1.2.2.2 pgoyette ) & imask[0]; 465 1.2.2.2 pgoyette match[1] = htobe32(0) & imask[1]; 466 1.2.2.2 pgoyette match[2] = htobe32(0) & imask[2]; 467 1.2.2.2 pgoyette match[3] = htobe32(pa->pa_intrpin) & imask[3]; 468 1.2.2.2 pgoyette 469 1.2.2.2 pgoyette index = 0; 470 1.2.2.2 pgoyette while (imaplen >= 20) { 471 1.2.2.2 pgoyette const int map_ihandle = fdtbus_get_phandle_from_native(be32toh(imap[4])); 472 1.2.2.2 pgoyette if (of_getprop_uint32(map_ihandle, "#address-cells", &addr_cells)) 473 1.2.2.2 pgoyette addr_cells = 2; 474 1.2.2.2 pgoyette if (of_getprop_uint32(map_ihandle, "#interrupt-cells", &interrupt_cells)) 475 1.2.2.2 pgoyette interrupt_cells = 0; 476 1.2.2.2 pgoyette if (imaplen < (addr_cells + interrupt_cells) * 4) 477 1.2.2.2 pgoyette return ENXIO; 478 1.2.2.2 pgoyette 479 1.2.2.2 pgoyette if ((imap[0] & imask[0]) == match[0] && 480 1.2.2.2 pgoyette (imap[1] & imask[1]) == match[1] && 481 1.2.2.2 pgoyette (imap[2] & imask[2]) == match[2] && 482 1.2.2.2 pgoyette (imap[3] & imask[3]) == match[3]) { 483 1.2.2.2 pgoyette *ih = index; 484 1.2.2.2 pgoyette return 0; 485 1.2.2.2 pgoyette } 486 1.2.2.2 pgoyette 487 1.2.2.2 pgoyette imap += (5 + addr_cells + interrupt_cells); 488 1.2.2.2 pgoyette imaplen -= (5 + addr_cells + interrupt_cells) * 4; 489 1.2.2.2 pgoyette index++; 490 1.2.2.2 pgoyette } 491 1.2.2.2 pgoyette 492 1.2.2.2 pgoyette return EINVAL; 493 1.2.2.2 pgoyette } 494 1.2.2.2 pgoyette 495 1.2.2.2 pgoyette static const u_int * 496 1.2.2.2 pgoyette pcihost_find_intr(struct pcihost_softc *sc, pci_intr_handle_t ih, int *pihandle) 497 1.2.2.2 pgoyette { 498 1.2.2.2 pgoyette u_int addr_cells, interrupt_cells; 499 1.2.2.2 pgoyette int imaplen, index; 500 1.2.2.2 pgoyette const u_int *imap; 501 1.2.2.2 pgoyette 502 1.2.2.2 pgoyette imap = fdtbus_get_prop(sc->sc_phandle, "interrupt-map", &imaplen); 503 1.2.2.2 pgoyette KASSERT(imap != NULL); 504 1.2.2.2 pgoyette 505 1.2.2.2 pgoyette index = 0; 506 1.2.2.2 pgoyette while (imaplen >= 20) { 507 1.2.2.2 pgoyette const int map_ihandle = fdtbus_get_phandle_from_native(be32toh(imap[4])); 508 1.2.2.2 pgoyette if (of_getprop_uint32(map_ihandle, "#address-cells", &addr_cells)) 509 1.2.2.2 pgoyette addr_cells = 2; 510 1.2.2.2 pgoyette if (of_getprop_uint32(map_ihandle, "#interrupt-cells", &interrupt_cells)) 511 1.2.2.2 pgoyette interrupt_cells = 0; 512 1.2.2.2 pgoyette if (imaplen < (addr_cells + interrupt_cells) * 4) 513 1.2.2.2 pgoyette return NULL; 514 1.2.2.2 pgoyette 515 1.2.2.2 pgoyette if (index == ih) { 516 1.2.2.2 pgoyette *pihandle = map_ihandle; 517 1.2.2.2 pgoyette return imap + 5 + addr_cells; 518 1.2.2.2 pgoyette } 519 1.2.2.2 pgoyette 520 1.2.2.2 pgoyette imap += (5 + addr_cells + interrupt_cells); 521 1.2.2.2 pgoyette imaplen -= (5 + addr_cells + interrupt_cells) * 4; 522 1.2.2.2 pgoyette index++; 523 1.2.2.2 pgoyette } 524 1.2.2.2 pgoyette 525 1.2.2.2 pgoyette return NULL; 526 1.2.2.2 pgoyette } 527 1.2.2.2 pgoyette 528 1.2.2.2 pgoyette static const char * 529 1.2.2.2 pgoyette pcihost_intr_string(void *v, pci_intr_handle_t ih, char *buf, size_t len) 530 1.2.2.2 pgoyette { 531 1.2.2.3 pgoyette const int irq = __SHIFTOUT(ih, ARM_PCI_INTR_IRQ); 532 1.2.2.3 pgoyette const int vec = __SHIFTOUT(ih, ARM_PCI_INTR_MSI_VEC); 533 1.2.2.2 pgoyette struct pcihost_softc *sc = v; 534 1.2.2.2 pgoyette const u_int *specifier; 535 1.2.2.2 pgoyette int ihandle; 536 1.2.2.2 pgoyette 537 1.2.2.3 pgoyette if (ih & ARM_PCI_INTR_MSIX) { 538 1.2.2.3 pgoyette snprintf(buf, len, "irq %d (MSI-X vec %d)", irq, vec); 539 1.2.2.3 pgoyette } else if (ih & ARM_PCI_INTR_MSI) { 540 1.2.2.3 pgoyette snprintf(buf, len, "irq %d (MSI vec %d)", irq, vec); 541 1.2.2.3 pgoyette } else { 542 1.2.2.3 pgoyette specifier = pcihost_find_intr(sc, ih & IH_INDEX_MASK, &ihandle); 543 1.2.2.3 pgoyette if (specifier == NULL) 544 1.2.2.3 pgoyette return NULL; 545 1.2.2.2 pgoyette 546 1.2.2.3 pgoyette if (!fdtbus_intr_str_raw(ihandle, specifier, buf, len)) 547 1.2.2.3 pgoyette return NULL; 548 1.2.2.3 pgoyette } 549 1.2.2.2 pgoyette 550 1.2.2.2 pgoyette return buf; 551 1.2.2.2 pgoyette } 552 1.2.2.2 pgoyette 553 1.2.2.2 pgoyette const struct evcnt * 554 1.2.2.2 pgoyette pcihost_intr_evcnt(void *v, pci_intr_handle_t ih) 555 1.2.2.2 pgoyette { 556 1.2.2.2 pgoyette return NULL; 557 1.2.2.2 pgoyette } 558 1.2.2.2 pgoyette 559 1.2.2.2 pgoyette static int 560 1.2.2.2 pgoyette pcihost_intr_setattr(void *v, pci_intr_handle_t *ih, int attr, uint64_t data) 561 1.2.2.2 pgoyette { 562 1.2.2.2 pgoyette switch (attr) { 563 1.2.2.2 pgoyette case PCI_INTR_MPSAFE: 564 1.2.2.2 pgoyette if (data) 565 1.2.2.2 pgoyette *ih |= IH_MPSAFE; 566 1.2.2.2 pgoyette else 567 1.2.2.2 pgoyette *ih &= ~IH_MPSAFE; 568 1.2.2.2 pgoyette return 0; 569 1.2.2.2 pgoyette default: 570 1.2.2.2 pgoyette return ENODEV; 571 1.2.2.2 pgoyette } 572 1.2.2.2 pgoyette } 573 1.2.2.2 pgoyette 574 1.2.2.2 pgoyette static void * 575 1.2.2.2 pgoyette pcihost_intr_establish(void *v, pci_intr_handle_t ih, int ipl, 576 1.2.2.3 pgoyette int (*callback)(void *), void *arg, const char *xname) 577 1.2.2.2 pgoyette { 578 1.2.2.2 pgoyette struct pcihost_softc *sc = v; 579 1.2.2.2 pgoyette const int flags = (ih & IH_MPSAFE) ? FDT_INTR_MPSAFE : 0; 580 1.2.2.2 pgoyette const u_int *specifier; 581 1.2.2.2 pgoyette int ihandle; 582 1.2.2.2 pgoyette 583 1.2.2.3 pgoyette if ((ih & (ARM_PCI_INTR_MSI | ARM_PCI_INTR_MSIX)) != 0) 584 1.2.2.3 pgoyette return arm_pci_msi_intr_establish(&sc->sc_pc, ih, ipl, callback, arg, xname); 585 1.2.2.3 pgoyette 586 1.2.2.2 pgoyette specifier = pcihost_find_intr(sc, ih & IH_INDEX_MASK, &ihandle); 587 1.2.2.2 pgoyette if (specifier == NULL) 588 1.2.2.2 pgoyette return NULL; 589 1.2.2.2 pgoyette 590 1.2.2.2 pgoyette return fdtbus_intr_establish_raw(ihandle, specifier, ipl, flags, callback, arg); 591 1.2.2.2 pgoyette } 592 1.2.2.2 pgoyette 593 1.2.2.2 pgoyette static void 594 1.2.2.2 pgoyette pcihost_intr_disestablish(void *v, void *vih) 595 1.2.2.2 pgoyette { 596 1.2.2.2 pgoyette struct pcihost_softc *sc = v; 597 1.2.2.2 pgoyette 598 1.2.2.2 pgoyette fdtbus_intr_disestablish(sc->sc_phandle, vih); 599 1.2.2.2 pgoyette } 600
Indexes created Thu Oct 02 14:10:14 GMT 2025