footbridge_com.c revision 1.2.2.1
1 /* $NetBSD: footbridge_com.c,v 1.2.2.1 2001/10/10 11:55:54 fvdl Exp $ */ 2 3 /*- 4 * Copyright (c) 1997 Mark Brinicombe 5 * Copyright (c) 1997 Causality Limited 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. All advertising materials mentioning features or use of this software 16 * must display the following acknowledgement: 17 * This product includes software developed by Mark Brinicombe 18 * for the NetBSD Project. 19 * 4. The name of the author may not be used to endorse or promote products 20 * derived from this software without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 23 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 24 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 25 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 26 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 27 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 28 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 29 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 31 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 32 */ 33 34 /* 35 * COM driver, using the footbridge UART 36 */ 37 38 #include "opt_ddb.h" 39 40 #include <sys/param.h> 41 #include <sys/systm.h> 42 #include <sys/ioctl.h> 43 #include <sys/select.h> 44 #include <sys/tty.h> 45 #include <sys/proc.h> 46 #include <sys/conf.h> 47 #include <sys/syslog.h> 48 #include <sys/device.h> 49 #include <sys/malloc.h> 50 #include <sys/termios.h> 51 #include <sys/vnode.h> 52 #include <machine/bus.h> 53 #include <machine/intr.h> 54 #include <arm/footbridge/dc21285mem.h> 55 #include <arm/footbridge/dc21285reg.h> 56 #include <arm/footbridge/footbridgevar.h> 57 58 #include <dev/cons.h> 59 60 #include "fcom.h" 61 62 extern u_int dc21285_fclk; 63 64 #ifdef DDB 65 /* 66 * Define the keycode recognised as a request to call the debugger 67 * A value of 0 disables the feature when DDB is built in 68 */ 69 #ifndef DDB_KEYCODE 70 #define DDB_KEYCODE 0 71 #endif /* DDB_KEYCODE */ 72 #endif /* DDB */ 73 74 struct fcom_softc { 75 struct device sc_dev; 76 bus_space_tag_t sc_iot; 77 bus_space_handle_t sc_ioh; 78 void *sc_ih; 79 struct callout sc_softintr_ch; 80 int sc_rx_irq; 81 int sc_tx_irq; 82 int sc_hwflags; 83 #define HW_FLAG_CONSOLE 0x01 84 int sc_swflags; 85 int sc_l_ubrlcr; 86 int sc_m_ubrlcr; 87 int sc_h_ubrlcr; 88 char *sc_rxbuffer[2]; 89 char *sc_rxbuf; 90 int sc_rxpos; 91 int sc_rxcur; 92 struct tty *sc_tty; 93 }; 94 95 #define RX_BUFFER_SIZE 0x100 96 97 /* Macros to clear/set/test flags. */ 98 #define SET(t, f) (t) |= (f) 99 #define CLR(t, f) (t) &= ~(f) 100 #define ISSET(t, f) ((t) & (f)) 101 102 static int fcom_probe __P((struct device *, struct cfdata *, void *)); 103 static void fcom_attach __P((struct device *, struct device *, void *)); 104 105 int fcomopen __P((struct vnode *devvp, int flag, int mode, struct proc *p)); 106 static int fcom_rxintr __P((void *)); 107 /*static int fcom_txintr __P((void *));*/ 108 109 /*struct consdev;*/ 110 /*void fcomcnprobe __P((struct consdev *)); 111 void fcomcninit __P((struct consdev *));*/ 112 int fcomcngetc __P((dev_t)); 113 void fcomcnputc __P((dev_t, int)); 114 void fcomcnpollc __P((dev_t, int)); 115 116 struct cfattach fcom_ca = { 117 sizeof(struct fcom_softc), fcom_probe, fcom_attach 118 }; 119 120 extern struct cfdriver fcom_cd; 121 122 void fcominit __P((bus_space_tag_t, bus_space_handle_t, int, int)); 123 void fcominitcons __P((bus_space_tag_t, bus_space_handle_t)); 124 125 bus_space_tag_t fcomconstag; 126 bus_space_handle_t fcomconsioh; 127 extern int comcnmode; 128 extern int comcnspeed; 129 130 #define COMUNIT(x) (minor(x)) 131 #ifndef CONUNIT 132 #define CONUNIT 0 133 #endif 134 135 /* 136 * The console is set up at init time, well in advance of the reset of the 137 * system and thus we have a private bus space tag for the console. 138 * 139 * The tag is provided by fcom_io.c and fcom_io_asm.S 140 */ 141 extern struct bus_space fcomcons_bs_tag; 142 143 /* 144 * int fcom_probe(struct device *parent, struct cfdata *cf, void *aux) 145 * 146 * Make sure we are trying to attach a com device and then 147 * probe for one. 148 */ 149 150 static int 151 fcom_probe(parent, cf, aux) 152 struct device *parent; 153 struct cfdata *cf; 154 void *aux; 155 { 156 union footbridge_attach_args *fba = aux; 157 158 if (strcmp(fba->fba_name, "fcom") == 0) 159 return(1); 160 return(0); 161 } 162 163 /* 164 * void fcom_attach(struct device *parent, struct device *self, void *aux) 165 * 166 * attach the com device 167 */ 168 169 static void 170 fcom_attach(parent, self, aux) 171 struct device *parent, *self; 172 void *aux; 173 { 174 union footbridge_attach_args *fba = aux; 175 struct fcom_softc *sc = (struct fcom_softc *)self; 176 177 /* Set up the softc */ 178 sc->sc_iot = fba->fba_fca.fca_iot; 179 sc->sc_ioh = fba->fba_fca.fca_ioh; 180 callout_init(&sc->sc_softintr_ch); 181 sc->sc_rx_irq = fba->fba_fca.fca_rx_irq; 182 sc->sc_tx_irq = fba->fba_fca.fca_tx_irq; 183 sc->sc_hwflags = 0; 184 sc->sc_swflags = 0; 185 186 /* If we have a console tag then make a note of it */ 187 if (fcomconstag) 188 sc->sc_hwflags |= HW_FLAG_CONSOLE; 189 190 if (sc->sc_hwflags & HW_FLAG_CONSOLE) { 191 int major; 192 193 /* locate the major number */ 194 for (major = 0; major < nchrdev; ++major) 195 if (cdevsw[major].d_open == fcomopen) 196 break; 197 198 cn_tab->cn_dev = makedev(major, sc->sc_dev.dv_unit); 199 printf(": console"); 200 } 201 printf("\n"); 202 203 sc->sc_ih = intr_claim(sc->sc_rx_irq, IPL_SERIAL, "serial rx", 204 fcom_rxintr, sc); 205 if (sc->sc_ih == NULL) 206 panic("%s: Cannot install rx interrupt handler\n", 207 sc->sc_dev.dv_xname); 208 } 209 210 static void fcomstart __P((struct tty *)); 211 static int fcomparam __P((struct tty *, struct termios *)); 212 213 int 214 fcomopen(devvp, flag, mode, p) 215 struct vnode *devvp; 216 int flag, mode; 217 struct proc *p; 218 { 219 struct fcom_softc *sc; 220 int unit; 221 struct tty *tp; 222 dev_t dev; 223 224 dev = vdev_rdev(devvp); 225 unit = minor(dev); 226 227 if (unit >= fcom_cd.cd_ndevs) 228 return ENXIO; 229 sc = fcom_cd.cd_devs[unit]; 230 if (!sc) 231 return ENXIO; 232 233 vdev_setprivdata(devvp, sc); 234 235 if (!(tp = sc->sc_tty)) 236 sc->sc_tty = tp = ttymalloc(); 237 if (!sc->sc_rxbuffer[0]) { 238 sc->sc_rxbuffer[0] = malloc(RX_BUFFER_SIZE, M_DEVBUF, M_WAITOK); 239 sc->sc_rxbuffer[1] = malloc(RX_BUFFER_SIZE, M_DEVBUF, M_WAITOK); 240 sc->sc_rxpos = 0; 241 sc->sc_rxcur = 0; 242 sc->sc_rxbuf = sc->sc_rxbuffer[sc->sc_rxcur]; 243 if (!sc->sc_rxbuf) 244 panic("%s: Cannot allocate rx buffer memory", 245 sc->sc_dev.dv_xname); 246 } 247 tp->t_oproc = fcomstart; 248 tp->t_param = fcomparam; 249 tp->t_devvp = devvp; 250 if (!(tp->t_state & TS_ISOPEN && tp->t_wopen == 0)) { 251 ttychars(tp); 252 tp->t_cflag = TTYDEF_CFLAG; 253 tp->t_iflag = TTYDEF_IFLAG; 254 tp->t_oflag = TTYDEF_OFLAG; 255 tp->t_lflag = TTYDEF_LFLAG; 256 257 /* 258 * Initialize the termios status to the defaults. Add in the 259 * sticky bits from TIOCSFLAGS. 260 */ 261 tp->t_ispeed = 0; 262 if (ISSET(sc->sc_hwflags, HW_FLAG_CONSOLE)) 263 tp->t_ospeed = comcnspeed; 264 else 265 tp->t_ospeed = TTYDEF_SPEED; 266 267 fcomparam(tp, &tp->t_termios); 268 ttsetwater(tp); 269 } else if ((tp->t_state&TS_XCLUDE) && suser(p->p_ucred, &p->p_acflag)) 270 return EBUSY; 271 tp->t_state |= TS_CARR_ON; 272 273 return (*tp->t_linesw->l_open)(devvp, tp); 274 } 275 276 int 277 fcomclose(devvp, flag, mode, p) 278 struct vnode *devvp; 279 int flag, mode; 280 struct proc *p; 281 { 282 struct fcom_softc *sc; 283 struct tty *tp; 284 285 sc = vdev_privdata(devvp); 286 tp = sc->sc_tty; 287 288 /* XXX This is for cons.c. */ 289 if (!ISSET(tp->t_state, TS_ISOPEN)) 290 return (0); 291 292 (*tp->t_linesw->l_close)(tp, flag); 293 ttyclose(tp); 294 #ifdef DIAGNOSTIC 295 if (sc->sc_rxbuffer[0] == NULL) 296 panic("fcomclose: rx buffers not allocated\n"); 297 #endif /* DIAGNOSTIC */ 298 free(sc->sc_rxbuffer[0], M_DEVBUF); 299 free(sc->sc_rxbuffer[1], M_DEVBUF); 300 sc->sc_rxbuffer[0] = NULL; 301 sc->sc_rxbuffer[1] = NULL; 302 303 return 0; 304 } 305 306 int 307 fcomread(devvp, uio, flag) 308 struct vnode *devvp; 309 struct uio *uio; 310 int flag; 311 { 312 struct fcom_softc *sc; 313 struct tty *tp; 314 315 sc = vdev_privdata(devvp); 316 tp = sc->sc_tty; 317 318 return (*tp->t_linesw->l_read)(tp, uio, flag); 319 } 320 321 int 322 fcomwrite(devvp, uio, flag) 323 struct vnode *devvp; 324 struct uio *uio; 325 int flag; 326 { 327 struct fcom_softc *sc; 328 struct tty *tp; 329 330 sc = vdev_privdata(devvp); 331 tp = sc->sc_tty; 332 333 return (*tp->t_linesw->l_write)(tp, uio, flag); 334 } 335 336 int 337 fcompoll(devvp, events, p) 338 struct vnode *devvp; 339 int events; 340 struct proc *p; 341 { 342 struct fcom_softc *sc; 343 struct tty *tp; 344 345 sc = vdev_privdata(devvp); 346 tp = sc->sc_tty; 347 348 return ((*tp->t_linesw->l_poll)(tp, events, p)); 349 } 350 351 int 352 fcomioctl(devvp, cmd, data, flag, p) 353 struct vnode *devvp; 354 u_long cmd; 355 caddr_t data; 356 int flag; 357 struct proc *p; 358 { 359 struct fcom_softc *sc; 360 struct tty *tp; 361 int error; 362 363 sc = vdev_privdata(devvp); 364 tp = sc->sc_tty; 365 366 if ((error = (*tp->t_linesw->l_ioctl)(tp, cmd, data, flag, p)) >= 0) 367 return error; 368 if ((error = ttioctl(tp, cmd, data, flag, p)) >= 0) 369 return error; 370 371 switch (cmd) { 372 case TIOCGFLAGS: 373 *(int *)data = sc->sc_swflags; 374 break; 375 376 case TIOCSFLAGS: 377 error = suser(p->p_ucred, &p->p_acflag); 378 if (error) 379 return (error); 380 sc->sc_swflags = *(int *)data; 381 break; 382 } 383 384 return ENOTTY; 385 } 386 387 struct tty * 388 fcomtty(devvp) 389 struct vnode *devvp; 390 { 391 struct fcom_softc *sc; 392 393 sc = vdev_privdata(devvp); 394 395 return sc->sc_tty; 396 } 397 398 void 399 fcomstop(tp, flag) 400 struct tty *tp; 401 int flag; 402 { 403 } 404 405 static void 406 fcomstart(tp) 407 struct tty *tp; 408 { 409 struct clist *cl; 410 int s, len; 411 u_char buf[64]; 412 int loop; 413 struct fcom_softc *sc = vdev_privdata(tp->t_devvp); 414 bus_space_tag_t iot = sc->sc_iot; 415 bus_space_handle_t ioh = sc->sc_ioh; 416 int timo; 417 418 s = spltty(); 419 if (tp->t_state & (TS_TIMEOUT | TS_BUSY | TS_TTSTOP)) { 420 (void)splx(s); 421 return; 422 } 423 tp->t_state |= TS_BUSY; 424 (void)splx(s); 425 426 /* s = splserial();*/ 427 /* wait for any pending transmission to finish */ 428 timo = 100000; 429 while ((bus_space_read_4(iot, ioh, UART_FLAGS) & UART_TX_BUSY) && --timo) 430 ; 431 432 s = splserial(); 433 if (bus_space_read_4(iot, ioh, UART_FLAGS) & UART_TX_BUSY) { 434 tp->t_state |= TS_TIMEOUT; 435 callout_reset(&tp->t_rstrt_ch, 1, ttrstrt, tp); 436 (void)splx(s); 437 return; 438 } 439 440 (void)splx(s); 441 442 cl = &tp->t_outq; 443 len = q_to_b(cl, buf, 64); 444 for (loop = 0; loop < len; ++loop) { 445 /* s = splserial();*/ 446 447 bus_space_write_4(iot, ioh, UART_DATA, buf[loop]); 448 449 /* wait for this transmission to complete */ 450 timo = 100000; 451 while ((bus_space_read_4(iot, ioh, UART_FLAGS) & UART_TX_BUSY) && --timo) 452 ; 453 /* (void)splx(s);*/ 454 } 455 s = spltty(); 456 tp->t_state &= ~TS_BUSY; 457 if (cl->c_cc) { 458 tp->t_state |= TS_TIMEOUT; 459 callout_reset(&tp->t_rstrt_ch, 1, ttrstrt, tp); 460 } 461 if (cl->c_cc <= tp->t_lowat) { 462 if (tp->t_state & TS_ASLEEP) { 463 tp->t_state &= ~TS_ASLEEP; 464 wakeup(cl); 465 } 466 selwakeup(&tp->t_wsel); 467 } 468 (void)splx(s); 469 } 470 471 static int 472 fcomparam(tp, t) 473 struct tty *tp; 474 struct termios *t; 475 { 476 struct fcom_softc *sc = vdev_privdata(tp->t_devvp); 477 bus_space_tag_t iot = sc->sc_iot; 478 bus_space_handle_t ioh = sc->sc_ioh; 479 int baudrate; 480 int h_ubrlcr; 481 int m_ubrlcr; 482 int l_ubrlcr; 483 int s; 484 485 /* check requested parameters */ 486 if (t->c_ospeed < 0) 487 return (EINVAL); 488 if (t->c_ispeed && t->c_ispeed != t->c_ospeed) 489 return (EINVAL); 490 491 switch (t->c_ospeed) { 492 case B1200: 493 case B2400: 494 case B4800: 495 case B9600: 496 case B19200: 497 case B38400: 498 baudrate = UART_BRD(dc21285_fclk, t->c_ospeed); 499 break; 500 default: 501 baudrate = UART_BRD(dc21285_fclk, 9600); 502 break; 503 } 504 505 l_ubrlcr = baudrate & 0xff; 506 m_ubrlcr = (baudrate >> 8) & 0xf; 507 h_ubrlcr = 0; 508 509 switch (ISSET(t->c_cflag, CSIZE)) { 510 case CS5: 511 h_ubrlcr |= UART_DATA_BITS_5; 512 break; 513 case CS6: 514 h_ubrlcr |= UART_DATA_BITS_6; 515 break; 516 case CS7: 517 h_ubrlcr |= UART_DATA_BITS_7; 518 break; 519 case CS8: 520 h_ubrlcr |= UART_DATA_BITS_8; 521 break; 522 } 523 524 if (ISSET(t->c_cflag, PARENB)) { 525 h_ubrlcr |= UART_PARITY_ENABLE; 526 if (ISSET(t->c_cflag, PARODD)) 527 h_ubrlcr |= UART_ODD_PARITY; 528 else 529 h_ubrlcr |= UART_EVEN_PARITY; 530 } 531 532 if (ISSET(t->c_cflag, CSTOPB)) 533 h_ubrlcr |= UART_STOP_BITS_2; 534 535 bus_space_write_4(iot, ioh, UART_L_UBRLCR, l_ubrlcr); 536 bus_space_write_4(iot, ioh, UART_M_UBRLCR, m_ubrlcr); 537 bus_space_write_4(iot, ioh, UART_H_UBRLCR, h_ubrlcr); 538 539 s = splserial(); 540 541 sc->sc_l_ubrlcr = l_ubrlcr; 542 sc->sc_m_ubrlcr = m_ubrlcr; 543 sc->sc_h_ubrlcr = h_ubrlcr; 544 545 /* 546 * For the console, always force CLOCAL and !HUPCL, so that the port 547 * is always active. 548 */ 549 if (ISSET(sc->sc_swflags, TIOCFLAG_SOFTCAR) || 550 ISSET(sc->sc_hwflags, HW_FLAG_CONSOLE)) { 551 SET(t->c_cflag, CLOCAL); 552 CLR(t->c_cflag, HUPCL); 553 } 554 555 /* and copy to tty */ 556 tp->t_ispeed = 0; 557 tp->t_ospeed = t->c_ospeed; 558 tp->t_cflag = t->c_cflag; 559 560 bus_space_write_4(iot, ioh, UART_L_UBRLCR, l_ubrlcr); 561 bus_space_write_4(iot, ioh, UART_M_UBRLCR, m_ubrlcr); 562 bus_space_write_4(iot, ioh, UART_H_UBRLCR, h_ubrlcr); 563 564 (void)splx(s); 565 566 return (0); 567 } 568 569 static int softint_scheduled = 0; 570 571 static void 572 fcom_softintr(sc) 573 struct fcom_softc *sc; 574 { 575 struct tty *tp = sc->sc_tty; 576 int s; 577 int loop; 578 int len; 579 char *ptr; 580 581 s = spltty(); 582 ptr = sc->sc_rxbuf; 583 len = sc->sc_rxpos; 584 sc->sc_rxcur ^= 1; 585 sc->sc_rxbuf = sc->sc_rxbuffer[sc->sc_rxcur]; 586 sc->sc_rxpos = 0; 587 (void)splx(s); 588 589 for (loop = 0; loop < len; ++loop) 590 (*tp->t_linesw->l_rint)(ptr[loop], tp); 591 softint_scheduled = 0; 592 } 593 594 #if 0 595 static int 596 fcom_txintr(arg) 597 void *arg; 598 { 599 /* struct fcom_softc *sc = arg;*/ 600 601 printf("fcom_txintr()\n"); 602 return(0); 603 } 604 #endif 605 606 static int 607 fcom_rxintr(arg) 608 void *arg; 609 { 610 struct fcom_softc *sc = arg; 611 bus_space_tag_t iot = sc->sc_iot; 612 bus_space_handle_t ioh = sc->sc_ioh; 613 struct tty *tp = sc->sc_tty; 614 int status; 615 int byte; 616 617 do { 618 status = bus_space_read_4(iot, ioh, UART_FLAGS); 619 if ((status & UART_RX_FULL)) 620 break; 621 byte = bus_space_read_4(iot, ioh, UART_DATA); 622 status = bus_space_read_4(iot, ioh, UART_RX_STAT); 623 #if DDB_KEYCODE > 0 624 /* 625 * Temporary hack so that I can force the kernel into 626 * the debugger via the serial port 627 */ 628 if (byte == DDB_KEYCODE) Debugger(); 629 #endif 630 if (tp && (tp->t_state & TS_ISOPEN)) 631 if (sc->sc_rxpos < RX_BUFFER_SIZE) { 632 sc->sc_rxbuf[sc->sc_rxpos++] = byte; 633 if (!softint_scheduled) { 634 softint_scheduled = 1; 635 callout_reset(&sc->sc_softintr_ch, 636 1, fcom_softintr, sc); 637 } 638 } 639 } while (1); 640 return(0); 641 } 642 643 #if 0 644 void 645 fcom_iflush(sc) 646 struct fcom_softc *sc; 647 { 648 bus_space_tag_t iot = sc->sc_iot; 649 bus_space_handle_t ioh = sc->sc_ioh; 650 651 /* flush any pending I/O */ 652 while (!ISSET(bus_space_read_4(iot, ioh, UART_FLAGS), UART_RX_FULL)) 653 (void) bus_space_read_4(iot, ioh, UART_DATA); 654 } 655 #endif 656 657 /* 658 * Following are all routines needed for COM to act as console 659 */ 660 661 #if 0 662 void 663 fcomcnprobe(cp) 664 struct consdev *cp; 665 { 666 int major; 667 668 /* Serial console is always present so no probe */ 669 670 /* locate the major number */ 671 for (major = 0; major < nchrdev; major++) 672 if (cdevsw[major].d_open == fcomopen) 673 break; 674 675 /* initialize required fields */ 676 cp->cn_dev = makedev(major, CONUNIT); 677 cp->cn_pri = CN_REMOTE; /* Force a serial port console */ 678 } 679 680 void 681 fcomcninit(cp) 682 struct consdev *cp; 683 { 684 fcomconstag = &fcomcons_bs_tag; 685 686 if (bus_space_map(fcomconstag, DC21285_ARMCSR_BASE, DC21285_ARMCSR_SIZE, 0, &fcomconsioh)) 687 panic("fcomcninit: mapping failed"); 688 689 fcominitcons(fcomconstag, fcomconsioh); 690 } 691 #endif 692 693 int 694 fcomcnattach(iobase, rate, cflag) 695 u_int iobase; 696 int rate; 697 tcflag_t cflag; 698 { 699 static struct consdev fcomcons = { 700 NULL, NULL, fcomcngetc, fcomcnputc, fcomcnpollc, NULL, 701 NODEV, CN_NORMAL 702 }; 703 704 fcomconstag = &fcomcons_bs_tag; 705 706 if (bus_space_map(fcomconstag, iobase, DC21285_ARMCSR_SIZE, 707 0, &fcomconsioh)) 708 panic("fcomcninit: mapping failed"); 709 710 fcominit(fcomconstag, fcomconsioh, rate, cflag); 711 712 cn_tab = &fcomcons; 713 714 /* comcnspeed = rate; 715 comcnmode = cflag;*/ 716 return (0); 717 } 718 719 int 720 fcomcndetach(void) 721 { 722 bus_space_unmap(fcomconstag, fcomconsioh, DC21285_ARMCSR_SIZE); 723 724 cn_tab = NULL; 725 return (0); 726 } 727 728 /* 729 * Initialize UART to known state. 730 */ 731 void 732 fcominit(iot, ioh, rate, mode) 733 bus_space_tag_t iot; 734 bus_space_handle_t ioh; 735 int rate; 736 int mode; 737 { 738 int baudrate; 739 int h_ubrlcr; 740 int m_ubrlcr; 741 int l_ubrlcr; 742 743 switch (rate) { 744 case B1200: 745 case B2400: 746 case B4800: 747 case B9600: 748 case B19200: 749 case B38400: 750 baudrate = UART_BRD(dc21285_fclk, rate); 751 break; 752 default: 753 baudrate = UART_BRD(dc21285_fclk, 9600); 754 break; 755 } 756 757 h_ubrlcr = 0; 758 switch (mode & CSIZE) { 759 case CS5: 760 h_ubrlcr |= UART_DATA_BITS_5; 761 break; 762 case CS6: 763 h_ubrlcr |= UART_DATA_BITS_6; 764 break; 765 case CS7: 766 h_ubrlcr |= UART_DATA_BITS_7; 767 break; 768 case CS8: 769 h_ubrlcr |= UART_DATA_BITS_8; 770 break; 771 } 772 773 if (mode & PARENB) 774 h_ubrlcr |= UART_PARITY_ENABLE; 775 if (mode & PARODD) 776 h_ubrlcr |= UART_ODD_PARITY; 777 else 778 h_ubrlcr |= UART_EVEN_PARITY; 779 780 if (mode & CSTOPB) 781 h_ubrlcr |= UART_STOP_BITS_2; 782 783 m_ubrlcr = (baudrate >> 8) & 0xf; 784 l_ubrlcr = baudrate & 0xff; 785 786 bus_space_write_4(iot, ioh, UART_L_UBRLCR, l_ubrlcr); 787 bus_space_write_4(iot, ioh, UART_M_UBRLCR, m_ubrlcr); 788 bus_space_write_4(iot, ioh, UART_H_UBRLCR, h_ubrlcr); 789 } 790 #if 0 791 /* 792 * Set UART for console use. Do normal init, then enable interrupts. 793 */ 794 void 795 fcominitcons(iot, ioh) 796 bus_space_tag_t iot; 797 bus_space_handle_t ioh; 798 { 799 int s = splserial(); 800 801 fcominit(iot, ioh, comcnspeed, comcnmode); 802 803 delay(10000); 804 805 (void)splx(s); 806 } 807 #endif 808 809 int 810 fcomcngetc(dev) 811 dev_t dev; 812 { 813 int s = splserial(); 814 bus_space_tag_t iot = fcomconstag; 815 bus_space_handle_t ioh = fcomconsioh; 816 u_char stat, c; 817 818 while ((bus_space_read_4(iot, ioh, UART_FLAGS) & UART_RX_FULL) != 0) 819 ; 820 c = bus_space_read_4(iot, ioh, UART_DATA); 821 stat = bus_space_read_4(iot, ioh, UART_RX_STAT); 822 (void)splx(s); 823 #if DDB_KEYCODE > 0 824 /* 825 * Temporary hack so that I can force the kernel into 826 * the debugger via the serial port 827 */ 828 if (c == DDB_KEYCODE) Debugger(); 829 #endif 830 831 return (c); 832 } 833 834 /* 835 * Console kernel output character routine. 836 */ 837 void 838 fcomcnputc(dev, c) 839 dev_t dev; 840 int c; 841 { 842 int s = splserial(); 843 bus_space_tag_t iot = fcomconstag; 844 bus_space_handle_t ioh = fcomconsioh; 845 int timo; 846 847 /* wait for any pending transmission to finish */ 848 timo = 50000; 849 while ((bus_space_read_4(iot, ioh, UART_FLAGS) & UART_TX_BUSY) && --timo) 850 ; 851 bus_space_write_4(iot, ioh, UART_DATA, c); 852 853 /* wait for this transmission to complete */ 854 timo = 1500000; 855 while ((bus_space_read_4(iot, ioh, UART_FLAGS) & UART_TX_BUSY) && --timo) 856 ; 857 /* Clear interrupt status here */ 858 (void)splx(s); 859 } 860 861 void 862 fcomcnpollc(dev, on) 863 dev_t dev; 864 int on; 865 { 866 } 867
Indexes created Thu Oct 23 18:09:57 GMT 2025