footbridge_intr.h revision 1.11
1 /* $NetBSD: footbridge_intr.h,v 1.11 2007/12/03 15:33:18 ad Exp $ */ 2 3 /* 4 * Copyright (c) 2001, 2002 Wasabi Systems, Inc. 5 * All rights reserved. 6 * 7 * Written by Jason R. Thorpe for Wasabi Systems, Inc. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. All advertising materials mentioning features or use of this software 18 * must display the following acknowledgement: 19 * This product includes software developed for the NetBSD Project by 20 * Wasabi Systems, Inc. 21 * 4. The name of Wasabi Systems, Inc. may not be used to endorse 22 * or promote products derived from this software without specific prior 23 * written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND 26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 27 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 28 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC 29 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 35 * POSSIBILITY OF SUCH DAMAGE. 36 */ 37 38 #ifndef _FOOTBRIDGE_INTR_H_ 39 #define _FOOTBRIDGE_INTR_H_ 40 41 #include <arm/armreg.h> 42 43 #define IPL_NONE 0 /* nothing */ 44 #define IPL_SOFTCLOCK 1 /* clock soft interrupts */ 45 #define IPL_SOFTBIO 2 /* block i/o */ 46 #define IPL_SOFTNET 3 /* network software interrupts */ 47 #define IPL_SOFTSERIAL 4 /* serial software interrupts */ 48 #define IPL_VM 5 /* memory allocation */ 49 #define IPL_SCHED 6 /* clock */ 50 #define IPL_HIGH 7 /* everything */ 51 52 #define NIPL 8 53 54 #define IST_UNUSABLE -1 /* interrupt cannot be used */ 55 #define IST_NONE 0 /* none (dummy) */ 56 #define IST_PULSE 1 /* pulsed */ 57 #define IST_EDGE 2 /* edge-triggered */ 58 #define IST_LEVEL 3 /* level-triggered */ 59 60 #define __NEWINTR /* enables new hooks in cpu_fork()/cpu_switch() */ 61 62 #define ARM_IRQ_HANDLER _C_LABEL(footbridge_intr_dispatch) 63 64 #ifndef _LOCORE 65 #include <arm/cpufunc.h> 66 67 #include <arm/footbridge/dc21285mem.h> 68 #include <arm/footbridge/dc21285reg.h> 69 70 #define INT_SWMASK \ 71 ((1U << IRQ_SOFTINT) | (1U << IRQ_RESERVED0) | \ 72 (1U << IRQ_RESERVED1) | (1U << IRQ_RESERVED2)) 73 #define ICU_INT_HWMASK (0xffffffff & ~(INT_SWMASK | (1U << IRQ_RESERVED3))) 74 75 /* only call this with interrupts off */ 76 static inline void __attribute__((__unused__)) 77 footbridge_set_intrmask(void) 78 { 79 extern volatile uint32_t intr_enabled; 80 /* fetch once so we write the same number to both registers */ 81 uint32_t tmp = intr_enabled & ICU_INT_HWMASK; 82 83 ((volatile uint32_t*)(DC21285_ARMCSR_VBASE))[IRQ_ENABLE_SET>>2] = tmp; 84 ((volatile uint32_t*)(DC21285_ARMCSR_VBASE))[IRQ_ENABLE_CLEAR>>2] = ~tmp; 85 } 86 87 static inline void __attribute__((__unused__)) 88 footbridge_splx(int newspl) 89 { 90 extern volatile uint32_t intr_enabled; 91 extern volatile int current_spl_level; 92 extern volatile int footbridge_ipending; 93 extern void footbridge_do_pending(void); 94 int oldirqstate, hwpend; 95 96 /* Don't let the compiler re-order this code with preceding code */ 97 __insn_barrier(); 98 99 current_spl_level = newspl; 100 101 hwpend = (footbridge_ipending & ICU_INT_HWMASK) & ~newspl; 102 if (hwpend != 0) { 103 oldirqstate = disable_interrupts(I32_bit); 104 intr_enabled |= hwpend; 105 footbridge_set_intrmask(); 106 restore_interrupts(oldirqstate); 107 } 108 109 if ((footbridge_ipending & INT_SWMASK) & ~newspl) 110 footbridge_do_pending(); 111 } 112 113 static inline int __attribute__((__unused__)) 114 footbridge_splraise(int ipl) 115 { 116 extern volatile int current_spl_level; 117 extern int footbridge_imask[]; 118 int old; 119 120 old = current_spl_level; 121 current_spl_level |= footbridge_imask[ipl]; 122 123 /* Don't let the compiler re-order this code with subsequent code */ 124 __insn_barrier(); 125 126 return (old); 127 } 128 129 static inline int __attribute__((__unused__)) 130 footbridge_spllower(int ipl) 131 { 132 extern volatile int current_spl_level; 133 extern int footbridge_imask[]; 134 int old = current_spl_level; 135 136 footbridge_splx(footbridge_imask[ipl]); 137 return(old); 138 } 139 140 /* should only be defined in footbridge_intr.c */ 141 #if !defined(ARM_SPL_NOINLINE) 142 143 #define splx(newspl) footbridge_splx(newspl) 144 #define _spllower(ipl) footbridge_spllower(ipl) 145 #define _splraise(ipl) footbridge_splraise(ipl) 146 void _setsoftintr(int); 147 148 #else 149 150 int _splraise(int); 151 int _spllower(int); 152 void splx(int); 153 void _setsoftintr(int); 154 155 #endif /* ! ARM_SPL_NOINLINE */ 156 157 #include <sys/device.h> 158 #include <sys/queue.h> 159 #include <machine/irqhandler.h> 160 161 #define splsoft() _splraise(IPL_SOFT) 162 163 #define spl0() (void)_spllower(IPL_NONE) 164 #define spllowersoftclock() (void)_spllower(IPL_SOFTCLOCK) 165 166 typedef uint8_t ipl_t; 167 typedef struct { 168 ipl_t _ipl; 169 } ipl_cookie_t; 170 171 static inline ipl_cookie_t 172 makeiplcookie(ipl_t ipl) 173 { 174 175 return (ipl_cookie_t){._ipl = ipl}; 176 } 177 178 static inline int 179 splraiseipl(ipl_cookie_t icookie) 180 { 181 182 return _splraise(icookie._ipl); 183 } 184 185 #include <sys/spl.h> 186 187 /* Use generic software interrupt support. */ 188 #include <arm/softintr.h> 189 190 /* footbridge has 32 interrupt lines */ 191 #define NIRQ 32 192 193 struct intrhand { 194 TAILQ_ENTRY(intrhand) ih_list; /* link on intrq list */ 195 int (*ih_func)(void *); /* handler */ 196 void *ih_arg; /* arg for handler */ 197 int ih_ipl; /* IPL_* */ 198 int ih_irq; /* IRQ number */ 199 }; 200 201 #define IRQNAMESIZE sizeof("footbridge irq 31") 202 203 struct intrq { 204 TAILQ_HEAD(, intrhand) iq_list; /* handler list */ 205 struct evcnt iq_ev; /* event counter */ 206 int iq_mask; /* IRQs to mask while handling */ 207 int iq_levels; /* IPL_*'s this IRQ has */ 208 int iq_ist; /* share type */ 209 char iq_name[IRQNAMESIZE]; /* interrupt name */ 210 }; 211 212 #endif /* _LOCORE */ 213 214 #endif /* _FOOTBRIDGE_INTR_H */ 215
Indexes created Thu Oct 02 07:10:07 GMT 2025