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footbridge_intr.h revision 1.3
      1 /* 	$NetBSD: footbridge_intr.h,v 1.3 2002/11/11 20:44:41 chris Exp $	*/
      2 
      3 /*
      4  * Copyright (c) 2001, 2002 Wasabi Systems, Inc.
      5  * All rights reserved.
      6  *
      7  * Written by Jason R. Thorpe for Wasabi Systems, Inc.
      8  *
      9  * Redistribution and use in source and binary forms, with or without
     10  * modification, are permitted provided that the following conditions
     11  * are met:
     12  * 1. Redistributions of source code must retain the above copyright
     13  *    notice, this list of conditions and the following disclaimer.
     14  * 2. Redistributions in binary form must reproduce the above copyright
     15  *    notice, this list of conditions and the following disclaimer in the
     16  *    documentation and/or other materials provided with the distribution.
     17  * 3. All advertising materials mentioning features or use of this software
     18  *    must display the following acknowledgement:
     19  *	This product includes software developed for the NetBSD Project by
     20  *	Wasabi Systems, Inc.
     21  * 4. The name of Wasabi Systems, Inc. may not be used to endorse
     22  *    or promote products derived from this software without specific prior
     23  *    written permission.
     24  *
     25  * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
     26  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     27  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     28  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL WASABI SYSTEMS, INC
     29  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     30  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     31  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     32  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     33  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     34  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     35  * POSSIBILITY OF SUCH DAMAGE.
     36  */
     37 
     38 #ifndef _FOOTBRIDGE_INTR_H_
     39 #define _FOOTBRIDGE_INTR_H_
     40 
     41 #include <arm/armreg.h>
     42 
     43 /* Define the various Interrupt Priority Levels */
     44 
     45 /* Hardware Interrupt Priority Levels are not mutually exclusive. */
     46 
     47 #define IPL_NONE	0	/* nothing */
     48 #define IPL_SOFT	1	/* generic soft interrupts */
     49 #define IPL_SOFTCLOCK	2	/* clock software interrupts */
     50 #define IPL_SOFTNET	3	/* network software interrupts */
     51 #define IPL_BIO		4	/* block I/O */
     52 #define IPL_NET		5	/* network */
     53 #define IPL_SOFTSERIAL	6	/* serial software interrupts */
     54 #define IPL_TTY		7	/* terminal */
     55 #define IPL_IMP		8	/* memory allocation */
     56 #define IPL_AUDIO	9	/* audio */
     57 #define IPL_CLOCK	10	/* clock */
     58 #define IPL_STATCLOCK	11	/* statclock */
     59 #define IPL_HIGH	12	/* everything */
     60 #define IPL_SERIAL	13	/* serial */
     61 
     62 #define NIPL		14
     63 
     64 #define	IST_UNUSABLE	-1	/* interrupt cannot be used */
     65 #define	IST_NONE	0	/* none (dummy) */
     66 #define	IST_PULSE	1	/* pulsed */
     67 #define	IST_EDGE	2	/* edge-triggered */
     68 #define	IST_LEVEL	3	/* level-triggered */
     69 
     70 #define	__NEWINTR	/* enables new hooks in cpu_fork()/cpu_switch() */
     71 
     72 #ifndef _LOCORE
     73 #include <arm/cpufunc.h>
     74 
     75 #include <arm/footbridge/dc21285mem.h>
     76 #include <arm/footbridge/dc21285reg.h>
     77 
     78 #define INT_SWMASK							\
     79 	((1U << IRQ_SOFTINT) | (1U << IRQ_RESERVED0) |			\
     80 	 (1U << IRQ_RESERVED1) | (1U << IRQ_RESERVED2))
     81 #define ICU_INT_HWMASK	(0xffffffff & ~(INT_SWMASK |  (1U << IRQ_RESERVED3)))
     82 
     83 /* only call this with interrupts off */
     84 static __inline void __attribute__((__unused__))
     85     footbridge_set_intrmask(void)
     86 {
     87     extern __volatile uint32_t intr_enabled;
     88     /* fetch once so we write the same number to both registers */
     89     uint32_t tmp = intr_enabled & ICU_INT_HWMASK;
     90 
     91     ((__volatile uint32_t*)(DC21285_ARMCSR_VBASE))[IRQ_ENABLE_SET>>2] = tmp;
     92     ((__volatile uint32_t*)(DC21285_ARMCSR_VBASE))[IRQ_ENABLE_CLEAR>>2] = ~tmp;
     93 }
     94 
     95 static __inline void __attribute__((__unused__))
     96 footbridge_splx(int newspl)
     97 {
     98 	extern __volatile uint32_t intr_enabled;
     99 	extern __volatile int current_spl_level;
    100 	extern __volatile int footbridge_ipending;
    101 	extern void footbridge_do_pending(void);
    102 	int oldirqstate, hwpend;
    103 
    104 	current_spl_level = newspl;
    105 
    106 	hwpend = (footbridge_ipending & ICU_INT_HWMASK) & ~newspl;
    107 	if (hwpend != 0) {
    108 		oldirqstate = disable_interrupts(I32_bit);
    109 		intr_enabled |= hwpend;
    110 		footbridge_set_intrmask();
    111 		restore_interrupts(oldirqstate);
    112 	}
    113 
    114 	if ((footbridge_ipending & INT_SWMASK) & ~newspl)
    115 		footbridge_do_pending();
    116 }
    117 
    118 static __inline int __attribute__((__unused__))
    119 footbridge_splraise(int ipl)
    120 {
    121 	extern __volatile int current_spl_level;
    122 	extern int footbridge_imask[];
    123 	int	old;
    124 
    125 	old = current_spl_level;
    126 	current_spl_level |= footbridge_imask[ipl];
    127 
    128 	return (old);
    129 }
    130 
    131 static __inline int __attribute__((__unused__))
    132 footbridge_spllower(int ipl)
    133 {
    134 	extern __volatile int current_spl_level;
    135 	extern int footbridge_imask[];
    136 	int old = current_spl_level;
    137 
    138 	footbridge_splx(footbridge_imask[ipl]);
    139 	return(old);
    140 }
    141 
    142 /* should only be defined in footbridge_intr.c */
    143 #if !defined(ARM_SPL_NOINLINE)
    144 
    145 #define splx(newspl)		footbridge_splx(newspl)
    146 #define	_spllower(ipl)		footbridge_spllower(ipl)
    147 #define	_splraise(ipl)		footbridge_splraise(ipl)
    148 void	_setsoftintr(int);
    149 
    150 #else
    151 
    152 int	_splraise(int);
    153 int	_spllower(int);
    154 void	splx(int);
    155 void	_setsoftintr(int);
    156 
    157 #endif /* ! ARM_SPL_NOINLINE */
    158 
    159 #include <sys/device.h>
    160 #include <sys/queue.h>
    161 #include <machine/irqhandler.h>
    162 
    163 #define	splsoft()	_splraise(IPL_SOFT)
    164 #define	splsoftclock()	_splraise(IPL_SOFTCLOCK)
    165 #define	splsoftnet()	_splraise(IPL_SOFTNET)
    166 #define	splbio()	_splraise(IPL_BIO)
    167 #define	splnet()	_splraise(IPL_NET)
    168 #define splsoftserial()	_splraise(IPL_SOFTSERIAL)
    169 #define	spltty()	_splraise(IPL_TTY)
    170 #define spllpt()        spltty()
    171 #define	splvm()		_splraise(IPL_IMP)
    172 #define	splaudio()	_splraise(IPL_AUDIO)
    173 #define	splclock()	_splraise(IPL_CLOCK)
    174 #define	splstatclock()	_splraise(IPL_STATCLOCK)
    175 #define	splhigh()	_splraise(IPL_HIGH)
    176 #define	splserial()	_splraise(IPL_SERIAL)
    177 
    178 #define	spl0()		(void)_spllower(IPL_NONE)
    179 #define	spllowersoftclock() (void)_spllower(IPL_SOFTCLOCK)
    180 
    181 #define	splsched()	splhigh()
    182 #define	spllock()	splhigh()
    183 
    184 /* Use generic software interrupt support. */
    185 #include <arm/softintr.h>
    186 
    187 /* footbridge has 32 interrupt lines */
    188 #define	NIRQ		32
    189 
    190 struct intrhand {
    191 	TAILQ_ENTRY(intrhand) ih_list;	/* link on intrq list */
    192 	int (*ih_func)(void *);		/* handler */
    193 	void *ih_arg;			/* arg for handler */
    194 	int ih_ipl;			/* IPL_* */
    195 	int ih_irq;			/* IRQ number */
    196 };
    197 
    198 #define	IRQNAMESIZE	sizeof("footbridge irq 31")
    199 
    200 struct intrq {
    201 	TAILQ_HEAD(, intrhand) iq_list;	/* handler list */
    202 	struct evcnt iq_ev;		/* event counter */
    203 	int iq_mask;			/* IRQs to mask while handling */
    204 	int iq_levels;			/* IPL_*'s this IRQ has */
    205 	int iq_ist;			/* share type */
    206 	char iq_name[IRQNAMESIZE];	/* interrupt name */
    207 };
    208 
    209 #endif /* _LOCORE */
    210 
    211 #endif	/* _FOOTBRIDGE_INTR_H */
    212