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footbridge_intr.h revision 1.7
      1 /* 	$NetBSD: footbridge_intr.h,v 1.7 2006/01/01 14:24:33 yamt Exp $	*/
      2 
      3 /*
      4  * Copyright (c) 2001, 2002 Wasabi Systems, Inc.
      5  * All rights reserved.
      6  *
      7  * Written by Jason R. Thorpe for Wasabi Systems, Inc.
      8  *
      9  * Redistribution and use in source and binary forms, with or without
     10  * modification, are permitted provided that the following conditions
     11  * are met:
     12  * 1. Redistributions of source code must retain the above copyright
     13  *    notice, this list of conditions and the following disclaimer.
     14  * 2. Redistributions in binary form must reproduce the above copyright
     15  *    notice, this list of conditions and the following disclaimer in the
     16  *    documentation and/or other materials provided with the distribution.
     17  * 3. All advertising materials mentioning features or use of this software
     18  *    must display the following acknowledgement:
     19  *	This product includes software developed for the NetBSD Project by
     20  *	Wasabi Systems, Inc.
     21  * 4. The name of Wasabi Systems, Inc. may not be used to endorse
     22  *    or promote products derived from this software without specific prior
     23  *    written permission.
     24  *
     25  * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
     26  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     27  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     28  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL WASABI SYSTEMS, INC
     29  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     30  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     31  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     32  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     33  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     34  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     35  * POSSIBILITY OF SUCH DAMAGE.
     36  */
     37 
     38 #ifndef _FOOTBRIDGE_INTR_H_
     39 #define _FOOTBRIDGE_INTR_H_
     40 
     41 #include <arm/armreg.h>
     42 
     43 /* Define the various Interrupt Priority Levels */
     44 
     45 /* Hardware Interrupt Priority Levels are not mutually exclusive. */
     46 
     47 #define IPL_NONE	0	/* nothing */
     48 #define IPL_SOFT	1	/* generic soft interrupts */
     49 #define IPL_SOFTCLOCK	2	/* clock software interrupts */
     50 #define IPL_SOFTNET	3	/* network software interrupts */
     51 #define IPL_BIO		4	/* block I/O */
     52 #define IPL_NET		5	/* network */
     53 #define IPL_SOFTSERIAL	6	/* serial software interrupts */
     54 #define IPL_TTY		7	/* terminal */
     55 #define	IPL_LPT		IPL_TTY
     56 #define IPL_VM		8	/* memory allocation */
     57 #define IPL_AUDIO	9	/* audio */
     58 #define IPL_CLOCK	10	/* clock */
     59 #define IPL_STATCLOCK	11	/* statclock */
     60 #define IPL_HIGH	12	/* everything */
     61 #define	IPL_SCHED	IPL_HIGH
     62 #define	IPL_LOCK	IPL_HIGH
     63 #define IPL_SERIAL	13	/* serial */
     64 
     65 #define NIPL		14
     66 
     67 #define	IST_UNUSABLE	-1	/* interrupt cannot be used */
     68 #define	IST_NONE	0	/* none (dummy) */
     69 #define	IST_PULSE	1	/* pulsed */
     70 #define	IST_EDGE	2	/* edge-triggered */
     71 #define	IST_LEVEL	3	/* level-triggered */
     72 
     73 #define	__NEWINTR	/* enables new hooks in cpu_fork()/cpu_switch() */
     74 
     75 #define	ARM_IRQ_HANDLER	_C_LABEL(footbridge_intr_dispatch)
     76 
     77 #ifndef _LOCORE
     78 #include <arm/cpufunc.h>
     79 
     80 #include <arm/footbridge/dc21285mem.h>
     81 #include <arm/footbridge/dc21285reg.h>
     82 
     83 #define INT_SWMASK							\
     84 	((1U << IRQ_SOFTINT) | (1U << IRQ_RESERVED0) |			\
     85 	 (1U << IRQ_RESERVED1) | (1U << IRQ_RESERVED2))
     86 #define ICU_INT_HWMASK	(0xffffffff & ~(INT_SWMASK |  (1U << IRQ_RESERVED3)))
     87 
     88 /* only call this with interrupts off */
     89 static inline void __attribute__((__unused__))
     90     footbridge_set_intrmask(void)
     91 {
     92     extern volatile uint32_t intr_enabled;
     93     /* fetch once so we write the same number to both registers */
     94     uint32_t tmp = intr_enabled & ICU_INT_HWMASK;
     95 
     96     ((volatile uint32_t*)(DC21285_ARMCSR_VBASE))[IRQ_ENABLE_SET>>2] = tmp;
     97     ((volatile uint32_t*)(DC21285_ARMCSR_VBASE))[IRQ_ENABLE_CLEAR>>2] = ~tmp;
     98 }
     99 
    100 static inline void __attribute__((__unused__))
    101 footbridge_splx(int newspl)
    102 {
    103 	extern volatile uint32_t intr_enabled;
    104 	extern volatile int current_spl_level;
    105 	extern volatile int footbridge_ipending;
    106 	extern void footbridge_do_pending(void);
    107 	int oldirqstate, hwpend;
    108 
    109 	current_spl_level = newspl;
    110 
    111 	hwpend = (footbridge_ipending & ICU_INT_HWMASK) & ~newspl;
    112 	if (hwpend != 0) {
    113 		oldirqstate = disable_interrupts(I32_bit);
    114 		intr_enabled |= hwpend;
    115 		footbridge_set_intrmask();
    116 		restore_interrupts(oldirqstate);
    117 	}
    118 
    119 	if ((footbridge_ipending & INT_SWMASK) & ~newspl)
    120 		footbridge_do_pending();
    121 }
    122 
    123 static inline int __attribute__((__unused__))
    124 footbridge_splraise(int ipl)
    125 {
    126 	extern volatile int current_spl_level;
    127 	extern int footbridge_imask[];
    128 	int	old;
    129 
    130 	old = current_spl_level;
    131 	current_spl_level |= footbridge_imask[ipl];
    132 
    133 	return (old);
    134 }
    135 
    136 static inline int __attribute__((__unused__))
    137 footbridge_spllower(int ipl)
    138 {
    139 	extern volatile int current_spl_level;
    140 	extern int footbridge_imask[];
    141 	int old = current_spl_level;
    142 
    143 	footbridge_splx(footbridge_imask[ipl]);
    144 	return(old);
    145 }
    146 
    147 /* should only be defined in footbridge_intr.c */
    148 #if !defined(ARM_SPL_NOINLINE)
    149 
    150 #define splx(newspl)		footbridge_splx(newspl)
    151 #define	_spllower(ipl)		footbridge_spllower(ipl)
    152 #define	_splraise(ipl)		footbridge_splraise(ipl)
    153 void	_setsoftintr(int);
    154 
    155 #else
    156 
    157 int	_splraise(int);
    158 int	_spllower(int);
    159 void	splx(int);
    160 void	_setsoftintr(int);
    161 
    162 #endif /* ! ARM_SPL_NOINLINE */
    163 
    164 #include <sys/device.h>
    165 #include <sys/queue.h>
    166 #include <machine/irqhandler.h>
    167 
    168 #define	splsoft()	_splraise(IPL_SOFT)
    169 #define	splraiseipl(x)	_splraise(x)
    170 
    171 #define	spl0()		(void)_spllower(IPL_NONE)
    172 #define	spllowersoftclock() (void)_spllower(IPL_SOFTCLOCK)
    173 
    174 #include <sys/spl.h>
    175 
    176 /* Use generic software interrupt support. */
    177 #include <arm/softintr.h>
    178 
    179 /* footbridge has 32 interrupt lines */
    180 #define	NIRQ		32
    181 
    182 struct intrhand {
    183 	TAILQ_ENTRY(intrhand) ih_list;	/* link on intrq list */
    184 	int (*ih_func)(void *);		/* handler */
    185 	void *ih_arg;			/* arg for handler */
    186 	int ih_ipl;			/* IPL_* */
    187 	int ih_irq;			/* IRQ number */
    188 };
    189 
    190 #define	IRQNAMESIZE	sizeof("footbridge irq 31")
    191 
    192 struct intrq {
    193 	TAILQ_HEAD(, intrhand) iq_list;	/* handler list */
    194 	struct evcnt iq_ev;		/* event counter */
    195 	int iq_mask;			/* IRQs to mask while handling */
    196 	int iq_levels;			/* IPL_*'s this IRQ has */
    197 	int iq_ist;			/* share type */
    198 	char iq_name[IRQNAMESIZE];	/* interrupt name */
    199 };
    200 
    201 #endif /* _LOCORE */
    202 
    203 #endif	/* _FOOTBRIDGE_INTR_H */
    204