footbridge_io.c revision 1.16.4.1 1 /* $NetBSD: footbridge_io.c,v 1.16.4.1 2011/03/05 20:49:32 rmind Exp $ */
2
3 /*
4 * Copyright (c) 1997 Causality Limited
5 * Copyright (c) 1997 Mark Brinicombe.
6 * All rights reserved.
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 * 3. All advertising materials mentioning features or use of this software
17 * must display the following acknowledgement:
18 * This product includes software developed by Mark Brinicombe
19 * for the NetBSD Project.
20 * 4. The name of the company nor the name of the author may be used to
21 * endorse or promote products derived from this software without specific
22 * prior written permission.
23 *
24 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
25 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
26 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
27 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
28 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
29 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
31 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
32 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
33 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
34 * SUCH DAMAGE.
35 */
36
37 /*
38 * bus_space I/O functions for footbridge
39 */
40
41 #include <sys/cdefs.h>
42 __KERNEL_RCSID(0, "$NetBSD: footbridge_io.c,v 1.16.4.1 2011/03/05 20:49:32 rmind Exp $");
43
44 #include <sys/param.h>
45 #include <sys/systm.h>
46 #include <machine/bus.h>
47 #include <arm/footbridge/footbridge.h>
48 #include <arm/footbridge/dc21285mem.h>
49 #include <uvm/uvm_extern.h>
50
51 /* Proto types for all the bus_space structure functions */
52
53 bs_protos(footbridge);
54 bs_protos(generic);
55 bs_protos(generic_armv4);
56 bs_protos(bs_notimpl);
57 bs_map_proto(footbridge_mem);
58 bs_unmap_proto(footbridge_mem);
59 bs_mmap_proto(footbridge_io);
60 bs_mmap_proto(footbridge_mem);
61
62 /* Declare the footbridge bus space tag */
63
64 struct bus_space footbridge_bs_tag = {
65 /* cookie */
66 (void *) 0, /* Base address */
67
68 /* mapping/unmapping */
69 footbridge_bs_map,
70 footbridge_bs_unmap,
71 footbridge_bs_subregion,
72
73 /* allocation/deallocation */
74 footbridge_bs_alloc,
75 footbridge_bs_free,
76
77 /* get kernel virtual address */
78 footbridge_bs_vaddr,
79
80 /* Mmap bus space for user */
81 bs_notimpl_bs_mmap,
82
83 /* barrier */
84 footbridge_bs_barrier,
85
86 /* read (single) */
87 generic_bs_r_1,
88 generic_armv4_bs_r_2,
89 generic_bs_r_4,
90 bs_notimpl_bs_r_8,
91
92 /* read multiple */
93 generic_bs_rm_1,
94 generic_armv4_bs_rm_2,
95 generic_bs_rm_4,
96 bs_notimpl_bs_rm_8,
97
98 /* read region */
99 bs_notimpl_bs_rr_1,
100 generic_armv4_bs_rr_2,
101 generic_bs_rr_4,
102 bs_notimpl_bs_rr_8,
103
104 /* write (single) */
105 generic_bs_w_1,
106 generic_armv4_bs_w_2,
107 generic_bs_w_4,
108 bs_notimpl_bs_w_8,
109
110 /* write multiple */
111 generic_bs_wm_1,
112 generic_armv4_bs_wm_2,
113 generic_bs_wm_4,
114 bs_notimpl_bs_wm_8,
115
116 /* write region */
117 bs_notimpl_bs_wr_1,
118 generic_armv4_bs_wr_2,
119 generic_bs_wr_4,
120 bs_notimpl_bs_wr_8,
121
122 /* set multiple */
123 bs_notimpl_bs_sm_1,
124 bs_notimpl_bs_sm_2,
125 bs_notimpl_bs_sm_4,
126 bs_notimpl_bs_sm_8,
127
128 /* set region */
129 bs_notimpl_bs_sr_1,
130 generic_armv4_bs_sr_2,
131 bs_notimpl_bs_sr_4,
132 bs_notimpl_bs_sr_8,
133
134 /* copy */
135 bs_notimpl_bs_c_1,
136 generic_armv4_bs_c_2,
137 bs_notimpl_bs_c_4,
138 bs_notimpl_bs_c_8,
139 };
140
141 void footbridge_create_io_bs_tag(t, cookie)
142 struct bus_space *t;
143 void *cookie;
144 {
145 *t = footbridge_bs_tag;
146 t->bs_cookie = cookie;
147 t->bs_mmap = footbridge_io_bs_mmap;
148 }
149
150 void footbridge_create_mem_bs_tag(t, cookie)
151 struct bus_space *t;
152 void *cookie;
153 {
154 *t = footbridge_bs_tag;
155 t->bs_map = footbridge_mem_bs_map;
156 t->bs_unmap = footbridge_mem_bs_unmap;
157 t->bs_mmap = footbridge_mem_bs_mmap;
158 t->bs_cookie = cookie;
159 }
160
161 /* bus space functions */
162
163 int
164 footbridge_bs_map(void *t, bus_addr_t bpa, bus_size_t size, int cacheable, bus_space_handle_t *bshp)
165 {
166 /*
167 * The whole 64K of PCI space is always completely mapped during
168 * boot.
169 *
170 * Eventually this function will do the mapping check overlapping /
171 * multiple mappings.
172 */
173
174 /* The cookie is the base address for the I/O area */
175 *bshp = bpa + (bus_addr_t)t;
176 return(0);
177 }
178
179 int
180 footbridge_mem_bs_map(void *t, bus_addr_t bpa, bus_size_t size, int flags, bus_space_handle_t *bshp)
181 {
182 bus_addr_t startpa, endpa, pa;
183 vaddr_t va;
184
185 /* Round the allocation to page boundries */
186 startpa = trunc_page(bpa);
187 endpa = round_page(bpa + size);
188
189 /*
190 * Check for mappings below 1MB as we have this space already
191 * mapped. In practice it is only the VGA hole that takes
192 * advantage of this.
193 */
194 if (endpa < DC21285_PCI_ISA_MEM_VSIZE) {
195 /* Store the bus space handle */
196 *bshp = DC21285_PCI_ISA_MEM_VBASE + bpa;
197 return 0;
198 }
199
200 /*
201 * Eventually this function will do the mapping check for overlapping /
202 * multiple mappings
203 */
204
205 va = uvm_km_alloc(kernel_map, endpa - startpa, 0,
206 UVM_KMF_VAONLY | UVM_KMF_NOWAIT);
207 if (va == 0)
208 return ENOMEM;
209
210 /* Store the bus space handle */
211 *bshp = va + (bpa & PGOFSET);
212
213 /* Now map the pages */
214 /* The cookie is the physical base address for the I/O area */
215 for (pa = startpa; pa < endpa; pa+=PAGE_SIZE, va += PAGE_SIZE) {
216 pmap_enter(pmap_kernel(), va, (bus_addr_t)t + pa, VM_PROT_READ | VM_PROT_WRITE,
217 VM_PROT_READ | VM_PROT_WRITE| PMAP_WIRED);
218 if ((flags & BUS_SPACE_MAP_CACHEABLE) == 0) {
219 pt_entry_t *pte;
220 pte = vtopte(va);
221 *pte &= ~L2_S_CACHE_MASK;
222 PTE_SYNC(pte);
223 }
224 }
225 pmap_update(pmap_kernel());
226
227 /* if (bpa >= DC21285_PCI_MEM_VSIZE && bpa != DC21285_ARMCSR_VBASE)
228 panic("footbridge_bs_map: Address out of range (%08lx)", bpa);
229 */
230 return(0);
231 }
232
233 int
234 footbridge_bs_alloc(t, rstart, rend, size, alignment, boundary, cacheable,
235 bpap, bshp)
236 void *t;
237 bus_addr_t rstart, rend;
238 bus_size_t size, alignment, boundary;
239 int cacheable;
240 bus_addr_t *bpap;
241 bus_space_handle_t *bshp;
242 {
243 panic("footbridge_alloc(): Help!");
244 }
245
246
247 void
248 footbridge_bs_unmap(void *t, bus_space_handle_t bsh, bus_size_t size)
249 {
250 /*
251 * Temporary implementation
252 */
253 }
254
255 void
256 footbridge_mem_bs_unmap(void *t, bus_space_handle_t bsh, bus_size_t size)
257 {
258 vaddr_t startva, endva;
259
260 /*
261 * Check for mappings below 1MB as we have this space permenantly
262 * mapped. In practice it is only the VGA hole that takes
263 * advantage of this.
264 */
265 if (bsh >= DC21285_PCI_ISA_MEM_VBASE
266 && bsh < (DC21285_PCI_ISA_MEM_VBASE + DC21285_PCI_ISA_MEM_VSIZE)) {
267 return;
268 }
269
270 startva = trunc_page(bsh);
271 endva = round_page(bsh + size);
272
273 pmap_remove(pmap_kernel(), startva, endva);
274 pmap_update(pmap_kernel());
275 uvm_km_free(kernel_map, startva, endva - startva, UVM_KMF_VAONLY);
276 }
277
278 void
279 footbridge_bs_free(void *t, bus_space_handle_t bsh, bus_size_t size)
280 {
281
282 panic("footbridge_free(): Help!");
283 /* footbridge_bs_unmap() does all that we need to do. */
284 /* footbridge_bs_unmap(t, bsh, size);*/
285 }
286
287 int
288 footbridge_bs_subregion(void *t, bus_space_handle_t bsh, bus_size_t offset, bus_size_t size, bus_space_handle_t *nbshp)
289 {
290
291 *nbshp = bsh + (offset << ((int)t));
292 return (0);
293 }
294
295 void *
296 footbridge_bs_vaddr(void *t, bus_space_handle_t bsh)
297 {
298
299 return ((void *)bsh);
300 }
301
302 void
303 footbridge_bs_barrier(void *t, bus_space_handle_t bsh, bus_size_t offset, bus_size_t len, int flags)
304 {
305 }
306
307
308 paddr_t
309 footbridge_io_bs_mmap(void *t, bus_addr_t addr, off_t offset,
310 int prot, int flags)
311 {
312 paddr_t pa;
313
314 /* allow mapping of IO space */
315 if (addr >= DC21285_PCI_IO_SIZE ||
316 addr >= DC21285_PCI_IO_SIZE - offset ||
317 offset < 0 ||
318 offset >= DC21285_PCI_IO_SIZE)
319 return -1;
320
321 pa = DC21285_PCI_IO_BASE + addr + offset;
322
323 return arm_btop(pa);
324 }
325
326
327 paddr_t
328 footbridge_mem_bs_mmap(void *t, bus_addr_t addr, off_t offset,
329 int prot, int flags)
330 {
331 paddr_t pa;
332
333 if (addr >= DC21285_PCI_MEM_SIZE
334 || offset < 0
335 || offset >= DC21285_PCI_MEM_SIZE
336 || addr >= DC21285_PCI_MEM_SIZE - offset)
337 return -1;
338
339 pa = DC21285_PCI_MEM_BASE + addr + offset;
340
341 return arm_btop(pa);
342 }
343