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footbridge_io.c revision 1.17
      1 /*	$NetBSD: footbridge_io.c,v 1.17 2010/11/18 18:06:21 skrll Exp $	*/
      2 
      3 /*
      4  * Copyright (c) 1997 Causality Limited
      5  * Copyright (c) 1997 Mark Brinicombe.
      6  * All rights reserved.
      7  *
      8  * Redistribution and use in source and binary forms, with or without
      9  * modification, are permitted provided that the following conditions
     10  * are met:
     11  * 1. Redistributions of source code must retain the above copyright
     12  *    notice, this list of conditions and the following disclaimer.
     13  * 2. Redistributions in binary form must reproduce the above copyright
     14  *    notice, this list of conditions and the following disclaimer in the
     15  *    documentation and/or other materials provided with the distribution.
     16  * 3. All advertising materials mentioning features or use of this software
     17  *    must display the following acknowledgement:
     18  *	This product includes software developed by Mark Brinicombe
     19  *	for the NetBSD Project.
     20  * 4. The name of the company nor the name of the author may be used to
     21  *    endorse or promote products derived from this software without specific
     22  *    prior written permission.
     23  *
     24  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
     25  * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
     26  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     27  * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
     28  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
     29  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
     30  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     31  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     32  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     33  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     34  * SUCH DAMAGE.
     35  */
     36 
     37 /*
     38  * bus_space I/O functions for footbridge
     39  */
     40 
     41 #include <sys/cdefs.h>
     42 __KERNEL_RCSID(0, "$NetBSD: footbridge_io.c,v 1.17 2010/11/18 18:06:21 skrll Exp $");
     43 
     44 #include <sys/param.h>
     45 #include <sys/systm.h>
     46 #include <machine/bus.h>
     47 #include <arm/footbridge/footbridge.h>
     48 #include <arm/footbridge/dc21285mem.h>
     49 #include <uvm/uvm_extern.h>
     50 
     51 /* Proto types for all the bus_space structure functions */
     52 
     53 bs_protos(footbridge);
     54 bs_protos(generic);
     55 bs_protos(generic_armv4);
     56 bs_protos(bs_notimpl);
     57 bs_map_proto(footbridge_mem);
     58 bs_unmap_proto(footbridge_mem);
     59 bs_mmap_proto(footbridge_mem);
     60 
     61 /* Declare the footbridge bus space tag */
     62 
     63 struct bus_space footbridge_bs_tag = {
     64 	/* cookie */
     65 	(void *) 0,			/* Base address */
     66 
     67 	/* mapping/unmapping */
     68 	footbridge_bs_map,
     69 	footbridge_bs_unmap,
     70 	footbridge_bs_subregion,
     71 
     72 	/* allocation/deallocation */
     73 	footbridge_bs_alloc,
     74 	footbridge_bs_free,
     75 
     76 	/* get kernel virtual address */
     77 	footbridge_bs_vaddr,
     78 
     79 	/* Mmap bus space for user */
     80 	bs_notimpl_bs_mmap,
     81 
     82 	/* barrier */
     83 	footbridge_bs_barrier,
     84 
     85 	/* read (single) */
     86 	generic_bs_r_1,
     87 	generic_armv4_bs_r_2,
     88 	generic_bs_r_4,
     89 	bs_notimpl_bs_r_8,
     90 
     91 	/* read multiple */
     92 	generic_bs_rm_1,
     93 	generic_armv4_bs_rm_2,
     94 	generic_bs_rm_4,
     95 	bs_notimpl_bs_rm_8,
     96 
     97 	/* read region */
     98 	bs_notimpl_bs_rr_1,
     99 	generic_armv4_bs_rr_2,
    100 	generic_bs_rr_4,
    101 	bs_notimpl_bs_rr_8,
    102 
    103 	/* write (single) */
    104 	generic_bs_w_1,
    105 	generic_armv4_bs_w_2,
    106 	generic_bs_w_4,
    107 	bs_notimpl_bs_w_8,
    108 
    109 	/* write multiple */
    110 	generic_bs_wm_1,
    111 	generic_armv4_bs_wm_2,
    112 	generic_bs_wm_4,
    113 	bs_notimpl_bs_wm_8,
    114 
    115 	/* write region */
    116 	bs_notimpl_bs_wr_1,
    117 	generic_armv4_bs_wr_2,
    118 	generic_bs_wr_4,
    119 	bs_notimpl_bs_wr_8,
    120 
    121 	/* set multiple */
    122 	bs_notimpl_bs_sm_1,
    123 	bs_notimpl_bs_sm_2,
    124 	bs_notimpl_bs_sm_4,
    125 	bs_notimpl_bs_sm_8,
    126 
    127 	/* set region */
    128 	bs_notimpl_bs_sr_1,
    129 	generic_armv4_bs_sr_2,
    130 	bs_notimpl_bs_sr_4,
    131 	bs_notimpl_bs_sr_8,
    132 
    133 	/* copy */
    134 	bs_notimpl_bs_c_1,
    135 	generic_armv4_bs_c_2,
    136 	bs_notimpl_bs_c_4,
    137 	bs_notimpl_bs_c_8,
    138 };
    139 
    140 void footbridge_create_io_bs_tag(t, cookie)
    141 	struct bus_space *t;
    142 	void *cookie;
    143 {
    144 	*t = footbridge_bs_tag;
    145 	t->bs_cookie = cookie;
    146 }
    147 
    148 void footbridge_create_mem_bs_tag(t, cookie)
    149 	struct bus_space *t;
    150 	void *cookie;
    151 {
    152 	*t = footbridge_bs_tag;
    153 	t->bs_map = footbridge_mem_bs_map;
    154 	t->bs_unmap = footbridge_mem_bs_unmap;
    155 	t->bs_mmap = footbridge_mem_bs_mmap;
    156 	t->bs_cookie = cookie;
    157 }
    158 
    159 /* bus space functions */
    160 
    161 int
    162 footbridge_bs_map(void *t, bus_addr_t bpa, bus_size_t size, int cacheable, bus_space_handle_t *bshp)
    163 {
    164 	/*
    165 	 * The whole 64K of PCI space is always completely mapped during
    166 	 * boot.
    167 	 *
    168 	 * Eventually this function will do the mapping check overlapping /
    169 	 * multiple mappings.
    170 	 */
    171 
    172 	/* The cookie is the base address for the I/O area */
    173 	*bshp = bpa + (bus_addr_t)t;
    174 	return(0);
    175 }
    176 
    177 int
    178 footbridge_mem_bs_map(void *t, bus_addr_t bpa, bus_size_t size, int flags, bus_space_handle_t *bshp)
    179 {
    180 	bus_addr_t startpa, endpa, pa;
    181 	vaddr_t va;
    182 
    183 	/* Round the allocation to page boundries */
    184 	startpa = trunc_page(bpa);
    185 	endpa = round_page(bpa + size);
    186 
    187 	/*
    188 	 * Check for mappings below 1MB as we have this space already
    189 	 * mapped. In practice it is only the VGA hole that takes
    190 	 * advantage of this.
    191 	 */
    192 	if (endpa < DC21285_PCI_ISA_MEM_VSIZE) {
    193 		/* Store the bus space handle */
    194 		*bshp = DC21285_PCI_ISA_MEM_VBASE + bpa;
    195 		return 0;
    196 	}
    197 
    198 	/*
    199 	 * Eventually this function will do the mapping check for overlapping /
    200 	 * multiple mappings
    201 	 */
    202 
    203 	va = uvm_km_alloc(kernel_map, endpa - startpa, 0,
    204 	    UVM_KMF_VAONLY | UVM_KMF_NOWAIT);
    205 	if (va == 0)
    206 		return ENOMEM;
    207 
    208 	/* Store the bus space handle */
    209 	*bshp = va + (bpa & PGOFSET);
    210 
    211 	/* Now map the pages */
    212 	/* The cookie is the physical base address for the I/O area */
    213 	for (pa = startpa; pa < endpa; pa+=PAGE_SIZE, va += PAGE_SIZE) {
    214 		pmap_enter(pmap_kernel(), va, (bus_addr_t)t + pa, VM_PROT_READ | VM_PROT_WRITE,
    215 		    VM_PROT_READ | VM_PROT_WRITE| PMAP_WIRED);
    216 		if ((flags & BUS_SPACE_MAP_CACHEABLE) == 0) {
    217 			pt_entry_t *pte;
    218 			pte = vtopte(va);
    219 			*pte &= ~L2_S_CACHE_MASK;
    220 			PTE_SYNC(pte);
    221 		}
    222 	}
    223 	pmap_update(pmap_kernel());
    224 
    225 /*	if (bpa >= DC21285_PCI_MEM_VSIZE && bpa != DC21285_ARMCSR_VBASE)
    226 		panic("footbridge_bs_map: Address out of range (%08lx)", bpa);
    227 */
    228 	return(0);
    229 }
    230 
    231 int
    232 footbridge_bs_alloc(t, rstart, rend, size, alignment, boundary, cacheable,
    233     bpap, bshp)
    234 	void *t;
    235 	bus_addr_t rstart, rend;
    236 	bus_size_t size, alignment, boundary;
    237 	int cacheable;
    238 	bus_addr_t *bpap;
    239 	bus_space_handle_t *bshp;
    240 {
    241 	panic("footbridge_alloc(): Help!");
    242 }
    243 
    244 
    245 void
    246 footbridge_bs_unmap(void *t, bus_space_handle_t bsh, bus_size_t size)
    247 {
    248 	/*
    249 	 * Temporary implementation
    250 	 */
    251 }
    252 
    253 void
    254 footbridge_mem_bs_unmap(void *t, bus_space_handle_t bsh, bus_size_t size)
    255 {
    256 	vaddr_t startva, endva;
    257 
    258 	/*
    259 	 * Check for mappings below 1MB as we have this space permenantly
    260 	 * mapped. In practice it is only the VGA hole that takes
    261 	 * advantage of this.
    262 	 */
    263 	if (bsh >= DC21285_PCI_ISA_MEM_VBASE
    264 	    && bsh < (DC21285_PCI_ISA_MEM_VBASE + DC21285_PCI_ISA_MEM_VSIZE)) {
    265 		return;
    266 	}
    267 
    268 	startva = trunc_page(bsh);
    269 	endva = round_page(bsh + size);
    270 
    271 	pmap_remove(pmap_kernel(), startva, endva);
    272 	pmap_update(pmap_kernel());
    273 	uvm_km_free(kernel_map, startva, endva - startva, UVM_KMF_VAONLY);
    274 }
    275 
    276 void
    277 footbridge_bs_free(void *t, bus_space_handle_t bsh, bus_size_t size)
    278 {
    279 
    280 	panic("footbridge_free(): Help!");
    281 	/* footbridge_bs_unmap() does all that we need to do. */
    282 /*	footbridge_bs_unmap(t, bsh, size);*/
    283 }
    284 
    285 int
    286 footbridge_bs_subregion(void *t, bus_space_handle_t bsh, bus_size_t offset, bus_size_t size, bus_space_handle_t *nbshp)
    287 {
    288 
    289 	*nbshp = bsh + (offset << ((int)t));
    290 	return (0);
    291 }
    292 
    293 void *
    294 footbridge_bs_vaddr(void *t, bus_space_handle_t bsh)
    295 {
    296 
    297 	return ((void *)bsh);
    298 }
    299 
    300 void
    301 footbridge_bs_barrier(void *t, bus_space_handle_t bsh, bus_size_t offset, bus_size_t len, int flags)
    302 {
    303 }
    304 
    305 
    306 paddr_t
    307 footbridge_mem_bs_mmap(void *t, bus_addr_t addr, off_t offset,
    308 		       int prot, int flags)
    309 {
    310 	paddr_t pa;
    311 
    312 	if (addr >= DC21285_PCI_MEM_SIZE
    313 	    || offset < 0
    314 	    || offset >= DC21285_PCI_MEM_SIZE
    315 	    || addr >= DC21285_PCI_MEM_SIZE - offset)
    316 		return -1;
    317 
    318 	pa = DC21285_PCI_MEM_BASE + addr + offset;
    319 
    320 	return arm_btop(pa);
    321 }
    322