footbridge_io.c revision 1.5
1 /* $NetBSD: footbridge_io.c,v 1.5 2002/01/05 22:41:48 chris Exp $ */ 2 3 /* 4 * Copyright (c) 1997 Causality Limited 5 * Copyright (c) 1997 Mark Brinicombe. 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. All advertising materials mentioning features or use of this software 17 * must display the following acknowledgement: 18 * This product includes software developed by Mark Brinicombe 19 * for the NetBSD Project. 20 * 4. The name of the company nor the name of the author may be used to 21 * endorse or promote products derived from this software without specific 22 * prior written permission. 23 * 24 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED 25 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 26 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 27 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 28 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 29 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 31 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 32 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 33 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 34 * SUCH DAMAGE. 35 */ 36 37 /* 38 * bus_space I/O functions for footbridge 39 */ 40 41 #include <sys/param.h> 42 #include <sys/systm.h> 43 #include <machine/bus.h> 44 #include <arm/footbridge/footbridge.h> 45 #include <arm/footbridge/dc21285mem.h> 46 #include <uvm/uvm_extern.h> 47 48 /* Proto types for all the bus_space structure functions */ 49 50 bs_protos(footbridge); 51 bs_protos(bs_notimpl); 52 bs_map_proto(footbridge_mem); 53 bs_unmap_proto(footbridge_mem); 54 55 /* Declare the footbridge bus space tag */ 56 57 struct bus_space footbridge_bs_tag = { 58 /* cookie */ 59 (void *) 0, /* Base address */ 60 61 /* mapping/unmapping */ 62 footbridge_bs_map, 63 footbridge_bs_unmap, 64 footbridge_bs_subregion, 65 66 /* allocation/deallocation */ 67 footbridge_bs_alloc, 68 footbridge_bs_free, 69 70 /* get kernel virtual address */ 71 footbridge_bs_vaddr, 72 73 /* Mmap bus space for user */ 74 bs_notimpl_bs_mmap, 75 76 /* barrier */ 77 footbridge_bs_barrier, 78 79 /* read (single) */ 80 footbridge_bs_r_1, 81 footbridge_bs_r_2, 82 footbridge_bs_r_4, 83 bs_notimpl_bs_r_8, 84 85 /* read multiple */ 86 footbridge_bs_rm_1, 87 footbridge_bs_rm_2, 88 footbridge_bs_rm_4, 89 bs_notimpl_bs_rm_8, 90 91 /* read region */ 92 bs_notimpl_bs_rr_1, 93 footbridge_bs_rr_2, 94 footbridge_bs_rr_4, 95 bs_notimpl_bs_rr_8, 96 97 /* write (single) */ 98 footbridge_bs_w_1, 99 footbridge_bs_w_2, 100 footbridge_bs_w_4, 101 bs_notimpl_bs_w_8, 102 103 /* write multiple */ 104 footbridge_bs_wm_1, 105 footbridge_bs_wm_2, 106 footbridge_bs_wm_4, 107 bs_notimpl_bs_wm_8, 108 109 /* write region */ 110 bs_notimpl_bs_wr_1, 111 footbridge_bs_wr_2, 112 footbridge_bs_wr_4, 113 bs_notimpl_bs_wr_8, 114 115 /* set multiple */ 116 bs_notimpl_bs_sm_1, 117 bs_notimpl_bs_sm_2, 118 bs_notimpl_bs_sm_4, 119 bs_notimpl_bs_sm_8, 120 121 /* set region */ 122 bs_notimpl_bs_sr_1, 123 footbridge_bs_sr_2, 124 bs_notimpl_bs_sr_4, 125 bs_notimpl_bs_sr_8, 126 127 /* copy */ 128 bs_notimpl_bs_c_1, 129 footbridge_bs_c_2, 130 bs_notimpl_bs_c_4, 131 bs_notimpl_bs_c_8, 132 }; 133 134 void footbridge_create_io_bs_tag(t, cookie) 135 struct bus_space *t; 136 void *cookie; 137 { 138 *t = footbridge_bs_tag; 139 t->bs_cookie = cookie; 140 } 141 142 void footbridge_create_mem_bs_tag(t, cookie) 143 struct bus_space *t; 144 void *cookie; 145 { 146 *t = footbridge_bs_tag; 147 t->bs_map = footbridge_mem_bs_map; 148 t->bs_unmap = footbridge_mem_bs_unmap; 149 t->bs_cookie = cookie; 150 } 151 152 /* bus space functions */ 153 154 int 155 footbridge_bs_map(t, bpa, size, cacheable, bshp) 156 void *t; 157 bus_addr_t bpa; 158 bus_size_t size; 159 int cacheable; 160 bus_space_handle_t *bshp; 161 { 162 /* 163 * The whole 64K of PCI space is always completely mapped during 164 * boot. 165 * 166 * Eventually this function will do the mapping check overlapping / 167 * multiple mappings. 168 */ 169 170 /* The cookie is the base address for the I/O area */ 171 *bshp = bpa + (bus_addr_t)t; 172 return(0); 173 } 174 175 int 176 footbridge_mem_bs_map(t, bpa, size, cacheable, bshp) 177 void *t; 178 bus_addr_t bpa; 179 bus_size_t size; 180 int cacheable; 181 bus_space_handle_t *bshp; 182 { 183 bus_addr_t startpa, endpa; 184 vaddr_t va; 185 186 /* Round the allocation to page boundries */ 187 startpa = trunc_page(bpa); 188 endpa = round_page(bpa + size); 189 190 /* 191 * Check for mappings below 1MB as we have this space already 192 * mapped. In practice it is only the VGA hole that takes 193 * advantage of this. 194 */ 195 if (endpa < DC21285_PCI_ISA_MEM_VSIZE) { 196 /* Store the bus space handle */ 197 *bshp = DC21285_PCI_ISA_MEM_VBASE + bpa; 198 return 0; 199 } 200 201 /* 202 * Eventually this function will do the mapping check for overlapping / 203 * multiple mappings 204 */ 205 206 va = uvm_km_valloc(kernel_map, endpa - startpa); 207 if (va == 0) 208 return ENOMEM; 209 210 /* Store the bus space handle */ 211 *bshp = va + (bpa & PGOFSET); 212 213 /* Now map the pages */ 214 /* The cookie is the physical base address for the I/O area */ 215 while (startpa < endpa) { 216 pmap_enter(pmap_kernel(), va, (bus_addr_t)t + startpa, 217 VM_PROT_READ | VM_PROT_WRITE, 0); 218 va += NBPG; 219 startpa += NBPG; 220 } 221 pmap_update(pmap_kernel()); 222 223 /* if (bpa >= DC21285_PCI_MEM_VSIZE && bpa != DC21285_ARMCSR_VBASE) 224 panic("footbridge_bs_map: Address out of range (%08lx)\n", bpa); 225 */ 226 return(0); 227 } 228 229 int 230 footbridge_bs_alloc(t, rstart, rend, size, alignment, boundary, cacheable, 231 bpap, bshp) 232 void *t; 233 bus_addr_t rstart, rend; 234 bus_size_t size, alignment, boundary; 235 int cacheable; 236 bus_addr_t *bpap; 237 bus_space_handle_t *bshp; 238 { 239 panic("footbridge_alloc(): Help!\n"); 240 } 241 242 243 void 244 footbridge_bs_unmap(t, bsh, size) 245 void *t; 246 bus_space_handle_t bsh; 247 bus_size_t size; 248 { 249 /* 250 * Temporary implementation 251 */ 252 } 253 254 void 255 footbridge_mem_bs_unmap(t, bsh, size) 256 void *t; 257 bus_space_handle_t bsh; 258 bus_size_t size; 259 { 260 vaddr_t startva, endva; 261 262 /* 263 * Check for mappings below 1MB as we have this space permenantly 264 * mapped. In practice it is only the VGA hole that takes 265 * advantage of this. 266 */ 267 if (bsh >= DC21285_PCI_ISA_MEM_VBASE 268 && bsh < (DC21285_PCI_ISA_MEM_VBASE + DC21285_PCI_ISA_MEM_VSIZE)) { 269 return; 270 } 271 272 startva = trunc_page(bsh); 273 endva = round_page(bsh + size); 274 275 uvm_km_free(kernel_map, startva, endva - startva); 276 } 277 278 void 279 footbridge_bs_free(t, bsh, size) 280 void *t; 281 bus_space_handle_t bsh; 282 bus_size_t size; 283 { 284 285 panic("footbridge_free(): Help!\n"); 286 /* footbridge_bs_unmap() does all that we need to do. */ 287 /* footbridge_bs_unmap(t, bsh, size);*/ 288 } 289 290 int 291 footbridge_bs_subregion(t, bsh, offset, size, nbshp) 292 void *t; 293 bus_space_handle_t bsh; 294 bus_size_t offset, size; 295 bus_space_handle_t *nbshp; 296 { 297 298 *nbshp = bsh + (offset << ((int)t)); 299 return (0); 300 } 301 302 void * 303 footbridge_bs_vaddr(t, bsh) 304 void *t; 305 bus_space_handle_t bsh; 306 { 307 308 return ((void *)bsh); 309 } 310 311 void 312 footbridge_bs_barrier(t, bsh, offset, len, flags) 313 void *t; 314 bus_space_handle_t bsh; 315 bus_size_t offset, len; 316 int flags; 317 { 318 } 319
Indexes created Sun Oct 26 21:10:03 GMT 2025