footbridge_pci.c revision 1.24
1 /* $NetBSD: footbridge_pci.c,v 1.24 2012/10/27 17:17:37 chs Exp $ */ 2 3 /* 4 * Copyright (c) 1997,1998 Mark Brinicombe. 5 * Copyright (c) 1997,1998 Causality Limited 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. All advertising materials mentioning features or use of this software 17 * must display the following acknowledgement: 18 * This product includes software developed by Mark Brinicombe 19 * for the NetBSD Project. 20 * 4. The name of the company nor the name of the author may be used to 21 * endorse or promote products derived from this software without specific 22 * prior written permission. 23 * 24 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED 25 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 26 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 27 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 28 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 29 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 31 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 32 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 33 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 34 * SUCH DAMAGE. 35 */ 36 37 #include <sys/cdefs.h> 38 __KERNEL_RCSID(0, "$NetBSD: footbridge_pci.c,v 1.24 2012/10/27 17:17:37 chs Exp $"); 39 40 #include <sys/param.h> 41 #include <sys/systm.h> 42 #include <sys/conf.h> 43 #include <sys/malloc.h> 44 #include <sys/device.h> 45 46 #define _ARM32_BUS_DMA_PRIVATE 47 #include <sys/bus.h> 48 #include <machine/intr.h> 49 50 #include <dev/pci/pcireg.h> 51 #include <dev/pci/pcivar.h> 52 53 #include <arm/footbridge/dc21285reg.h> 54 #include <arm/footbridge/dc21285mem.h> 55 56 #include "isa.h" 57 #if NISA > 0 58 #include <dev/isa/isavar.h> 59 #endif 60 61 void footbridge_pci_attach_hook(device_t, device_t, 62 struct pcibus_attach_args *); 63 int footbridge_pci_bus_maxdevs(void *, int); 64 pcitag_t footbridge_pci_make_tag(void *, int, int, int); 65 void footbridge_pci_decompose_tag(void *, pcitag_t, int *, 66 int *, int *); 67 pcireg_t footbridge_pci_conf_read(void *, pcitag_t, int); 68 void footbridge_pci_conf_write(void *, pcitag_t, int, 69 pcireg_t); 70 int footbridge_pci_intr_map(const struct pci_attach_args *, 71 pci_intr_handle_t *); 72 const char *footbridge_pci_intr_string(void *, pci_intr_handle_t); 73 void *footbridge_pci_intr_establish(void *, pci_intr_handle_t, 74 int, int (*)(void *), void *); 75 void footbridge_pci_intr_disestablish(void *, void *); 76 const struct evcnt *footbridge_pci_intr_evcnt(void *, pci_intr_handle_t); 77 78 struct arm32_pci_chipset footbridge_pci_chipset = { 79 NULL, /* conf_v */ 80 #ifdef netwinder 81 netwinder_pci_attach_hook, 82 #else 83 footbridge_pci_attach_hook, 84 #endif 85 footbridge_pci_bus_maxdevs, 86 footbridge_pci_make_tag, 87 footbridge_pci_decompose_tag, 88 footbridge_pci_conf_read, 89 footbridge_pci_conf_write, 90 NULL, /* intr_v */ 91 footbridge_pci_intr_map, 92 footbridge_pci_intr_string, 93 footbridge_pci_intr_evcnt, 94 footbridge_pci_intr_establish, 95 footbridge_pci_intr_disestablish 96 }; 97 98 struct arm32_dma_range footbridge_dma_ranges[1]; 99 100 /* 101 * PCI doesn't have any special needs; just use the generic versions 102 * of these functions. 103 */ 104 struct arm32_bus_dma_tag footbridge_pci_bus_dma_tag = { 105 ._ranges = footbridge_dma_ranges, 106 ._nranges = 1, 107 _BUS_DMAMAP_FUNCS, 108 _BUS_DMAMEM_FUNCS, 109 _BUS_DMATAG_FUNCS, 110 }; 111 112 /* 113 * Currently we only support 12 devices as we select directly in the 114 * type 0 config cycle 115 * (See conf_{read,write} for more detail 116 */ 117 #define MAX_PCI_DEVICES 21 118 119 /*static int 120 pci_intr(void *arg) 121 { 122 printf("pci int %x\n", (int)arg); 123 return(0); 124 }*/ 125 126 127 void 128 footbridge_pci_attach_hook(device_t parent, device_t self, struct pcibus_attach_args *pba) 129 { 130 #ifdef PCI_DEBUG 131 printf("footbridge_pci_attach_hook()\n"); 132 #endif 133 134 /* intr_claim(18, IPL_NONE, "pci int 0", pci_intr, (void *)0x10000); 135 intr_claim(8, IPL_NONE, "pci int 1", pci_intr, (void *)0x10001); 136 intr_claim(9, IPL_NONE, "pci int 2", pci_intr, (void *)0x10002); 137 intr_claim(11, IPL_NONE, "pci int 3", pci_intr, (void *)0x10003);*/ 138 } 139 140 int 141 footbridge_pci_bus_maxdevs(void *pcv, int busno) 142 { 143 #ifdef PCI_DEBUG 144 printf("footbridge_pci_bus_maxdevs(pcv=%p, busno=%d)\n", pcv, busno); 145 #endif 146 return(MAX_PCI_DEVICES); 147 } 148 149 pcitag_t 150 footbridge_pci_make_tag(void *pcv, int bus, int device, int function) 151 { 152 #ifdef PCI_DEBUG 153 printf("footbridge_pci_make_tag(pcv=%p, bus=%d, device=%d, function=%d)\n", 154 pcv, bus, device, function); 155 #endif 156 return ((bus << 16) | (device << 11) | (function << 8)); 157 } 158 159 void 160 footbridge_pci_decompose_tag(void *pcv, pcitag_t tag, int *busp, int *devicep, int *functionp) 161 { 162 #ifdef PCI_DEBUG 163 printf("footbridge_pci_decompose_tag(pcv=%p, tag=0x%08x, bp=%p, dp=%p, fp=%p)\n", 164 pcv, (uint32_t)tag, busp, devicep, functionp); 165 #endif 166 167 if (busp != NULL) 168 *busp = (tag >> 16) & 0xff; 169 if (devicep != NULL) 170 *devicep = (tag >> 11) & 0x1f; 171 if (functionp != NULL) 172 *functionp = (tag >> 8) & 0x7; 173 } 174 175 pcireg_t 176 footbridge_pci_conf_read(void *pcv, pcitag_t tag, int reg) 177 { 178 int bus, device, function; 179 u_int address; 180 pcireg_t data; 181 182 footbridge_pci_decompose_tag(pcv, tag, &bus, &device, &function); 183 if (bus == 0) 184 /* Limited to 12 devices or we exceed type 0 config space */ 185 address = DC21285_PCI_TYPE_0_CONFIG_VBASE | (3 << 22) | (device << 11); 186 else 187 address = DC21285_PCI_TYPE_1_CONFIG_VBASE | (device << 11) | 188 (bus << 16); 189 190 address |= (function << 8) | reg; 191 192 data = *((unsigned int *)address); 193 #ifdef PCI_DEBUG 194 printf("footbridge_pci_conf_read(pcv=%p tag=0x%08x reg=0x%02x)=0x%08x\n", 195 pcv, (uint32_t)tag, reg, data); 196 #endif 197 return(data); 198 } 199 200 void 201 footbridge_pci_conf_write(void *pcv, pcitag_t tag, int reg, pcireg_t data) 202 { 203 int bus, device, function; 204 u_int address; 205 206 footbridge_pci_decompose_tag(pcv, tag, &bus, &device, &function); 207 if (bus == 0) 208 address = DC21285_PCI_TYPE_0_CONFIG_VBASE | (3 << 22) | (device << 11); 209 else 210 address = DC21285_PCI_TYPE_1_CONFIG_VBASE | (device << 11) | 211 (bus << 16); 212 213 address |= (function << 8) | reg; 214 215 #ifdef PCI_DEBUG 216 printf("footbridge_pci_conf_write(pcv=%p tag=0x%08x reg=0x%02x, 0x%08x)\n", 217 pcv, (uint32_t)tag, reg, data); 218 #endif 219 220 *((unsigned int *)address) = data; 221 } 222 223 int 224 footbridge_pci_intr_map(const struct pci_attach_args *pa, 225 pci_intr_handle_t *ihp) 226 { 227 int pin = pa->pa_intrpin, line = pa->pa_intrline; 228 int intr = -1; 229 230 #ifdef PCI_DEBUG 231 void *pcv = pa->pa_pc; 232 pcitag_t intrtag = pa->pa_intrtag; 233 int bus, device, function; 234 235 footbridge_pci_decompose_tag(pcv, intrtag, &bus, &device, &function); 236 printf("footbridge_pci_intr_map: pcv=%p, tag=%08x pin=%d line=%d dev=%d\n", 237 pcv, (uint32_t)intrtag, pin, line, device); 238 #endif 239 240 /* 241 * Only the line is used to map the interrupt. 242 * The firmware is expected to setup up the interrupt 243 * line as seen from the CPU 244 * This means the firmware deals with the interrupt rotation 245 * between slots etc. 246 * 247 * Perhaps the firmware should also to the final mapping 248 * to a 21285 interrupt bit so the code below would be 249 * completely MI. 250 */ 251 252 switch (line) { 253 case PCI_INTERRUPT_PIN_NONE: 254 case 0xff: 255 /* No IRQ */ 256 printf("pci_intr_map: no mapping for pin %c\n", '@' + pin); 257 *ihp = -1; 258 return(1); 259 break; 260 #ifdef cats 261 /* This is machine dependent and needs to be moved */ 262 case PCI_INTERRUPT_PIN_A: 263 intr = IRQ_PCI; 264 break; 265 case PCI_INTERRUPT_PIN_B: 266 intr = IRQ_IN_L0; 267 break; 268 case PCI_INTERRUPT_PIN_C: 269 intr = IRQ_IN_L1; 270 break; 271 case PCI_INTERRUPT_PIN_D: 272 intr = IRQ_IN_L3; 273 break; 274 #endif 275 default: 276 /* 277 * Experimental firmware feature ... 278 * 279 * If the interrupt line is in the range 0x80 to 0x8F 280 * then the lower 4 bits indicate the ISA interrupt 281 * bit that should be used. 282 * If the interrupt line is in the range 0x40 to 0x5F 283 * then the lower 5 bits indicate the actual DC21285 284 * interrupt bit that should be used. 285 */ 286 287 if (line >= 0x40 && line <= 0x5f) 288 intr = line & 0x1f; 289 else if (line >= 0x80 && line <= 0x8f) 290 intr = line; 291 else { 292 printf("footbridge_pci_intr_map: out of range interrupt" 293 "pin %d line %d (%#x)\n", pin, line, line); 294 *ihp = -1; 295 return(1); 296 } 297 break; 298 } 299 300 #ifdef PCI_DEBUG 301 printf("pin %d, line %d mapped to int %d\n", pin, line, intr); 302 #endif 303 304 *ihp = intr; 305 return(0); 306 } 307 308 const char * 309 footbridge_pci_intr_string(void *pcv, pci_intr_handle_t ih) 310 { 311 static char irqstr[7+2+3]; /* "isairq dd" + NULL + sanity */ 312 313 #ifdef PCI_DEBUG 314 printf("footbridge_pci_intr_string(pcv=%p, ih=0x%lx)\n", pcv, ih); 315 #endif 316 if (ih == 0) 317 panic("footbridge_pci_intr_string: bogus handle 0x%lx", ih); 318 319 #if NISA > 0 320 if (ih >= 0x80 && ih <= 0x8f) { 321 sprintf(irqstr, "isairq %ld", (ih & 0x0f)); 322 return(irqstr); 323 } 324 #endif 325 sprintf(irqstr, "irq %ld", ih); 326 return(irqstr); 327 } 328 329 void * 330 footbridge_pci_intr_establish( 331 void *pcv, 332 pci_intr_handle_t ih, 333 int level, 334 int (*func)(void *), 335 void *arg) 336 { 337 void *intr; 338 int length; 339 char *string; 340 341 #ifdef PCI_DEBUG 342 printf("footbridge_pci_intr_establish(pcv=%p, ih=0x%lx, level=%d, func=%p, arg=%p)\n", 343 pcv, ih, level, func, arg); 344 #endif 345 346 /* Copy the interrupt string to a private buffer */ 347 length = strlen(footbridge_pci_intr_string(pcv, ih)); 348 string = malloc(length + 1, M_DEVBUF, M_WAITOK); 349 strcpy(string, footbridge_pci_intr_string(pcv, ih)); 350 #if NISA > 0 351 /* 352 * XXX the IDE driver will attach the interrupts in compat mode and 353 * thus we need to fail this here. 354 * This assumes that the interrupts are 14 and 15 which they are for 355 * IDE compat mode. 356 * Really the firmware should make this clear in the interrupt reg. 357 */ 358 if (ih >= 0x80 && ih <= 0x8d) { 359 intr = isa_intr_establish(NULL, (ih & 0x0f), IST_EDGE, 360 level, func, arg); 361 } else 362 #endif 363 intr = footbridge_intr_claim(ih, level, string, func, arg); 364 365 return(intr); 366 } 367 368 void 369 footbridge_pci_intr_disestablish(void *pcv, void *cookie) 370 { 371 #ifdef PCI_DEBUG 372 printf("footbridge_pci_intr_disestablish(pcv=%p, cookie=0x%p)\n", 373 pcv, cookie); 374 #endif 375 /* XXXX Need to free the string */ 376 footbridge_intr_disestablish(cookie); 377 } 378
Indexes created Mon Sep 29 21:09:56 GMT 2025