Home | History | Annotate | Line # | Download | only in isa
isadma_machdep.c revision 1.11
      1 /*	$NetBSD: isadma_machdep.c,v 1.11 2009/03/14 14:45:55 dsl Exp $	*/
      2 
      3 #define ISA_DMA_STATS
      4 
      5 /*-
      6  * Copyright (c) 1996, 1997, 1998 The NetBSD Foundation, Inc.
      7  * All rights reserved.
      8  *
      9  * This code is derived from software contributed to The NetBSD Foundation
     10  * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
     11  * NASA Ames Research Center.
     12  *
     13  * Redistribution and use in source and binary forms, with or without
     14  * modification, are permitted provided that the following conditions
     15  * are met:
     16  * 1. Redistributions of source code must retain the above copyright
     17  *    notice, this list of conditions and the following disclaimer.
     18  * 2. Redistributions in binary form must reproduce the above copyright
     19  *    notice, this list of conditions and the following disclaimer in the
     20  *    documentation and/or other materials provided with the distribution.
     21  *
     22  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     23  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     24  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     25  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     26  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     27  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     28  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     29  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     30  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     31  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     32  * POSSIBILITY OF SUCH DAMAGE.
     33  */
     34 
     35 #include <sys/cdefs.h>
     36 __KERNEL_RCSID(0, "$NetBSD: isadma_machdep.c,v 1.11 2009/03/14 14:45:55 dsl Exp $");
     37 
     38 #include <sys/param.h>
     39 #include <sys/systm.h>
     40 #include <sys/syslog.h>
     41 #include <sys/device.h>
     42 #include <sys/malloc.h>
     43 #include <sys/proc.h>
     44 #include <sys/mbuf.h>
     45 
     46 #define _ARM32_BUS_DMA_PRIVATE
     47 #include <machine/bus.h>
     48 
     49 #include <dev/isa/isareg.h>
     50 #include <dev/isa/isavar.h>
     51 
     52 #include <uvm/uvm_extern.h>
     53 
     54 /*
     55  * ISA has a 24-bit address limitation, so at most it has a 16M
     56  * DMA range.  However, some platforms have a more limited range,
     57  * e.g. the Shark NC.  On these systems, we are provided with
     58  * a set of DMA ranges.  The pmap module is aware of these ranges
     59  * and places DMA-safe memory for them onto an alternate free list
     60  * so that they are protected from being used to service page faults,
     61  * etc. (unless we've run out of memory elsewhere).
     62  */
     63 #define	ISA_DMA_BOUNCE_THRESHOLD	(16 * 1024 * 1024)
     64 
     65 struct arm32_dma_range *footbridge_isa_dma_ranges;
     66 int footbridge_isa_dma_nranges;
     67 
     68 int	_isa_bus_dmamap_create(bus_dma_tag_t, bus_size_t, int,
     69 	    bus_size_t, bus_size_t, int, bus_dmamap_t *);
     70 void	_isa_bus_dmamap_destroy(bus_dma_tag_t, bus_dmamap_t);
     71 int	_isa_bus_dmamap_load(bus_dma_tag_t, bus_dmamap_t, void *,
     72 	    bus_size_t, struct proc *, int);
     73 int	_isa_bus_dmamap_load_mbuf(bus_dma_tag_t, bus_dmamap_t,
     74 	    struct mbuf *, int);
     75 int	_isa_bus_dmamap_load_uio(bus_dma_tag_t, bus_dmamap_t,
     76 	    struct uio *, int);
     77 int	_isa_bus_dmamap_load_raw(bus_dma_tag_t, bus_dmamap_t,
     78 	    bus_dma_segment_t *, int, bus_size_t, int);
     79 void	_isa_bus_dmamap_unload(bus_dma_tag_t, bus_dmamap_t);
     80 void	_isa_bus_dmamap_sync(bus_dma_tag_t, bus_dmamap_t,
     81 	    bus_addr_t, bus_size_t, int);
     82 
     83 int	_isa_bus_dmamem_alloc(bus_dma_tag_t, bus_size_t, bus_size_t,
     84 	    bus_size_t, bus_dma_segment_t *, int, int *, int);
     85 
     86 int	_isa_dma_alloc_bouncebuf(bus_dma_tag_t, bus_dmamap_t,
     87 	    bus_size_t, int);
     88 void	_isa_dma_free_bouncebuf(bus_dma_tag_t, bus_dmamap_t);
     89 
     90 /*
     91  * Entry points for ISA DMA.  These are mostly wrappers around
     92  * the generic functions that understand how to deal with bounce
     93  * buffers, if necessary.
     94  */
     95 struct arm32_bus_dma_tag isa_bus_dma_tag = {
     96 	0,				/* _ranges */
     97 	0,				/* _nranges */
     98 	NULL,
     99 	_isa_bus_dmamap_create,
    100 	_isa_bus_dmamap_destroy,
    101 	_isa_bus_dmamap_load,
    102 	_isa_bus_dmamap_load_mbuf,
    103 	_isa_bus_dmamap_load_uio,
    104 	_isa_bus_dmamap_load_raw,
    105 	_isa_bus_dmamap_unload,
    106 	_isa_bus_dmamap_sync,		/* pre */
    107 	_isa_bus_dmamap_sync,		/* post */
    108 	_isa_bus_dmamem_alloc,
    109 	_bus_dmamem_free,
    110 	_bus_dmamem_map,
    111 	_bus_dmamem_unmap,
    112 	_bus_dmamem_mmap,
    113 };
    114 
    115 /*
    116  * Initialize ISA DMA.
    117  */
    118 void
    119 isa_dma_init()
    120 {
    121 
    122 	isa_bus_dma_tag._ranges = footbridge_isa_dma_ranges;
    123 	isa_bus_dma_tag._nranges = footbridge_isa_dma_nranges;
    124 }
    125 
    126 /**********************************************************************
    127  * bus.h dma interface entry points
    128  **********************************************************************/
    129 
    130 #ifdef ISA_DMA_STATS
    131 #define	STAT_INCR(v)	(v)++
    132 #define	STAT_DECR(v)	do { \
    133 		if ((v) == 0) \
    134 			printf("%s:%d -- Already 0!\n", __FILE__, __LINE__); \
    135 		else \
    136 			(v)--; \
    137 		} while (0)
    138 u_long	isa_dma_stats_loads;
    139 u_long	isa_dma_stats_bounces;
    140 u_long	isa_dma_stats_nbouncebufs;
    141 #else
    142 #define	STAT_INCR(v)
    143 #define	STAT_DECR(v)
    144 #endif
    145 
    146 /*
    147  * Create an ISA DMA map.
    148  */
    149 int
    150 _isa_bus_dmamap_create(t, size, nsegments, maxsegsz, boundary, flags, dmamp)
    151 	bus_dma_tag_t t;
    152 	bus_size_t size;
    153 	int nsegments;
    154 	bus_size_t maxsegsz;
    155 	bus_size_t boundary;
    156 	int flags;
    157 	bus_dmamap_t *dmamp;
    158 {
    159 	struct arm32_isa_dma_cookie *cookie;
    160 	bus_dmamap_t map;
    161 	int error, cookieflags;
    162 	void *cookiestore;
    163 	size_t cookiesize;
    164 
    165 	/* Call common function to create the basic map. */
    166 	error = _bus_dmamap_create(t, size, nsegments, maxsegsz, boundary,
    167 	    flags, dmamp);
    168 	if (error)
    169 		return (error);
    170 
    171 	map = *dmamp;
    172 	map->_dm_cookie = NULL;
    173 
    174 	cookiesize = sizeof(struct arm32_isa_dma_cookie);
    175 
    176 	/*
    177 	 * ISA only has 24-bits of address space.  This means
    178 	 * we can't DMA to pages over 16M.  In order to DMA to
    179 	 * arbitrary buffers, we use "bounce buffers" - pages
    180 	 * in memory below the 16M boundary.  On DMA reads,
    181 	 * DMA happens to the bounce buffers, and is copied into
    182 	 * the caller's buffer.  On writes, data is copied into
    183 	 * but bounce buffer, and the DMA happens from those
    184 	 * pages.  To software using the DMA mapping interface,
    185 	 * this looks simply like a data cache.
    186 	 *
    187 	 * If we have more than 16M of RAM in the system, we may
    188 	 * need bounce buffers.  We check and remember that here.
    189 	 *
    190 	 * There are exceptions, however.  VLB devices can do
    191 	 * 32-bit DMA, and indicate that here.
    192 	 *
    193 	 * ...or, there is an opposite case.  The most segments
    194 	 * a transfer will require is (maxxfer / PAGE_SIZE) + 1.  If
    195 	 * the caller can't handle that many segments (e.g. the
    196 	 * ISA DMA controller), we may have to bounce it as well.
    197 	 *
    198 	 * Well, not really... see note above regarding DMA ranges.
    199 	 * Because of the range issue on this platform, we just
    200 	 * always "might bounce".
    201 	 */
    202 	cookieflags = ID_MIGHT_NEED_BOUNCE;
    203 	cookiesize += (sizeof(bus_dma_segment_t) * map->_dm_segcnt);
    204 
    205 	/*
    206 	 * Allocate our cookie.
    207 	 */
    208 	if ((cookiestore = malloc(cookiesize, M_DMAMAP,
    209 	    (flags & BUS_DMA_NOWAIT) ? M_NOWAIT : M_WAITOK)) == NULL) {
    210 		error = ENOMEM;
    211 		goto out;
    212 	}
    213 	memset(cookiestore, 0, cookiesize);
    214 	cookie = (struct arm32_isa_dma_cookie *)cookiestore;
    215 	cookie->id_flags = cookieflags;
    216 	map->_dm_cookie = cookie;
    217 
    218 	if (cookieflags & ID_MIGHT_NEED_BOUNCE) {
    219 		/*
    220 		 * Allocate the bounce pages now if the caller
    221 		 * wishes us to do so.
    222 		 */
    223 		if ((flags & BUS_DMA_ALLOCNOW) == 0)
    224 			goto out;
    225 
    226 		error = _isa_dma_alloc_bouncebuf(t, map, size, flags);
    227 	}
    228 
    229  out:
    230 	if (error) {
    231 		if (map->_dm_cookie != NULL)
    232 			free(map->_dm_cookie, M_DMAMAP);
    233 		_bus_dmamap_destroy(t, map);
    234 	}
    235 	return (error);
    236 }
    237 
    238 /*
    239  * Destroy an ISA DMA map.
    240  */
    241 void
    242 _isa_bus_dmamap_destroy(t, map)
    243 	bus_dma_tag_t t;
    244 	bus_dmamap_t map;
    245 {
    246 	struct arm32_isa_dma_cookie *cookie = map->_dm_cookie;
    247 
    248 	/*
    249 	 * Free any bounce pages this map might hold.
    250 	 */
    251 	if (cookie->id_flags & ID_HAS_BOUNCE)
    252 		_isa_dma_free_bouncebuf(t, map);
    253 
    254 	free(cookie, M_DMAMAP);
    255 	_bus_dmamap_destroy(t, map);
    256 }
    257 
    258 /*
    259  * Load an ISA DMA map with a linear buffer.
    260  */
    261 int
    262 _isa_bus_dmamap_load(t, map, buf, buflen, p, flags)
    263 	bus_dma_tag_t t;
    264 	bus_dmamap_t map;
    265 	void *buf;
    266 	bus_size_t buflen;
    267 	struct proc *p;
    268 	int flags;
    269 {
    270 	struct arm32_isa_dma_cookie *cookie = map->_dm_cookie;
    271 	int error;
    272 
    273 	STAT_INCR(isa_dma_stats_loads);
    274 
    275 	/*
    276 	 * Make sure that on error condition we return "no valid mappings."
    277 	 */
    278 	map->dm_mapsize = 0;
    279 	map->dm_nsegs = 0;
    280 
    281 	/*
    282 	 * Try to load the map the normal way.  If this errors out,
    283 	 * and we can bounce, we will.
    284 	 */
    285 	error = _bus_dmamap_load(t, map, buf, buflen, p, flags);
    286 	if (error == 0 ||
    287 	    (error != 0 && (cookie->id_flags & ID_MIGHT_NEED_BOUNCE) == 0))
    288 		return (error);
    289 
    290 	/*
    291 	 * First attempt failed; bounce it.
    292 	 */
    293 
    294 	STAT_INCR(isa_dma_stats_bounces);
    295 
    296 	/*
    297 	 * Allocate bounce pages, if necessary.
    298 	 */
    299 	if ((cookie->id_flags & ID_HAS_BOUNCE) == 0) {
    300 		error = _isa_dma_alloc_bouncebuf(t, map, buflen, flags);
    301 		if (error)
    302 			return (error);
    303 	}
    304 
    305 	/*
    306 	 * Cache a pointer to the caller's buffer and load the DMA map
    307 	 * with the bounce buffer.
    308 	 */
    309 	cookie->id_origbuf = buf;
    310 	cookie->id_origbuflen = buflen;
    311 	cookie->id_buftype = ID_BUFTYPE_LINEAR;
    312 	error = _bus_dmamap_load(t, map, cookie->id_bouncebuf, buflen,
    313 	    NULL, flags);
    314 	if (error) {
    315 		/*
    316 		 * Free the bounce pages, unless our resources
    317 		 * are reserved for our exclusive use.
    318 		 */
    319 		if ((map->_dm_flags & BUS_DMA_ALLOCNOW) == 0)
    320 			_isa_dma_free_bouncebuf(t, map);
    321 		return (error);
    322 	}
    323 
    324 	/* ...so _isa_bus_dmamap_sync() knows we're bouncing */
    325 	cookie->id_flags |= ID_IS_BOUNCING;
    326 	return (0);
    327 }
    328 
    329 /*
    330  * Like _isa_bus_dmamap_load(), but for mbufs.
    331  */
    332 int
    333 _isa_bus_dmamap_load_mbuf(t, map, m0, flags)
    334 	bus_dma_tag_t t;
    335 	bus_dmamap_t map;
    336 	struct mbuf *m0;
    337 	int flags;
    338 {
    339 	struct arm32_isa_dma_cookie *cookie = map->_dm_cookie;
    340 	int error;
    341 
    342 	/*
    343 	 * Make sure that on error condition we return "no valid mappings."
    344 	 */
    345 	map->dm_mapsize = 0;
    346 	map->dm_nsegs = 0;
    347 
    348 #ifdef DIAGNOSTIC
    349 	if ((m0->m_flags & M_PKTHDR) == 0)
    350 		panic("_isa_bus_dmamap_load_mbuf: no packet header");
    351 #endif
    352 
    353 	if (m0->m_pkthdr.len > map->_dm_size)
    354 		return (EINVAL);
    355 
    356 	/*
    357 	 * Try to load the map the normal way.  If this errors out,
    358 	 * and we can bounce, we will.
    359 	 */
    360 	error = _bus_dmamap_load_mbuf(t, map, m0, flags);
    361 	if (error == 0 ||
    362 	    (error != 0 && (cookie->id_flags & ID_MIGHT_NEED_BOUNCE) == 0))
    363 		return (error);
    364 
    365 	/*
    366 	 * First attempt failed; bounce it.
    367 	 */
    368 
    369 	STAT_INCR(isa_dma_stats_bounces);
    370 
    371 	/*
    372 	 * Allocate bounce pages, if necessary.
    373 	 */
    374 	if ((cookie->id_flags & ID_HAS_BOUNCE) == 0) {
    375 		error = _isa_dma_alloc_bouncebuf(t, map, m0->m_pkthdr.len,
    376 		    flags);
    377 		if (error)
    378 			return (error);
    379 	}
    380 
    381 	/*
    382 	 * Cache a pointer to the caller's buffer and load the DMA map
    383 	 * with the bounce buffer.
    384 	 */
    385 	cookie->id_origbuf = m0;
    386 	cookie->id_origbuflen = m0->m_pkthdr.len;	/* not really used */
    387 	cookie->id_buftype = ID_BUFTYPE_MBUF;
    388 	error = _bus_dmamap_load(t, map, cookie->id_bouncebuf,
    389 	    m0->m_pkthdr.len, NULL, flags);
    390 	if (error) {
    391 		/*
    392 		 * Free the bounce pages, unless our resources
    393 		 * are reserved for our exclusive use.
    394 		 */
    395 		if ((map->_dm_flags & BUS_DMA_ALLOCNOW) == 0)
    396 			_isa_dma_free_bouncebuf(t, map);
    397 		return (error);
    398 	}
    399 
    400 	/* ...so _isa_bus_dmamap_sync() knows we're bouncing */
    401 	cookie->id_flags |= ID_IS_BOUNCING;
    402 	return (0);
    403 }
    404 
    405 /*
    406  * Like _isa_bus_dmamap_load(), but for uios.
    407  */
    408 int
    409 _isa_bus_dmamap_load_uio(t, map, uio, flags)
    410 	bus_dma_tag_t t;
    411 	bus_dmamap_t map;
    412 	struct uio *uio;
    413 	int flags;
    414 {
    415 
    416 	panic("_isa_bus_dmamap_load_uio: not implemented");
    417 }
    418 
    419 /*
    420  * Like _isa_bus_dmamap_load(), but for raw memory allocated with
    421  * bus_dmamem_alloc().
    422  */
    423 int
    424 _isa_bus_dmamap_load_raw(t, map, segs, nsegs, size, flags)
    425 	bus_dma_tag_t t;
    426 	bus_dmamap_t map;
    427 	bus_dma_segment_t *segs;
    428 	int nsegs;
    429 	bus_size_t size;
    430 	int flags;
    431 {
    432 
    433 	panic("_isa_bus_dmamap_load_raw: not implemented");
    434 }
    435 
    436 /*
    437  * Unload an ISA DMA map.
    438  */
    439 void
    440 _isa_bus_dmamap_unload(t, map)
    441 	bus_dma_tag_t t;
    442 	bus_dmamap_t map;
    443 {
    444 	struct arm32_isa_dma_cookie *cookie = map->_dm_cookie;
    445 
    446 	/*
    447 	 * If we have bounce pages, free them, unless they're
    448 	 * reserved for our exclusive use.
    449 	 */
    450 	if ((cookie->id_flags & ID_HAS_BOUNCE) &&
    451 	    (map->_dm_flags & BUS_DMA_ALLOCNOW) == 0)
    452 		_isa_dma_free_bouncebuf(t, map);
    453 
    454 	cookie->id_flags &= ~ID_IS_BOUNCING;
    455 	cookie->id_buftype = ID_BUFTYPE_INVALID;
    456 
    457 	/*
    458 	 * Do the generic bits of the unload.
    459 	 */
    460 	_bus_dmamap_unload(t, map);
    461 }
    462 
    463 /*
    464  * Synchronize an ISA DMA map.
    465  */
    466 void
    467 _isa_bus_dmamap_sync(t, map, offset, len, ops)
    468 	bus_dma_tag_t t;
    469 	bus_dmamap_t map;
    470 	bus_addr_t offset;
    471 	bus_size_t len;
    472 	int ops;
    473 {
    474 	struct arm32_isa_dma_cookie *cookie = map->_dm_cookie;
    475 
    476 	/*
    477 	 * Mixing PRE and POST operations is not allowed.
    478 	 */
    479 	if ((ops & (BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE)) != 0 &&
    480 	    (ops & (BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE)) != 0)
    481 		panic("_isa_bus_dmamap_sync: mix PRE and POST");
    482 
    483 #ifdef DIAGNOSTIC
    484 	if ((ops & (BUS_DMASYNC_PREWRITE|BUS_DMASYNC_POSTREAD)) != 0) {
    485 		if (offset >= map->dm_mapsize)
    486 			panic("_isa_bus_dmamap_sync: bad offset");
    487 		if (len == 0 || (offset + len) > map->dm_mapsize)
    488 			panic("_isa_bus_dmamap_sync: bad length");
    489 	}
    490 #endif
    491 
    492 	/*
    493 	 * If we're not bouncing, just return; nothing to do.
    494 	 */
    495 	if ((cookie->id_flags & ID_IS_BOUNCING) == 0)
    496 		return;
    497 
    498 	switch (cookie->id_buftype) {
    499 	case ID_BUFTYPE_LINEAR:
    500 		/*
    501 		 * Nothing to do for pre-read.
    502 		 */
    503 
    504 		if (ops & BUS_DMASYNC_PREWRITE) {
    505 			/*
    506 			 * Copy the caller's buffer to the bounce buffer.
    507 			 */
    508 			memcpy((char *)cookie->id_bouncebuf + offset,
    509 			    (char *)cookie->id_origbuf + offset, len);
    510 		}
    511 
    512 		if (ops & BUS_DMASYNC_POSTREAD) {
    513 			/*
    514 			 * Copy the bounce buffer to the caller's buffer.
    515 			 */
    516 			memcpy((char *)cookie->id_origbuf + offset,
    517 			    (char *)cookie->id_bouncebuf + offset, len);
    518 		}
    519 
    520 		/*
    521 		 * Nothing to do for post-write.
    522 		 */
    523 		break;
    524 
    525 	case ID_BUFTYPE_MBUF:
    526 	    {
    527 		struct mbuf *m, *m0 = cookie->id_origbuf;
    528 		bus_size_t minlen, moff;
    529 
    530 		/*
    531 		 * Nothing to do for pre-read.
    532 		 */
    533 
    534 		if (ops & BUS_DMASYNC_PREWRITE) {
    535 			/*
    536 			 * Copy the caller's buffer to the bounce buffer.
    537 			 */
    538 			m_copydata(m0, offset, len,
    539 			    (char *)cookie->id_bouncebuf + offset);
    540 		}
    541 
    542 		if (ops & BUS_DMASYNC_POSTREAD) {
    543 			/*
    544 			 * Copy the bounce buffer to the caller's buffer.
    545 			 */
    546 			for (moff = offset, m = m0; m != NULL && len != 0;
    547 			    m = m->m_next) {
    548 				/* Find the beginning mbuf. */
    549 				if (moff >= m->m_len) {
    550 					moff -= m->m_len;
    551 					continue;
    552 				}
    553 
    554 				/*
    555 				 * Now at the first mbuf to sync; nail
    556 				 * each one until we have exhausted the
    557 				 * length.
    558 				 */
    559 				minlen = len < m->m_len - moff ?
    560 				    len : m->m_len - moff;
    561 
    562 				memcpy(mtod(m, char *) + moff,
    563 				    (char *)cookie->id_bouncebuf + offset,
    564 				    minlen);
    565 
    566 				moff = 0;
    567 				len -= minlen;
    568 				offset += minlen;
    569 			}
    570 		}
    571 
    572 		/*
    573 		 * Nothing to do for post-write.
    574 		 */
    575 		break;
    576 	    }
    577 
    578 	case ID_BUFTYPE_UIO:
    579 		panic("_isa_bus_dmamap_sync: ID_BUFTYPE_UIO");
    580 		break;
    581 
    582 	case ID_BUFTYPE_RAW:
    583 		panic("_isa_bus_dmamap_sync: ID_BUFTYPE_RAW");
    584 		break;
    585 
    586 	case ID_BUFTYPE_INVALID:
    587 		panic("_isa_bus_dmamap_sync: ID_BUFTYPE_INVALID");
    588 		break;
    589 
    590 	default:
    591 		printf("unknown buffer type %d\n", cookie->id_buftype);
    592 		panic("_isa_bus_dmamap_sync");
    593 	}
    594 }
    595 
    596 /*
    597  * Allocate memory safe for ISA DMA.
    598  */
    599 int
    600 _isa_bus_dmamem_alloc(t, size, alignment, boundary, segs, nsegs, rsegs, flags)
    601 	bus_dma_tag_t t;
    602 	bus_size_t size, alignment, boundary;
    603 	bus_dma_segment_t *segs;
    604 	int nsegs;
    605 	int *rsegs;
    606 	int flags;
    607 {
    608 
    609 	if (t->_ranges == NULL)
    610 		return (ENOMEM);
    611 
    612 	/* _bus_dmamem_alloc() does the range checks for us. */
    613 	return (_bus_dmamem_alloc(t, size, alignment, boundary, segs, nsegs,
    614 	    rsegs, flags));
    615 }
    616 
    617 /**********************************************************************
    618  * ISA DMA utility functions
    619  **********************************************************************/
    620 
    621 int
    622 _isa_dma_alloc_bouncebuf(t, map, size, flags)
    623 	bus_dma_tag_t t;
    624 	bus_dmamap_t map;
    625 	bus_size_t size;
    626 	int flags;
    627 {
    628 	struct arm32_isa_dma_cookie *cookie = map->_dm_cookie;
    629 	int error = 0;
    630 
    631 	cookie->id_bouncebuflen = round_page(size);
    632 	error = _isa_bus_dmamem_alloc(t, cookie->id_bouncebuflen,
    633 	    PAGE_SIZE, map->_dm_boundary, cookie->id_bouncesegs,
    634 	    map->_dm_segcnt, &cookie->id_nbouncesegs, flags);
    635 	if (error)
    636 		goto out;
    637 	error = _bus_dmamem_map(t, cookie->id_bouncesegs,
    638 	    cookie->id_nbouncesegs, cookie->id_bouncebuflen,
    639 	    (void **)&cookie->id_bouncebuf, flags);
    640 
    641  out:
    642 	if (error) {
    643 		_bus_dmamem_free(t, cookie->id_bouncesegs,
    644 		    cookie->id_nbouncesegs);
    645 		cookie->id_bouncebuflen = 0;
    646 		cookie->id_nbouncesegs = 0;
    647 	} else {
    648 		cookie->id_flags |= ID_HAS_BOUNCE;
    649 		STAT_INCR(isa_dma_stats_nbouncebufs);
    650 	}
    651 
    652 	return (error);
    653 }
    654 
    655 void
    656 _isa_dma_free_bouncebuf(t, map)
    657 	bus_dma_tag_t t;
    658 	bus_dmamap_t map;
    659 {
    660 	struct arm32_isa_dma_cookie *cookie = map->_dm_cookie;
    661 
    662 	STAT_DECR(isa_dma_stats_nbouncebufs);
    663 
    664 	_bus_dmamem_unmap(t, cookie->id_bouncebuf,
    665 	    cookie->id_bouncebuflen);
    666 	_bus_dmamem_free(t, cookie->id_bouncesegs,
    667 	    cookie->id_nbouncesegs);
    668 	cookie->id_bouncebuflen = 0;
    669 	cookie->id_nbouncesegs = 0;
    670 	cookie->id_flags &= ~ID_HAS_BOUNCE;
    671 }
    672