isadma_machdep.c revision 1.6 1 /* $NetBSD: isadma_machdep.c,v 1.6 2003/07/30 17:28:20 he Exp $ */
2
3 #define ISA_DMA_STATS
4
5 /*-
6 * Copyright (c) 1996, 1997, 1998 The NetBSD Foundation, Inc.
7 * All rights reserved.
8 *
9 * This code is derived from software contributed to The NetBSD Foundation
10 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
11 * NASA Ames Research Center.
12 *
13 * Redistribution and use in source and binary forms, with or without
14 * modification, are permitted provided that the following conditions
15 * are met:
16 * 1. Redistributions of source code must retain the above copyright
17 * notice, this list of conditions and the following disclaimer.
18 * 2. Redistributions in binary form must reproduce the above copyright
19 * notice, this list of conditions and the following disclaimer in the
20 * documentation and/or other materials provided with the distribution.
21 * 3. All advertising materials mentioning features or use of this software
22 * must display the following acknowledgement:
23 * This product includes software developed by the NetBSD
24 * Foundation, Inc. and its contributors.
25 * 4. Neither the name of The NetBSD Foundation nor the names of its
26 * contributors may be used to endorse or promote products derived
27 * from this software without specific prior written permission.
28 *
29 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
30 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
31 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
32 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
33 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
34 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
35 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
36 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
37 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
38 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
39 * POSSIBILITY OF SUCH DAMAGE.
40 */
41
42 #include <sys/cdefs.h>
43 __KERNEL_RCSID(0, "$NetBSD: isadma_machdep.c,v 1.6 2003/07/30 17:28:20 he Exp $");
44
45 #include <sys/param.h>
46 #include <sys/systm.h>
47 #include <sys/syslog.h>
48 #include <sys/device.h>
49 #include <sys/malloc.h>
50 #include <sys/proc.h>
51 #include <sys/mbuf.h>
52
53 #define _ARM32_BUS_DMA_PRIVATE
54 #include <machine/bus.h>
55
56 #include <dev/isa/isareg.h>
57 #include <dev/isa/isavar.h>
58
59 #include <uvm/uvm_extern.h>
60
61 /*
62 * ISA has a 24-bit address limitation, so at most it has a 16M
63 * DMA range. However, some platforms have a more limited range,
64 * e.g. the Shark NC. On these systems, we are provided with
65 * a set of DMA ranges. The pmap module is aware of these ranges
66 * and places DMA-safe memory for them onto an alternate free list
67 * so that they are protected from being used to service page faults,
68 * etc. (unless we've run out of memory elsewhere).
69 */
70 #define ISA_DMA_BOUNCE_THRESHOLD (16 * 1024 * 1024)
71
72 struct arm32_dma_range *footbridge_isa_dma_ranges;
73 int footbridge_isa_dma_nranges;
74
75 int _isa_bus_dmamap_create __P((bus_dma_tag_t, bus_size_t, int,
76 bus_size_t, bus_size_t, int, bus_dmamap_t *));
77 void _isa_bus_dmamap_destroy __P((bus_dma_tag_t, bus_dmamap_t));
78 int _isa_bus_dmamap_load __P((bus_dma_tag_t, bus_dmamap_t, void *,
79 bus_size_t, struct proc *, int));
80 int _isa_bus_dmamap_load_mbuf __P((bus_dma_tag_t, bus_dmamap_t,
81 struct mbuf *, int));
82 int _isa_bus_dmamap_load_uio __P((bus_dma_tag_t, bus_dmamap_t,
83 struct uio *, int));
84 int _isa_bus_dmamap_load_raw __P((bus_dma_tag_t, bus_dmamap_t,
85 bus_dma_segment_t *, int, bus_size_t, int));
86 void _isa_bus_dmamap_unload __P((bus_dma_tag_t, bus_dmamap_t));
87 void _isa_bus_dmamap_sync __P((bus_dma_tag_t, bus_dmamap_t,
88 bus_addr_t, bus_size_t, int));
89
90 int _isa_bus_dmamem_alloc __P((bus_dma_tag_t, bus_size_t, bus_size_t,
91 bus_size_t, bus_dma_segment_t *, int, int *, int));
92
93 int _isa_dma_alloc_bouncebuf __P((bus_dma_tag_t, bus_dmamap_t,
94 bus_size_t, int));
95 void _isa_dma_free_bouncebuf __P((bus_dma_tag_t, bus_dmamap_t));
96
97 /*
98 * Entry points for ISA DMA. These are mostly wrappers around
99 * the generic functions that understand how to deal with bounce
100 * buffers, if necessary.
101 */
102 struct arm32_bus_dma_tag isa_bus_dma_tag = {
103 0, /* _ranges */
104 0, /* _nranges */
105 NULL,
106 _isa_bus_dmamap_create,
107 _isa_bus_dmamap_destroy,
108 _isa_bus_dmamap_load,
109 _isa_bus_dmamap_load_mbuf,
110 _isa_bus_dmamap_load_uio,
111 _isa_bus_dmamap_load_raw,
112 _isa_bus_dmamap_unload,
113 _isa_bus_dmamap_sync, /* pre */
114 _isa_bus_dmamap_sync, /* post */
115 _isa_bus_dmamem_alloc,
116 _bus_dmamem_free,
117 _bus_dmamem_map,
118 _bus_dmamem_unmap,
119 _bus_dmamem_mmap,
120 };
121
122 /*
123 * Initialize ISA DMA.
124 */
125 void
126 isa_dma_init()
127 {
128
129 isa_bus_dma_tag._ranges = footbridge_isa_dma_ranges;
130 isa_bus_dma_tag._nranges = footbridge_isa_dma_nranges;
131 }
132
133 /**********************************************************************
134 * bus.h dma interface entry points
135 **********************************************************************/
136
137 #ifdef ISA_DMA_STATS
138 #define STAT_INCR(v) (v)++
139 #define STAT_DECR(v) do { \
140 if ((v) == 0) \
141 printf("%s:%d -- Already 0!\n", __FILE__, __LINE__); \
142 else \
143 (v)--; \
144 } while (0)
145 u_long isa_dma_stats_loads;
146 u_long isa_dma_stats_bounces;
147 u_long isa_dma_stats_nbouncebufs;
148 #else
149 #define STAT_INCR(v)
150 #define STAT_DECR(v)
151 #endif
152
153 /*
154 * Create an ISA DMA map.
155 */
156 int
157 _isa_bus_dmamap_create(t, size, nsegments, maxsegsz, boundary, flags, dmamp)
158 bus_dma_tag_t t;
159 bus_size_t size;
160 int nsegments;
161 bus_size_t maxsegsz;
162 bus_size_t boundary;
163 int flags;
164 bus_dmamap_t *dmamp;
165 {
166 struct arm32_isa_dma_cookie *cookie;
167 bus_dmamap_t map;
168 int error, cookieflags;
169 void *cookiestore;
170 size_t cookiesize;
171
172 /* Call common function to create the basic map. */
173 error = _bus_dmamap_create(t, size, nsegments, maxsegsz, boundary,
174 flags, dmamp);
175 if (error)
176 return (error);
177
178 map = *dmamp;
179 map->_dm_cookie = NULL;
180
181 cookiesize = sizeof(struct arm32_isa_dma_cookie);
182
183 /*
184 * ISA only has 24-bits of address space. This means
185 * we can't DMA to pages over 16M. In order to DMA to
186 * arbitrary buffers, we use "bounce buffers" - pages
187 * in memory below the 16M boundary. On DMA reads,
188 * DMA happens to the bounce buffers, and is copied into
189 * the caller's buffer. On writes, data is copied into
190 * but bounce buffer, and the DMA happens from those
191 * pages. To software using the DMA mapping interface,
192 * this looks simply like a data cache.
193 *
194 * If we have more than 16M of RAM in the system, we may
195 * need bounce buffers. We check and remember that here.
196 *
197 * There are exceptions, however. VLB devices can do
198 * 32-bit DMA, and indicate that here.
199 *
200 * ...or, there is an opposite case. The most segments
201 * a transfer will require is (maxxfer / PAGE_SIZE) + 1. If
202 * the caller can't handle that many segments (e.g. the
203 * ISA DMA controller), we may have to bounce it as well.
204 *
205 * Well, not really... see note above regarding DMA ranges.
206 * Because of the range issue on this platform, we just
207 * always "might bounce".
208 */
209 cookieflags = ID_MIGHT_NEED_BOUNCE;
210 cookiesize += (sizeof(bus_dma_segment_t) * map->_dm_segcnt);
211
212 /*
213 * Allocate our cookie.
214 */
215 if ((cookiestore = malloc(cookiesize, M_DMAMAP,
216 (flags & BUS_DMA_NOWAIT) ? M_NOWAIT : M_WAITOK)) == NULL) {
217 error = ENOMEM;
218 goto out;
219 }
220 memset(cookiestore, 0, cookiesize);
221 cookie = (struct arm32_isa_dma_cookie *)cookiestore;
222 cookie->id_flags = cookieflags;
223 map->_dm_cookie = cookie;
224
225 if (cookieflags & ID_MIGHT_NEED_BOUNCE) {
226 /*
227 * Allocate the bounce pages now if the caller
228 * wishes us to do so.
229 */
230 if ((flags & BUS_DMA_ALLOCNOW) == 0)
231 goto out;
232
233 error = _isa_dma_alloc_bouncebuf(t, map, size, flags);
234 }
235
236 out:
237 if (error) {
238 if (map->_dm_cookie != NULL)
239 free(map->_dm_cookie, M_DMAMAP);
240 _bus_dmamap_destroy(t, map);
241 }
242 return (error);
243 }
244
245 /*
246 * Destroy an ISA DMA map.
247 */
248 void
249 _isa_bus_dmamap_destroy(t, map)
250 bus_dma_tag_t t;
251 bus_dmamap_t map;
252 {
253 struct arm32_isa_dma_cookie *cookie = map->_dm_cookie;
254
255 /*
256 * Free any bounce pages this map might hold.
257 */
258 if (cookie->id_flags & ID_HAS_BOUNCE)
259 _isa_dma_free_bouncebuf(t, map);
260
261 free(cookie, M_DMAMAP);
262 _bus_dmamap_destroy(t, map);
263 }
264
265 /*
266 * Load an ISA DMA map with a linear buffer.
267 */
268 int
269 _isa_bus_dmamap_load(t, map, buf, buflen, p, flags)
270 bus_dma_tag_t t;
271 bus_dmamap_t map;
272 void *buf;
273 bus_size_t buflen;
274 struct proc *p;
275 int flags;
276 {
277 struct arm32_isa_dma_cookie *cookie = map->_dm_cookie;
278 int error;
279
280 STAT_INCR(isa_dma_stats_loads);
281
282 /*
283 * Make sure that on error condition we return "no valid mappings."
284 */
285 map->dm_mapsize = 0;
286 map->dm_nsegs = 0;
287
288 /*
289 * Try to load the map the normal way. If this errors out,
290 * and we can bounce, we will.
291 */
292 error = _bus_dmamap_load(t, map, buf, buflen, p, flags);
293 if (error == 0 ||
294 (error != 0 && (cookie->id_flags & ID_MIGHT_NEED_BOUNCE) == 0))
295 return (error);
296
297 /*
298 * First attempt failed; bounce it.
299 */
300
301 STAT_INCR(isa_dma_stats_bounces);
302
303 /*
304 * Allocate bounce pages, if necessary.
305 */
306 if ((cookie->id_flags & ID_HAS_BOUNCE) == 0) {
307 error = _isa_dma_alloc_bouncebuf(t, map, buflen, flags);
308 if (error)
309 return (error);
310 }
311
312 /*
313 * Cache a pointer to the caller's buffer and load the DMA map
314 * with the bounce buffer.
315 */
316 cookie->id_origbuf = buf;
317 cookie->id_origbuflen = buflen;
318 cookie->id_buftype = ID_BUFTYPE_LINEAR;
319 error = _bus_dmamap_load(t, map, cookie->id_bouncebuf, buflen,
320 NULL, flags);
321 if (error) {
322 /*
323 * Free the bounce pages, unless our resources
324 * are reserved for our exclusive use.
325 */
326 if ((map->_dm_flags & BUS_DMA_ALLOCNOW) == 0)
327 _isa_dma_free_bouncebuf(t, map);
328 return (error);
329 }
330
331 /* ...so _isa_bus_dmamap_sync() knows we're bouncing */
332 cookie->id_flags |= ID_IS_BOUNCING;
333 return (0);
334 }
335
336 /*
337 * Like _isa_bus_dmamap_load(), but for mbufs.
338 */
339 int
340 _isa_bus_dmamap_load_mbuf(t, map, m0, flags)
341 bus_dma_tag_t t;
342 bus_dmamap_t map;
343 struct mbuf *m0;
344 int flags;
345 {
346 struct arm32_isa_dma_cookie *cookie = map->_dm_cookie;
347 int error;
348
349 /*
350 * Make sure that on error condition we return "no valid mappings."
351 */
352 map->dm_mapsize = 0;
353 map->dm_nsegs = 0;
354
355 #ifdef DIAGNOSTIC
356 if ((m0->m_flags & M_PKTHDR) == 0)
357 panic("_isa_bus_dmamap_load_mbuf: no packet header");
358 #endif
359
360 if (m0->m_pkthdr.len > map->_dm_size)
361 return (EINVAL);
362
363 /*
364 * Try to load the map the normal way. If this errors out,
365 * and we can bounce, we will.
366 */
367 error = _bus_dmamap_load_mbuf(t, map, m0, flags);
368 if (error == 0 ||
369 (error != 0 && (cookie->id_flags & ID_MIGHT_NEED_BOUNCE) == 0))
370 return (error);
371
372 /*
373 * First attempt failed; bounce it.
374 */
375
376 STAT_INCR(isa_dma_stats_bounces);
377
378 /*
379 * Allocate bounce pages, if necessary.
380 */
381 if ((cookie->id_flags & ID_HAS_BOUNCE) == 0) {
382 error = _isa_dma_alloc_bouncebuf(t, map, m0->m_pkthdr.len,
383 flags);
384 if (error)
385 return (error);
386 }
387
388 /*
389 * Cache a pointer to the caller's buffer and load the DMA map
390 * with the bounce buffer.
391 */
392 cookie->id_origbuf = m0;
393 cookie->id_origbuflen = m0->m_pkthdr.len; /* not really used */
394 cookie->id_buftype = ID_BUFTYPE_MBUF;
395 error = _bus_dmamap_load(t, map, cookie->id_bouncebuf,
396 m0->m_pkthdr.len, NULL, flags);
397 if (error) {
398 /*
399 * Free the bounce pages, unless our resources
400 * are reserved for our exclusive use.
401 */
402 if ((map->_dm_flags & BUS_DMA_ALLOCNOW) == 0)
403 _isa_dma_free_bouncebuf(t, map);
404 return (error);
405 }
406
407 /* ...so _isa_bus_dmamap_sync() knows we're bouncing */
408 cookie->id_flags |= ID_IS_BOUNCING;
409 return (0);
410 }
411
412 /*
413 * Like _isa_bus_dmamap_load(), but for uios.
414 */
415 int
416 _isa_bus_dmamap_load_uio(t, map, uio, flags)
417 bus_dma_tag_t t;
418 bus_dmamap_t map;
419 struct uio *uio;
420 int flags;
421 {
422
423 panic("_isa_bus_dmamap_load_uio: not implemented");
424 }
425
426 /*
427 * Like _isa_bus_dmamap_load(), but for raw memory allocated with
428 * bus_dmamem_alloc().
429 */
430 int
431 _isa_bus_dmamap_load_raw(t, map, segs, nsegs, size, flags)
432 bus_dma_tag_t t;
433 bus_dmamap_t map;
434 bus_dma_segment_t *segs;
435 int nsegs;
436 bus_size_t size;
437 int flags;
438 {
439
440 panic("_isa_bus_dmamap_load_raw: not implemented");
441 }
442
443 /*
444 * Unload an ISA DMA map.
445 */
446 void
447 _isa_bus_dmamap_unload(t, map)
448 bus_dma_tag_t t;
449 bus_dmamap_t map;
450 {
451 struct arm32_isa_dma_cookie *cookie = map->_dm_cookie;
452
453 /*
454 * If we have bounce pages, free them, unless they're
455 * reserved for our exclusive use.
456 */
457 if ((cookie->id_flags & ID_HAS_BOUNCE) &&
458 (map->_dm_flags & BUS_DMA_ALLOCNOW) == 0)
459 _isa_dma_free_bouncebuf(t, map);
460
461 cookie->id_flags &= ~ID_IS_BOUNCING;
462 cookie->id_buftype = ID_BUFTYPE_INVALID;
463
464 /*
465 * Do the generic bits of the unload.
466 */
467 _bus_dmamap_unload(t, map);
468 }
469
470 /*
471 * Synchronize an ISA DMA map.
472 */
473 void
474 _isa_bus_dmamap_sync(t, map, offset, len, ops)
475 bus_dma_tag_t t;
476 bus_dmamap_t map;
477 bus_addr_t offset;
478 bus_size_t len;
479 int ops;
480 {
481 struct arm32_isa_dma_cookie *cookie = map->_dm_cookie;
482
483 /*
484 * Mixing PRE and POST operations is not allowed.
485 */
486 if ((ops & (BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE)) != 0 &&
487 (ops & (BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE)) != 0)
488 panic("_isa_bus_dmamap_sync: mix PRE and POST");
489
490 #ifdef DIAGNOSTIC
491 if ((ops & (BUS_DMASYNC_PREWRITE|BUS_DMASYNC_POSTREAD)) != 0) {
492 if (offset >= map->dm_mapsize)
493 panic("_isa_bus_dmamap_sync: bad offset");
494 if (len == 0 || (offset + len) > map->dm_mapsize)
495 panic("_isa_bus_dmamap_sync: bad length");
496 }
497 #endif
498
499 /*
500 * If we're not bouncing, just return; nothing to do.
501 */
502 if ((cookie->id_flags & ID_IS_BOUNCING) == 0)
503 return;
504
505 switch (cookie->id_buftype) {
506 case ID_BUFTYPE_LINEAR:
507 /*
508 * Nothing to do for pre-read.
509 */
510
511 if (ops & BUS_DMASYNC_PREWRITE) {
512 /*
513 * Copy the caller's buffer to the bounce buffer.
514 */
515 memcpy((char *)cookie->id_bouncebuf + offset,
516 (char *)cookie->id_origbuf + offset, len);
517 }
518
519 if (ops & BUS_DMASYNC_POSTREAD) {
520 /*
521 * Copy the bounce buffer to the caller's buffer.
522 */
523 memcpy((char *)cookie->id_origbuf + offset,
524 (char *)cookie->id_bouncebuf + offset, len);
525 }
526
527 /*
528 * Nothing to do for post-write.
529 */
530 break;
531
532 case ID_BUFTYPE_MBUF:
533 {
534 struct mbuf *m, *m0 = cookie->id_origbuf;
535 bus_size_t minlen, moff;
536
537 /*
538 * Nothing to do for pre-read.
539 */
540
541 if (ops & BUS_DMASYNC_PREWRITE) {
542 /*
543 * Copy the caller's buffer to the bounce buffer.
544 */
545 m_copydata(m0, offset, len,
546 (char *)cookie->id_bouncebuf + offset);
547 }
548
549 if (ops & BUS_DMASYNC_POSTREAD) {
550 /*
551 * Copy the bounce buffer to the caller's buffer.
552 */
553 for (moff = offset, m = m0; m != NULL && len != 0;
554 m = m->m_next) {
555 /* Find the beginning mbuf. */
556 if (moff >= m->m_len) {
557 moff -= m->m_len;
558 continue;
559 }
560
561 /*
562 * Now at the first mbuf to sync; nail
563 * each one until we have exhausted the
564 * length.
565 */
566 minlen = len < m->m_len - moff ?
567 len : m->m_len - moff;
568
569 memcpy(mtod(m, caddr_t) + moff,
570 (char *)cookie->id_bouncebuf + offset,
571 minlen);
572
573 moff = 0;
574 len -= minlen;
575 offset += minlen;
576 }
577 }
578
579 /*
580 * Nothing to do for post-write.
581 */
582 break;
583 }
584
585 case ID_BUFTYPE_UIO:
586 panic("_isa_bus_dmamap_sync: ID_BUFTYPE_UIO");
587 break;
588
589 case ID_BUFTYPE_RAW:
590 panic("_isa_bus_dmamap_sync: ID_BUFTYPE_RAW");
591 break;
592
593 case ID_BUFTYPE_INVALID:
594 panic("_isa_bus_dmamap_sync: ID_BUFTYPE_INVALID");
595 break;
596
597 default:
598 printf("unknown buffer type %d\n", cookie->id_buftype);
599 panic("_isa_bus_dmamap_sync");
600 }
601 }
602
603 /*
604 * Allocate memory safe for ISA DMA.
605 */
606 int
607 _isa_bus_dmamem_alloc(t, size, alignment, boundary, segs, nsegs, rsegs, flags)
608 bus_dma_tag_t t;
609 bus_size_t size, alignment, boundary;
610 bus_dma_segment_t *segs;
611 int nsegs;
612 int *rsegs;
613 int flags;
614 {
615
616 if (t->_ranges == NULL)
617 return (ENOMEM);
618
619 /* _bus_dmamem_alloc() does the range checks for us. */
620 return (_bus_dmamem_alloc(t, size, alignment, boundary, segs, nsegs,
621 rsegs, flags));
622 }
623
624 /**********************************************************************
625 * ISA DMA utility functions
626 **********************************************************************/
627
628 int
629 _isa_dma_alloc_bouncebuf(t, map, size, flags)
630 bus_dma_tag_t t;
631 bus_dmamap_t map;
632 bus_size_t size;
633 int flags;
634 {
635 struct arm32_isa_dma_cookie *cookie = map->_dm_cookie;
636 int error = 0;
637
638 cookie->id_bouncebuflen = round_page(size);
639 error = _isa_bus_dmamem_alloc(t, cookie->id_bouncebuflen,
640 PAGE_SIZE, map->_dm_boundary, cookie->id_bouncesegs,
641 map->_dm_segcnt, &cookie->id_nbouncesegs, flags);
642 if (error)
643 goto out;
644 error = _bus_dmamem_map(t, cookie->id_bouncesegs,
645 cookie->id_nbouncesegs, cookie->id_bouncebuflen,
646 (caddr_t *)&cookie->id_bouncebuf, flags);
647
648 out:
649 if (error) {
650 _bus_dmamem_free(t, cookie->id_bouncesegs,
651 cookie->id_nbouncesegs);
652 cookie->id_bouncebuflen = 0;
653 cookie->id_nbouncesegs = 0;
654 } else {
655 cookie->id_flags |= ID_HAS_BOUNCE;
656 STAT_INCR(isa_dma_stats_nbouncebufs);
657 }
658
659 return (error);
660 }
661
662 void
663 _isa_dma_free_bouncebuf(t, map)
664 bus_dma_tag_t t;
665 bus_dmamap_t map;
666 {
667 struct arm32_isa_dma_cookie *cookie = map->_dm_cookie;
668
669 STAT_DECR(isa_dma_stats_nbouncebufs);
670
671 _bus_dmamem_unmap(t, cookie->id_bouncebuf,
672 cookie->id_bouncebuflen);
673 _bus_dmamem_free(t, cookie->id_bouncesegs,
674 cookie->id_nbouncesegs);
675 cookie->id_bouncebuflen = 0;
676 cookie->id_nbouncesegs = 0;
677 cookie->id_flags &= ~ID_HAS_BOUNCE;
678 }
679