1 1.3 ryo /* $NetBSD: gemini_a4x_space.c,v 1.3 2018/03/16 17:56:31 ryo Exp $ */ 2 1.1 matt 3 1.1 matt /* adapted from: 4 1.1 matt * NetBSD: pxa2x0_a4x_space.c,v 1.4 2006/07/28 08:15:29 simonb Exp 5 1.1 matt */ 6 1.1 matt 7 1.1 matt /* 8 1.1 matt * Copyright (c) 2002 Genetec Corporation. All rights reserved. 9 1.1 matt * Written by Hiroyuki Bessho for Genetec Corporation. 10 1.1 matt * 11 1.1 matt * Redistribution and use in source and binary forms, with or without 12 1.1 matt * modification, are permitted provided that the following conditions 13 1.1 matt * are met: 14 1.1 matt * 1. Redistributions of source code must retain the above copyright 15 1.1 matt * notice, this list of conditions and the following disclaimer. 16 1.1 matt * 2. Redistributions in binary form must reproduce the above copyright 17 1.1 matt * notice, this list of conditions and the following disclaimer in the 18 1.1 matt * documentation and/or other materials provided with the distribution. 19 1.1 matt * 3. All advertising materials mentioning features or use of this software 20 1.1 matt * must display the following acknowledgement: 21 1.1 matt * This product includes software developed for the NetBSD Project by 22 1.1 matt * Genetec Corporation. 23 1.1 matt * 4. The name of Genetec Corporation may not be used to endorse or 24 1.1 matt * promote products derived from this software without specific prior 25 1.1 matt * written permission. 26 1.1 matt * 27 1.1 matt * THIS SOFTWARE IS PROVIDED BY GENETEC CORPORATION ``AS IS'' AND 28 1.1 matt * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 1.1 matt * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 1.1 matt * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL GENETEC CORPORATION 31 1.1 matt * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 1.1 matt * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 1.1 matt * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 1.1 matt * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 1.1 matt * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 1.1 matt * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 1.1 matt * POSSIBILITY OF SUCH DAMAGE. 38 1.1 matt */ 39 1.1 matt 40 1.1 matt /* 41 1.1 matt * Bus space tag for 8/16-bit devices on 32-bit bus. 42 1.1 matt * all registers are located at the address of multiple of 4. 43 1.1 matt */ 44 1.1 matt 45 1.1 matt #include <sys/cdefs.h> 46 1.3 ryo __KERNEL_RCSID(0, "$NetBSD: gemini_a4x_space.c,v 1.3 2018/03/16 17:56:31 ryo Exp $"); 47 1.1 matt 48 1.1 matt #include <sys/param.h> 49 1.1 matt #include <sys/systm.h> 50 1.1 matt 51 1.1 matt #include <uvm/uvm_extern.h> 52 1.1 matt 53 1.2 dyoung #include <sys/bus.h> 54 1.1 matt 55 1.1 matt /* Prototypes for all the bus_space structure functions */ 56 1.1 matt bs_protos(gemini); 57 1.1 matt bs_protos(a4x); 58 1.1 matt bs_protos(generic); 59 1.1 matt bs_protos(generic_armv4); 60 1.1 matt bs_protos(bs_notimpl); 61 1.1 matt 62 1.1 matt struct bus_space gemini_a4x_bs_tag = { 63 1.1 matt /* cookie */ 64 1.3 ryo .bs_cookie = (void *) 0, 65 1.1 matt 66 1.1 matt /* mapping/unmapping */ 67 1.3 ryo .bs_map = gemini_bs_map, 68 1.3 ryo .bs_unmap = gemini_bs_unmap, 69 1.3 ryo .bs_subregion = gemini_bs_subregion, 70 1.1 matt 71 1.1 matt /* allocation/deallocation */ 72 1.3 ryo .bs_alloc = gemini_bs_alloc, /* not implemented */ 73 1.3 ryo .bs_free = gemini_bs_free, /* not implemented */ 74 1.1 matt 75 1.1 matt /* get kernel virtual address */ 76 1.3 ryo .bs_vaddr = gemini_bs_vaddr, 77 1.1 matt 78 1.1 matt /* mmap */ 79 1.3 ryo .bs_mmap = bs_notimpl_bs_mmap, 80 1.1 matt 81 1.1 matt /* barrier */ 82 1.3 ryo .bs_barrier = gemini_bs_barrier, 83 1.1 matt 84 1.1 matt /* read (single) */ 85 1.3 ryo .bs_r_1 = a4x_bs_r_1, 86 1.3 ryo .bs_r_2 = a4x_bs_r_2, 87 1.3 ryo .bs_r_4 = a4x_bs_r_4, 88 1.3 ryo .bs_r_8 = bs_notimpl_bs_r_8, 89 1.1 matt 90 1.1 matt /* read multiple */ 91 1.3 ryo .bs_rm_1 = a4x_bs_rm_1, 92 1.3 ryo .bs_rm_2 = a4x_bs_rm_2, 93 1.3 ryo .bs_rm_4 = bs_notimpl_bs_rm_4, 94 1.3 ryo .bs_rm_8 = bs_notimpl_bs_rm_8, 95 1.1 matt 96 1.1 matt /* read region */ 97 1.3 ryo .bs_rr_1 = bs_notimpl_bs_rr_1, 98 1.3 ryo .bs_rr_2 = bs_notimpl_bs_rr_2, 99 1.3 ryo .bs_rr_4 = bs_notimpl_bs_rr_4, 100 1.3 ryo .bs_rr_8 = bs_notimpl_bs_rr_8, 101 1.1 matt 102 1.1 matt /* write (single) */ 103 1.3 ryo .bs_w_1 = a4x_bs_w_1, 104 1.3 ryo .bs_w_2 = a4x_bs_w_2, 105 1.3 ryo .bs_w_4 = a4x_bs_w_4, 106 1.3 ryo .bs_w_8 = bs_notimpl_bs_w_8, 107 1.1 matt 108 1.1 matt /* write multiple */ 109 1.3 ryo .bs_wm_1 = a4x_bs_wm_1, 110 1.3 ryo .bs_wm_2 = a4x_bs_wm_2, 111 1.3 ryo .bs_wm_4 = bs_notimpl_bs_wm_4, 112 1.3 ryo .bs_wm_8 = bs_notimpl_bs_wm_8, 113 1.1 matt 114 1.1 matt /* write region */ 115 1.3 ryo .bs_wr_1 = bs_notimpl_bs_wr_1, 116 1.3 ryo .bs_wr_2 = bs_notimpl_bs_wr_2, 117 1.3 ryo .bs_wr_4 = bs_notimpl_bs_wr_4, 118 1.3 ryo .bs_wr_8 = bs_notimpl_bs_wr_8, 119 1.1 matt 120 1.1 matt /* set multiple */ 121 1.3 ryo .bs_sm_1 = bs_notimpl_bs_sm_1, 122 1.3 ryo .bs_sm_2 = bs_notimpl_bs_sm_2, 123 1.3 ryo .bs_sm_4 = bs_notimpl_bs_sm_4, 124 1.3 ryo .bs_sm_8 = bs_notimpl_bs_sm_8, 125 1.1 matt 126 1.1 matt /* set region */ 127 1.3 ryo .bs_sr_1 = bs_notimpl_bs_sr_1, 128 1.3 ryo .bs_sr_2 = bs_notimpl_bs_sr_2, 129 1.3 ryo .bs_sr_4 = bs_notimpl_bs_sr_4, 130 1.3 ryo .bs_sr_8 = bs_notimpl_bs_sr_8, 131 1.1 matt 132 1.1 matt /* copy */ 133 1.3 ryo .bs_c_1 = bs_notimpl_bs_c_1, 134 1.3 ryo .bs_c_2 = bs_notimpl_bs_c_2, 135 1.3 ryo .bs_c_4 = bs_notimpl_bs_c_4, 136 1.3 ryo .bs_c_8 = bs_notimpl_bs_c_8, 137 1.1 matt }; 138