imx23_apbdma.c revision 1.2.2.4
1 1.2.2.4 yamt /* $Id: imx23_apbdma.c,v 1.2.2.4 2014/05/22 11:39:32 yamt Exp $ */ 2 1.2.2.2 yamt 3 1.2.2.2 yamt /* 4 1.2.2.2 yamt * Copyright (c) 2012 The NetBSD Foundation, Inc. 5 1.2.2.2 yamt * All rights reserved. 6 1.2.2.2 yamt * 7 1.2.2.2 yamt * This code is derived from software contributed to The NetBSD Foundation 8 1.2.2.2 yamt * by Petri Laakso. 9 1.2.2.2 yamt * 10 1.2.2.2 yamt * Redistribution and use in source and binary forms, with or without 11 1.2.2.2 yamt * modification, are permitted provided that the following conditions 12 1.2.2.2 yamt * are met: 13 1.2.2.2 yamt * 1. Redistributions of source code must retain the above copyright 14 1.2.2.2 yamt * notice, this list of conditions and the following disclaimer. 15 1.2.2.2 yamt * 2. Redistributions in binary form must reproduce the above copyright 16 1.2.2.2 yamt * notice, this list of conditions and the following disclaimer in the 17 1.2.2.2 yamt * documentation and/or other materials provided with the distribution. 18 1.2.2.2 yamt * 19 1.2.2.2 yamt * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 1.2.2.2 yamt * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 1.2.2.2 yamt * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 1.2.2.2 yamt * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 1.2.2.2 yamt * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 1.2.2.2 yamt * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 1.2.2.2 yamt * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 1.2.2.2 yamt * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 1.2.2.2 yamt * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 1.2.2.2 yamt * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 1.2.2.2 yamt * POSSIBILITY OF SUCH DAMAGE. 30 1.2.2.2 yamt */ 31 1.2.2.2 yamt 32 1.2.2.2 yamt #include <sys/param.h> 33 1.2.2.4 yamt #include <sys/types.h> 34 1.2.2.2 yamt #include <sys/bus.h> 35 1.2.2.2 yamt #include <sys/device.h> 36 1.2.2.2 yamt #include <sys/errno.h> 37 1.2.2.4 yamt #include <sys/mutex.h> 38 1.2.2.2 yamt #include <sys/kmem.h> 39 1.2.2.2 yamt #include <sys/systm.h> 40 1.2.2.2 yamt 41 1.2.2.4 yamt #include <arm/imx/imx23_apbdma.h> 42 1.2.2.2 yamt #include <arm/imx/imx23_apbdmareg.h> 43 1.2.2.4 yamt #include <arm/imx/imx23_apbdmavar.h> 44 1.2.2.2 yamt #include <arm/imx/imx23_apbhdmareg.h> 45 1.2.2.2 yamt #include <arm/imx/imx23_apbxdmareg.h> 46 1.2.2.2 yamt #include <arm/imx/imx23var.h> 47 1.2.2.2 yamt 48 1.2.2.2 yamt static int apbdma_match(device_t, cfdata_t, void *); 49 1.2.2.2 yamt static void apbdma_attach(device_t, device_t, void *); 50 1.2.2.2 yamt static int apbdma_activate(device_t, enum devact); 51 1.2.2.2 yamt 52 1.2.2.2 yamt CFATTACH_DECL3_NEW(apbdma, 53 1.2.2.2 yamt sizeof(struct apbdma_softc), 54 1.2.2.2 yamt apbdma_match, 55 1.2.2.2 yamt apbdma_attach, 56 1.2.2.2 yamt NULL, 57 1.2.2.2 yamt apbdma_activate, 58 1.2.2.2 yamt NULL, 59 1.2.2.2 yamt NULL, 60 1.2.2.2 yamt 0); 61 1.2.2.2 yamt 62 1.2.2.2 yamt static void apbdma_reset(struct apbdma_softc *); 63 1.2.2.4 yamt static void apbdma_init(struct apbdma_softc *); 64 1.2.2.4 yamt 65 1.2.2.4 yamt #define DMA_RD(sc, reg) \ 66 1.2.2.4 yamt bus_space_read_4(sc->sc_iot, sc->sc_ioh, (reg)) 67 1.2.2.4 yamt #define DMA_WR(sc, reg, val) \ 68 1.2.2.4 yamt bus_space_write_4(sc->sc_iot, sc->sc_ioh, (reg), (val)) 69 1.2.2.4 yamt 70 1.2.2.4 yamt #define APBDMA_SOFT_RST_LOOP 455 /* At least 1 us ... */ 71 1.2.2.2 yamt 72 1.2.2.2 yamt static int 73 1.2.2.2 yamt apbdma_match(device_t parent, cfdata_t match, void *aux) 74 1.2.2.2 yamt { 75 1.2.2.2 yamt struct apb_attach_args *aa = aux; 76 1.2.2.2 yamt 77 1.2.2.2 yamt if (aa->aa_addr == HW_APBHDMA_BASE && aa->aa_size == HW_APBHDMA_SIZE) 78 1.2.2.2 yamt return 1; 79 1.2.2.2 yamt 80 1.2.2.2 yamt if (aa->aa_addr == HW_APBXDMA_BASE && aa->aa_size == HW_APBXDMA_SIZE) 81 1.2.2.2 yamt return 1; 82 1.2.2.2 yamt 83 1.2.2.2 yamt return 0; 84 1.2.2.2 yamt } 85 1.2.2.2 yamt 86 1.2.2.2 yamt static void 87 1.2.2.2 yamt apbdma_attach(device_t parent, device_t self, void *aux) 88 1.2.2.2 yamt { 89 1.2.2.2 yamt struct apb_attach_args *aa = aux; 90 1.2.2.2 yamt struct apbdma_softc *sc = device_private(self); 91 1.2.2.4 yamt struct apb_softc *sc_parent = device_private(parent); 92 1.2.2.4 yamt static u_int apbdma_attached = 0; 93 1.2.2.2 yamt 94 1.2.2.4 yamt if ((strncmp(device_xname(parent), "apbh", 4) == 0) && 95 1.2.2.4 yamt (apbdma_attached & F_AHBH_DMA)) 96 1.2.2.4 yamt return; 97 1.2.2.4 yamt if ((strncmp(device_xname(parent), "apbx", 4) == 0) && 98 1.2.2.4 yamt (apbdma_attached & F_AHBX_DMA)) 99 1.2.2.4 yamt return; 100 1.2.2.2 yamt 101 1.2.2.2 yamt sc->sc_dev = self; 102 1.2.2.2 yamt sc->sc_iot = aa->aa_iot; 103 1.2.2.2 yamt sc->sc_dmat = aa->aa_dmat; 104 1.2.2.2 yamt 105 1.2.2.2 yamt if (bus_space_map(sc->sc_iot, 106 1.2.2.4 yamt aa->aa_addr, aa->aa_size, 0, &sc->sc_ioh)) { 107 1.2.2.2 yamt aprint_error_dev(sc->sc_dev, "unable to map bus space\n"); 108 1.2.2.2 yamt return; 109 1.2.2.2 yamt } 110 1.2.2.2 yamt 111 1.2.2.4 yamt if (strncmp(device_xname(parent), "apbh", 4) == 0) 112 1.2.2.4 yamt sc->flags = F_AHBH_DMA; 113 1.2.2.2 yamt 114 1.2.2.4 yamt if (strncmp(device_xname(parent), "apbx", 4) == 0) 115 1.2.2.4 yamt sc->flags = F_AHBX_DMA; 116 1.2.2.2 yamt 117 1.2.2.2 yamt apbdma_reset(sc); 118 1.2.2.4 yamt apbdma_init(sc); 119 1.2.2.4 yamt 120 1.2.2.4 yamt if (sc->flags & F_AHBH_DMA) 121 1.2.2.4 yamt apbdma_attached |= F_AHBH_DMA; 122 1.2.2.4 yamt if (sc->flags & F_AHBX_DMA) 123 1.2.2.4 yamt apbdma_attached |= F_AHBX_DMA; 124 1.2.2.4 yamt 125 1.2.2.4 yamt sc_parent->dmac = self; 126 1.2.2.4 yamt 127 1.2.2.4 yamt /* Initialize mutex to control concurrent access from the drivers. */ 128 1.2.2.4 yamt mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_HIGH); 129 1.2.2.2 yamt 130 1.2.2.2 yamt aprint_normal("\n"); 131 1.2.2.2 yamt 132 1.2.2.2 yamt return; 133 1.2.2.2 yamt } 134 1.2.2.2 yamt 135 1.2.2.2 yamt static int 136 1.2.2.2 yamt apbdma_activate(device_t self, enum devact act) 137 1.2.2.2 yamt { 138 1.2.2.2 yamt return EOPNOTSUPP; 139 1.2.2.2 yamt } 140 1.2.2.2 yamt 141 1.2.2.2 yamt /* 142 1.2.2.2 yamt * Reset the APB{H,X}DMA block. 143 1.2.2.2 yamt * 144 1.2.2.3 yamt * Inspired by i.MX23 RM "39.3.10 Correct Way to Soft Reset a Block" 145 1.2.2.2 yamt */ 146 1.2.2.2 yamt static void 147 1.2.2.2 yamt apbdma_reset(struct apbdma_softc *sc) 148 1.2.2.2 yamt { 149 1.2.2.2 yamt unsigned int loop; 150 1.2.2.2 yamt 151 1.2.2.2 yamt /* 152 1.2.2.2 yamt * Prepare for soft-reset by making sure that SFTRST is not currently 153 1.2.2.2 yamt * asserted. Also clear CLKGATE so we can wait for its assertion below. 154 1.2.2.2 yamt */ 155 1.2.2.4 yamt DMA_WR(sc, HW_APB_CTRL0_CLR, HW_APB_CTRL0_SFTRST); 156 1.2.2.2 yamt 157 1.2.2.2 yamt /* Wait at least a microsecond for SFTRST to deassert. */ 158 1.2.2.2 yamt loop = 0; 159 1.2.2.4 yamt while ((DMA_RD(sc, HW_APB_CTRL0) & HW_APB_CTRL0_SFTRST) || 160 1.2.2.4 yamt (loop < APBDMA_SOFT_RST_LOOP)) 161 1.2.2.2 yamt loop++; 162 1.2.2.2 yamt 163 1.2.2.2 yamt /* Clear CLKGATE so we can wait for its assertion below. */ 164 1.2.2.4 yamt DMA_WR(sc, HW_APB_CTRL0_CLR, HW_APB_CTRL0_CLKGATE); 165 1.2.2.2 yamt 166 1.2.2.2 yamt /* Soft-reset the block. */ 167 1.2.2.4 yamt DMA_WR(sc, HW_APB_CTRL0_SET, HW_APB_CTRL0_SFTRST); 168 1.2.2.2 yamt 169 1.2.2.2 yamt /* Wait until clock is in the gated state. */ 170 1.2.2.4 yamt while (!(DMA_RD(sc, HW_APB_CTRL0) & HW_APB_CTRL0_CLKGATE)); 171 1.2.2.2 yamt 172 1.2.2.2 yamt /* Bring block out of reset. */ 173 1.2.2.4 yamt DMA_WR(sc, HW_APB_CTRL0_CLR, HW_APB_CTRL0_SFTRST); 174 1.2.2.2 yamt 175 1.2.2.2 yamt loop = 0; 176 1.2.2.4 yamt while ((DMA_RD(sc, HW_APB_CTRL0) & HW_APB_CTRL0_SFTRST) || 177 1.2.2.4 yamt (loop < APBDMA_SOFT_RST_LOOP)) 178 1.2.2.2 yamt loop++; 179 1.2.2.4 yamt 180 1.2.2.4 yamt DMA_WR(sc, HW_APB_CTRL0_CLR, HW_APB_CTRL0_CLKGATE); 181 1.2.2.4 yamt 182 1.2.2.4 yamt /* Wait until clock is in the NON-gated state. */ 183 1.2.2.4 yamt while (DMA_RD(sc, HW_APB_CTRL0) & HW_APB_CTRL0_CLKGATE); 184 1.2.2.4 yamt 185 1.2.2.4 yamt return; 186 1.2.2.4 yamt } 187 1.2.2.4 yamt 188 1.2.2.4 yamt /* 189 1.2.2.4 yamt * Initialize APB{H,X}DMA block. 190 1.2.2.4 yamt */ 191 1.2.2.4 yamt static void 192 1.2.2.4 yamt apbdma_init(struct apbdma_softc *sc) 193 1.2.2.4 yamt { 194 1.2.2.4 yamt 195 1.2.2.4 yamt if (sc->flags & F_AHBH_DMA) { 196 1.2.2.4 yamt DMA_WR(sc, HW_APBH_CTRL0_SET, HW_APBH_CTRL0_AHB_BURST8_EN); 197 1.2.2.4 yamt DMA_WR(sc, HW_APBH_CTRL0_SET, HW_APBH_CTRL0_APB_BURST4_EN); 198 1.2.2.4 yamt } 199 1.2.2.4 yamt return; 200 1.2.2.4 yamt } 201 1.2.2.4 yamt 202 1.2.2.4 yamt /* 203 1.2.2.4 yamt * Chain DMA commands together. 204 1.2.2.4 yamt * 205 1.2.2.4 yamt * Set src->next point to trg's physical DMA mapped address. 206 1.2.2.4 yamt */ 207 1.2.2.4 yamt void 208 1.2.2.4 yamt apbdma_cmd_chain(apbdma_command_t src, apbdma_command_t trg, void *buf, 209 1.2.2.4 yamt bus_dmamap_t dmap) 210 1.2.2.4 yamt { 211 1.2.2.4 yamt int i; 212 1.2.2.4 yamt bus_size_t daddr; 213 1.2.2.4 yamt bus_addr_t trg_offset; 214 1.2.2.4 yamt 215 1.2.2.4 yamt trg_offset = (bus_addr_t)trg - (bus_addr_t)buf; 216 1.2.2.4 yamt daddr = 0; 217 1.2.2.4 yamt 218 1.2.2.4 yamt for (i = 0; i < dmap->dm_nsegs; i++) { 219 1.2.2.4 yamt daddr += dmap->dm_segs[i].ds_len; 220 1.2.2.4 yamt if (trg_offset < daddr) { 221 1.2.2.4 yamt src->next = (void *)(dmap->dm_segs[i].ds_addr + 222 1.2.2.4 yamt (trg_offset - (daddr - dmap->dm_segs[i].ds_len))); 223 1.2.2.4 yamt break; 224 1.2.2.4 yamt } 225 1.2.2.4 yamt } 226 1.2.2.4 yamt 227 1.2.2.4 yamt return; 228 1.2.2.4 yamt } 229 1.2.2.4 yamt 230 1.2.2.4 yamt /* 231 1.2.2.4 yamt * Set DMA command buffer. 232 1.2.2.4 yamt * 233 1.2.2.4 yamt * Set cmd->buffer point to physical DMA address at offset in DMA map. 234 1.2.2.4 yamt */ 235 1.2.2.4 yamt void 236 1.2.2.4 yamt apbdma_cmd_buf(apbdma_command_t cmd, bus_addr_t offset, bus_dmamap_t dmap) 237 1.2.2.4 yamt { 238 1.2.2.4 yamt int i; 239 1.2.2.4 yamt bus_size_t daddr; 240 1.2.2.4 yamt 241 1.2.2.4 yamt daddr = 0; 242 1.2.2.4 yamt 243 1.2.2.4 yamt for (i = 0; i < dmap->dm_nsegs; i++) { 244 1.2.2.4 yamt daddr += dmap->dm_segs[i].ds_len; 245 1.2.2.4 yamt if (offset < daddr) { 246 1.2.2.4 yamt cmd->buffer = (void *)(dmap->dm_segs[i].ds_addr + 247 1.2.2.4 yamt (offset - (daddr - dmap->dm_segs[i].ds_len))); 248 1.2.2.4 yamt break; 249 1.2.2.4 yamt } 250 1.2.2.4 yamt } 251 1.2.2.4 yamt 252 1.2.2.4 yamt return; 253 1.2.2.4 yamt } 254 1.2.2.4 yamt 255 1.2.2.4 yamt /* 256 1.2.2.4 yamt * Initialize DMA channel. 257 1.2.2.4 yamt */ 258 1.2.2.4 yamt void 259 1.2.2.4 yamt apbdma_chan_init(struct apbdma_softc *sc, unsigned int channel) 260 1.2.2.4 yamt { 261 1.2.2.4 yamt 262 1.2.2.4 yamt mutex_enter(&sc->sc_lock); 263 1.2.2.4 yamt 264 1.2.2.4 yamt /* Enable CMDCMPLT_IRQ. */ 265 1.2.2.4 yamt DMA_WR(sc, HW_APB_CTRL1_SET, (1<<channel)<<16); 266 1.2.2.4 yamt 267 1.2.2.4 yamt mutex_exit(&sc->sc_lock); 268 1.2.2.4 yamt 269 1.2.2.4 yamt return; 270 1.2.2.4 yamt } 271 1.2.2.4 yamt 272 1.2.2.4 yamt /* 273 1.2.2.4 yamt * Set command chain for DMA channel. 274 1.2.2.4 yamt */ 275 1.2.2.4 yamt #define HW_APB_CHN_NXTCMDAR(base, channel) (base + (0x70 * channel)) 276 1.2.2.4 yamt void 277 1.2.2.4 yamt apbdma_chan_set_chain(struct apbdma_softc *sc, unsigned int channel, 278 1.2.2.4 yamt bus_dmamap_t dmap) 279 1.2.2.4 yamt { 280 1.2.2.4 yamt uint32_t reg; 281 1.2.2.4 yamt 282 1.2.2.4 yamt if (sc->flags & F_AHBH_DMA) 283 1.2.2.4 yamt reg = HW_APB_CHN_NXTCMDAR(HW_APBH_CH0_NXTCMDAR, channel); 284 1.2.2.4 yamt else 285 1.2.2.4 yamt reg = HW_APB_CHN_NXTCMDAR(HW_APBX_CH0_NXTCMDAR, channel); 286 1.2.2.4 yamt 287 1.2.2.4 yamt mutex_enter(&sc->sc_lock); 288 1.2.2.4 yamt DMA_WR(sc, reg, dmap->dm_segs[0].ds_addr); 289 1.2.2.4 yamt mutex_exit(&sc->sc_lock); 290 1.2.2.4 yamt 291 1.2.2.4 yamt return; 292 1.2.2.4 yamt } 293 1.2.2.4 yamt 294 1.2.2.4 yamt /* 295 1.2.2.4 yamt * Initiate DMA transfer. 296 1.2.2.4 yamt */ 297 1.2.2.4 yamt #define HW_APB_CHN_SEMA(base, channel) (base + (0x70 * channel)) 298 1.2.2.4 yamt void 299 1.2.2.4 yamt apbdma_run(struct apbdma_softc *sc, unsigned int channel) 300 1.2.2.4 yamt { 301 1.2.2.4 yamt uint32_t reg; 302 1.2.2.4 yamt uint8_t val; 303 1.2.2.4 yamt 304 1.2.2.4 yamt if (sc->flags & F_AHBH_DMA) { 305 1.2.2.4 yamt reg = HW_APB_CHN_SEMA(HW_APBH_CH0_SEMA, channel); 306 1.2.2.4 yamt val = __SHIFTIN(1, HW_APBH_CH0_SEMA_INCREMENT_SEMA); 307 1.2.2.4 yamt } else { 308 1.2.2.4 yamt reg = HW_APB_CHN_SEMA(HW_APBX_CH0_SEMA, channel); 309 1.2.2.4 yamt val = __SHIFTIN(1, HW_APBX_CH0_SEMA_INCREMENT_SEMA); 310 1.2.2.2 yamt } 311 1.2.2.2 yamt 312 1.2.2.4 yamt mutex_enter(&sc->sc_lock); 313 1.2.2.4 yamt DMA_WR(sc, reg, val); 314 1.2.2.4 yamt mutex_exit(&sc->sc_lock); 315 1.2.2.2 yamt 316 1.2.2.4 yamt return; 317 1.2.2.2 yamt } 318 1.2.2.2 yamt 319 1.2.2.2 yamt /* 320 1.2.2.4 yamt * Acknowledge command complete IRQ. 321 1.2.2.4 yamt */ 322 1.2.2.4 yamt void 323 1.2.2.4 yamt apbdma_ack_intr(struct apbdma_softc *sc, unsigned int channel) 324 1.2.2.4 yamt { 325 1.2.2.4 yamt 326 1.2.2.4 yamt mutex_enter(&sc->sc_lock); 327 1.2.2.4 yamt DMA_WR(sc, HW_APB_CTRL1_CLR, (1<<channel)); 328 1.2.2.4 yamt mutex_exit(&sc->sc_lock); 329 1.2.2.4 yamt 330 1.2.2.4 yamt return; 331 1.2.2.4 yamt } 332 1.2.2.4 yamt 333 1.2.2.4 yamt /* 334 1.2.2.4 yamt * Acknowledge error IRQ. 335 1.2.2.4 yamt */ 336 1.2.2.4 yamt void 337 1.2.2.4 yamt apbdma_ack_error_intr(struct apbdma_softc *sc, unsigned int channel) 338 1.2.2.4 yamt { 339 1.2.2.4 yamt 340 1.2.2.4 yamt mutex_enter(&sc->sc_lock); 341 1.2.2.4 yamt DMA_WR(sc, HW_APB_CTRL2_CLR, (1<<channel)); 342 1.2.2.4 yamt mutex_exit(&sc->sc_lock); 343 1.2.2.4 yamt 344 1.2.2.4 yamt return; 345 1.2.2.4 yamt } 346 1.2.2.4 yamt 347 1.2.2.4 yamt /* 348 1.2.2.4 yamt * Return reason for the IRQ. 349 1.2.2.4 yamt */ 350 1.2.2.4 yamt unsigned int 351 1.2.2.4 yamt apbdma_intr_status(struct apbdma_softc *sc, unsigned int channel) 352 1.2.2.4 yamt { 353 1.2.2.4 yamt unsigned int reason; 354 1.2.2.4 yamt 355 1.2.2.4 yamt reason = 0; 356 1.2.2.4 yamt 357 1.2.2.4 yamt mutex_enter(&sc->sc_lock); 358 1.2.2.4 yamt 359 1.2.2.4 yamt /* Check if this was command complete IRQ. */ 360 1.2.2.4 yamt if (DMA_RD(sc, HW_APB_CTRL1) & (1<<channel)) 361 1.2.2.4 yamt reason = DMA_IRQ_CMDCMPLT; 362 1.2.2.4 yamt 363 1.2.2.4 yamt /* Check if error was set. */ 364 1.2.2.4 yamt if (DMA_RD(sc, HW_APB_CTRL2) & (1<<channel)) { 365 1.2.2.4 yamt if (DMA_RD(sc, HW_APB_CTRL2) & (1<<channel)<<16) 366 1.2.2.4 yamt reason = DMA_IRQ_BUS_ERROR; 367 1.2.2.4 yamt else 368 1.2.2.4 yamt reason = DMA_IRQ_TERM; 369 1.2.2.4 yamt } 370 1.2.2.4 yamt 371 1.2.2.4 yamt mutex_exit(&sc->sc_lock); 372 1.2.2.4 yamt 373 1.2.2.4 yamt return reason; 374 1.2.2.4 yamt } 375 1.2.2.4 yamt 376 1.2.2.4 yamt /* 377 1.2.2.4 yamt * Reset DMA channel. 378 1.2.2.4 yamt * Use only for devices on APBH bus. 379 1.2.2.4 yamt */ 380 1.2.2.4 yamt void 381 1.2.2.4 yamt apbdma_chan_reset(struct apbdma_softc *sc, unsigned int channel) 382 1.2.2.4 yamt { 383 1.2.2.4 yamt 384 1.2.2.4 yamt mutex_enter(&sc->sc_lock); 385 1.2.2.4 yamt 386 1.2.2.4 yamt DMA_WR(sc, HW_APB_CTRL0_SET, 387 1.2.2.4 yamt __SHIFTIN((1<<channel), HW_APBH_CTRL0_RESET_CHANNEL)); 388 1.2.2.4 yamt while(DMA_RD(sc, HW_APB_CTRL0) & HW_APBH_CTRL0_RESET_CHANNEL); 389 1.2.2.4 yamt 390 1.2.2.4 yamt mutex_exit(&sc->sc_lock); 391 1.2.2.4 yamt 392 1.2.2.4 yamt return; 393 1.2.2.2 yamt } 394
Indexes created Wed Oct 01 15:09:59 GMT 2025