1 1.1 jkunz /* $Id: imx23_timrotreg.h,v 1.1 2012/11/20 19:06:14 jkunz Exp $ */ 2 1.1 jkunz 3 1.1 jkunz /* 4 1.1 jkunz * Copyright (c) 2012 The NetBSD Foundation, Inc. 5 1.1 jkunz * All rights reserved. 6 1.1 jkunz * 7 1.1 jkunz * This code is derived from software contributed to The NetBSD Foundation 8 1.1 jkunz * by Petri Laakso. 9 1.1 jkunz * 10 1.1 jkunz * Redistribution and use in source and binary forms, with or without 11 1.1 jkunz * modification, are permitted provided that the following conditions 12 1.1 jkunz * are met: 13 1.1 jkunz * 1. Redistributions of source code must retain the above copyright 14 1.1 jkunz * notice, this list of conditions and the following disclaimer. 15 1.1 jkunz * 2. Redistributions in binary form must reproduce the above copyright 16 1.1 jkunz * notice, this list of conditions and the following disclaimer in the 17 1.1 jkunz * documentation and/or other materials provided with the distribution. 18 1.1 jkunz * 19 1.1 jkunz * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 1.1 jkunz * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 1.1 jkunz * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 1.1 jkunz * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 1.1 jkunz * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 1.1 jkunz * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 1.1 jkunz * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 1.1 jkunz * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 1.1 jkunz * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 1.1 jkunz * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 1.1 jkunz * POSSIBILITY OF SUCH DAMAGE. 30 1.1 jkunz */ 31 1.1 jkunz 32 1.1 jkunz #ifndef _ARM_IMX_IMX23_TIMROTREG_H_ 33 1.1 jkunz #define _ARM_IMX_IMX23_TIMROTREG_H_ 34 1.1 jkunz 35 1.1 jkunz #include <sys/cdefs.h> 36 1.1 jkunz 37 1.1 jkunz #define HW_TIMROT_BASE 0x80068000 38 1.1 jkunz #define HW_TIMROT_SIZE 0x2000 39 1.1 jkunz 40 1.1 jkunz /* 41 1.1 jkunz * Rotary Decoder Control Register. 42 1.1 jkunz */ 43 1.1 jkunz #define HW_TIMROT_ROTCTRL 0x000 44 1.1 jkunz #define HW_TIMROT_ROTCTRL_SET 0x004 45 1.1 jkunz #define HW_TIMROT_ROTCTRL_CLR 0x008 46 1.1 jkunz #define HW_TIMROT_ROTCTRL_TOG 0x00C 47 1.1 jkunz 48 1.1 jkunz #define HW_TIMROT_ROTCTRL_SFTRST __BIT(31) 49 1.1 jkunz #define HW_TIMROT_ROTCTRL_CLKGATE __BIT(30) 50 1.1 jkunz #define HW_TIMROT_ROTCTRL_ROTARY_PRESENT __BIT(29) 51 1.1 jkunz #define HW_TIMROT_ROTCTRL_TIM3_PRESENT __BIT(28) 52 1.1 jkunz #define HW_TIMROT_ROTCTRL_TIM2_PRESENT __BIT(27) 53 1.1 jkunz #define HW_TIMROT_ROTCTRL_TIM1_PRESENT __BIT(26) 54 1.1 jkunz #define HW_TIMROT_ROTCTRL_TIM0_PRESENT __BIT(25) 55 1.1 jkunz #define HW_TIMROT_ROTCTRL_STATE __BITS(24, 22) 56 1.1 jkunz #define HW_TIMROT_ROTCTRL_DIVIDER __BITS(21, 16) 57 1.1 jkunz #define HW_TIMROT_ROTCTRL_RSRVD3 __BITS(15, 13) 58 1.1 jkunz #define HW_TIMROT_ROTCTRL_RELATIVE __BIT(12) 59 1.1 jkunz #define HW_TIMROT_ROTCTRL_OVERSAMPLE __BITS(11, 10) 60 1.1 jkunz #define HW_TIMROT_ROTCTRL_POLARITY_B __BIT(9) 61 1.1 jkunz #define HW_TIMROT_ROTCTRL_POLARITY_A __BIT(8) 62 1.1 jkunz #define HW_TIMROT_ROTCTRL_RSRVD2 __BIT(7) 63 1.1 jkunz #define HW_TIMROT_ROTCTRL_SELECT_B __BITS(6, 4) 64 1.1 jkunz #define HW_TIMROT_ROTCTRL_RSRVD1 __BIT(3) 65 1.1 jkunz #define HW_TIMROT_ROTCTRL_SELECT_A __BITS(2, 0) 66 1.1 jkunz 67 1.1 jkunz /* 68 1.1 jkunz * Rotary Decoder Up/Down Counter Register. 69 1.1 jkunz */ 70 1.1 jkunz #define HW_TIMROT_ROTCOUNT 0x010 71 1.1 jkunz 72 1.1 jkunz #define HW_TIMROT_ROTCOUNT_RSRVD1 __BITS(31, 16) 73 1.1 jkunz #define HW_TIMROT_ROTCOUNT_UPDOWN __BITS(15, 0) 74 1.1 jkunz 75 1.1 jkunz /* 76 1.1 jkunz * Timer 0 Control and Status Register. 77 1.1 jkunz */ 78 1.1 jkunz #define HW_TIMROT_TIMCTRL0 0x020 79 1.1 jkunz #define HW_TIMROT_TIMCTRL0_SET 0x024 80 1.1 jkunz #define HW_TIMROT_TIMCTRL0_CLR 0x028 81 1.1 jkunz #define HW_TIMROT_TIMCTRL0_TOG 0x02C 82 1.1 jkunz 83 1.1 jkunz #define HW_TIMROT_TIMCTRL0_RSRVD2 __BITS(31, 16) 84 1.1 jkunz #define HW_TIMROT_TIMCTRL0_IRQ __BIT(15) 85 1.1 jkunz #define HW_TIMROT_TIMCTRL0_IRQ_EN __BIT(14) 86 1.1 jkunz #define HW_TIMROT_TIMCTRL0_RSRVD1 __BITS(13, 9) 87 1.1 jkunz #define HW_TIMROT_TIMCTRL0_POLARITY __BIT(8) 88 1.1 jkunz #define HW_TIMROT_TIMCTRL0_UPDATE __BIT(7) 89 1.1 jkunz #define HW_TIMROT_TIMCTRL0_RELOAD __BIT(6) 90 1.1 jkunz #define HW_TIMROT_TIMCTRL0_PRESCALE __BITS(5, 4) 91 1.1 jkunz #define HW_TIMROT_TIMCTRL0_SELECT __BITS(3, 0) 92 1.1 jkunz 93 1.1 jkunz /* 94 1.1 jkunz * Timer 0 Count Register. 95 1.1 jkunz */ 96 1.1 jkunz #define HW_TIMROT_TIMCOUNT0 0x030 97 1.1 jkunz 98 1.1 jkunz #define HW_TIMROT_TIMCOUNT0_RUNNING_COUNT __BITS(31, 16) 99 1.1 jkunz #define HW_TIMROT_TIMCOUNT0_FIXED_COUNT __BITS(15, 0) 100 1.1 jkunz 101 1.1 jkunz /* 102 1.1 jkunz * Timer 1 Control and Status Register. 103 1.1 jkunz */ 104 1.1 jkunz #define HW_TIMROT_TIMCTRL1 0x040 105 1.1 jkunz #define HW_TIMROT_TIMCTRL1_SET 0x044 106 1.1 jkunz #define HW_TIMROT_TIMCTRL1_CLR 0x048 107 1.1 jkunz #define HW_TIMROT_TIMCTRL1_TOG 0x04C 108 1.1 jkunz 109 1.1 jkunz #define HW_TIMROT_TIMCTRL1_RSRVD2 __BITS(31, 16) 110 1.1 jkunz #define HW_TIMROT_TIMCTRL1_IRQ __BIT(15) 111 1.1 jkunz #define HW_TIMROT_TIMCTRL1_IRQ_EN __BIT(14) 112 1.1 jkunz #define HW_TIMROT_TIMCTRL1_RSRVD1 __BITS(13, 9) 113 1.1 jkunz #define HW_TIMROT_TIMCTRL1_POLARITY __BIT(8) 114 1.1 jkunz #define HW_TIMROT_TIMCTRL1_UPDATE __BIT(7) 115 1.1 jkunz #define HW_TIMROT_TIMCTRL1_RELOAD __BIT(6) 116 1.1 jkunz #define HW_TIMROT_TIMCTRL1_PRESCALE __BITS(5, 4) 117 1.1 jkunz #define HW_TIMROT_TIMCTRL1_SELECT __BITS(3, 0) 118 1.1 jkunz 119 1.1 jkunz /* 120 1.1 jkunz * Timer 1 Count Register. 121 1.1 jkunz */ 122 1.1 jkunz #define HW_TIMROT_TIMCOUNT1 0x050 123 1.1 jkunz 124 1.1 jkunz #define HW_TIMROT_TIMCOUNT1_RUNNING_COUNT __BITS(31, 16) 125 1.1 jkunz #define HW_TIMROT_TIMCOUNT1_FIXED_COUNT __BITS(15, 0) 126 1.1 jkunz 127 1.1 jkunz /* 128 1.1 jkunz * Timer 2 Control and Status Register. 129 1.1 jkunz */ 130 1.1 jkunz #define HW_TIMROT_TIMCTRL2 0x060 131 1.1 jkunz #define HW_TIMROT_TIMCTRL2_SET 0x064 132 1.1 jkunz #define HW_TIMROT_TIMCTRL2_CLR 0x068 133 1.1 jkunz #define HW_TIMROT_TIMCTRL2_TOG 0x06C 134 1.1 jkunz 135 1.1 jkunz #define HW_TIMROT_TIMCTRL2_RSRVD2 __BITS(31, 16) 136 1.1 jkunz #define HW_TIMROT_TIMCTRL2_IRQ __BIT(15) 137 1.1 jkunz #define HW_TIMROT_TIMCTRL2_IRQ_EN __BIT(14) 138 1.1 jkunz #define HW_TIMROT_TIMCTRL2_RSRVD1 __BITS(13, 9) 139 1.1 jkunz #define HW_TIMROT_TIMCTRL2_POLARITY __BIT(8) 140 1.1 jkunz #define HW_TIMROT_TIMCTRL2_UPDATE __BIT(7) 141 1.1 jkunz #define HW_TIMROT_TIMCTRL2_RELOAD __BIT(6) 142 1.1 jkunz #define HW_TIMROT_TIMCTRL2_PRESCALE __BITS(5, 4) 143 1.1 jkunz #define HW_TIMROT_TIMCTRL2_SELECT __BIT(3, 0) 144 1.1 jkunz 145 1.1 jkunz /* 146 1.1 jkunz * Timer 2 Count Register. 147 1.1 jkunz */ 148 1.1 jkunz #define HW_TIMROT_TIMCOUNT2 0x070 149 1.1 jkunz 150 1.1 jkunz #define HW_TIMROT_TIMCOUNT2_RUNNING_COUNT __BITS(31, 16) 151 1.1 jkunz #define HW_TIMROT_TIMCOUNT2_FIXED_COUNT __BITS(15, 0) 152 1.1 jkunz 153 1.1 jkunz /* 154 1.1 jkunz * Timer 3 Control and Status Register. 155 1.1 jkunz */ 156 1.1 jkunz #define HW_TIMROT_TIMCTRL3 0x080 157 1.1 jkunz #define HW_TIMROT_TIMCTRL3_SET 0x084 158 1.1 jkunz #define HW_TIMROT_TIMCTRL3_CLR 0x088 159 1.1 jkunz #define HW_TIMROT_TIMCTRL3_TOG 0x08C 160 1.1 jkunz 161 1.1 jkunz #define HW_TIMROT_TIMCTRL3_RSRVD2 __BITS(31, 20) 162 1.1 jkunz #define HW_TIMROT_TIMCTRL3_TEST_SIGNAL __BITS(19, 16) 163 1.1 jkunz #define HW_TIMROT_TIMCTRL3_IRQ __BIT(15) 164 1.1 jkunz #define HW_TIMROT_TIMCTRL3_IRQ_EN __BIT(14) 165 1.1 jkunz #define HW_TIMROT_TIMCTRL3_RSRVD1 __BITS(13, 11) 166 1.1 jkunz #define HW_TIMROT_TIMCTRL3_DUTY_VALID __BIT(10) 167 1.1 jkunz #define HW_TIMROT_TIMCTRL3_DUTY_CYCLE __BIT(9) 168 1.1 jkunz #define HW_TIMROT_TIMCTRL3_POLARITY __BIT(8) 169 1.1 jkunz #define HW_TIMROT_TIMCTRL3_UPDATE __BIT(7) 170 1.1 jkunz #define HW_TIMROT_TIMCTRL3_RELOAD __BIT(6) 171 1.1 jkunz #define HW_TIMROT_TIMCTRL3_PRESCALE __BITS(5, 4) 172 1.1 jkunz #define HW_TIMROT_TIMCTRL3_SELECT __BITS(3, 0) 173 1.1 jkunz 174 1.1 jkunz /* 175 1.1 jkunz * Timer 3 Count Register. 176 1.1 jkunz */ 177 1.1 jkunz #define HW_TIMROT_TIMCOUNT3 0x090 178 1.1 jkunz 179 1.1 jkunz #define HW_TIMROT_TIMCOUNT3_LOW_RUNNING_COUNT __BITS(31, 16) 180 1.1 jkunz #define HW_TIMROT_TIMCOUNT3IHIGH_FIXED_COUNT __BITS(15, 0) 181 1.1 jkunz 182 1.1 jkunz /* 183 1.1 jkunz * TIMROT Version Register. 184 1.1 jkunz */ 185 1.1 jkunz #define HW_TIMROT_VERSION 0x0a0 186 1.1 jkunz 187 1.1 jkunz #define HW_TIMROT_VERSION_MAJOR __BITS(31, 24) 188 1.1 jkunz #define HW_TIMROT_VERSION_MINOR __BITS(23, 16) 189 1.1 jkunz #define HW_TIMROT_VERSION_STEP __BITS(15, 0) 190 1.1 jkunz 191 1.1 jkunz #endif /* !_ARM_IMX_IMX23_TIMROTREG_H_ */ 192