imx31_clock.c revision 1.1.2.2
1 1.1.2.2 uebayasi /* $NetBSD: imx31_clock.c,v 1.1.2.2 2010/11/15 14:38:21 uebayasi Exp $ */ 2 1.1.2.2 uebayasi /* 3 1.1.2.2 uebayasi * Copyright (c) 2009,2010 Genetec corp. All rights reserved. 4 1.1.2.2 uebayasi * Written by Hashimoto Kenichi for Genetec corp. 5 1.1.2.2 uebayasi * 6 1.1.2.2 uebayasi * Redistribution and use in source and binary forms, with or without 7 1.1.2.2 uebayasi * modification, are permitted provided that the following conditions 8 1.1.2.2 uebayasi * are met: 9 1.1.2.2 uebayasi * 1. Redistributions of source code must retain the above copyright 10 1.1.2.2 uebayasi * notice, this list of conditions and the following disclaimer. 11 1.1.2.2 uebayasi * 2. Redistributions in binary form must reproduce the above copyright 12 1.1.2.2 uebayasi * notice, this list of conditions and the following disclaimer in the 13 1.1.2.2 uebayasi * documentation and/or other materials provided with the distribution. 14 1.1.2.2 uebayasi * 15 1.1.2.2 uebayasi * THIS SOFTWARE IS PROVIDED BY GENETEC CORP. ``AS IS'' AND 16 1.1.2.2 uebayasi * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 17 1.1.2.2 uebayasi * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 18 1.1.2.2 uebayasi * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL GENETEC CORP. 19 1.1.2.2 uebayasi * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 20 1.1.2.2 uebayasi * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 21 1.1.2.2 uebayasi * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 22 1.1.2.2 uebayasi * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 23 1.1.2.2 uebayasi * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 24 1.1.2.2 uebayasi * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 25 1.1.2.2 uebayasi * POSSIBILITY OF SUCH DAMAGE. 26 1.1.2.2 uebayasi */ 27 1.1.2.2 uebayasi 28 1.1.2.2 uebayasi #include <sys/param.h> 29 1.1.2.2 uebayasi #include <sys/systm.h> 30 1.1.2.2 uebayasi #include <sys/kernel.h> 31 1.1.2.2 uebayasi #include <sys/evcnt.h> 32 1.1.2.2 uebayasi #include <sys/atomic.h> 33 1.1.2.2 uebayasi #include <sys/time.h> 34 1.1.2.2 uebayasi #include <sys/timetc.h> 35 1.1.2.2 uebayasi 36 1.1.2.2 uebayasi #include <sys/types.h> 37 1.1.2.2 uebayasi #include <sys/device.h> 38 1.1.2.2 uebayasi 39 1.1.2.2 uebayasi #include <machine/intr.h> 40 1.1.2.2 uebayasi #include <machine/bus.h> 41 1.1.2.2 uebayasi 42 1.1.2.2 uebayasi #include <arm/cpu.h> 43 1.1.2.2 uebayasi #include <arm/armreg.h> 44 1.1.2.2 uebayasi #include <arm/cpufunc.h> 45 1.1.2.2 uebayasi 46 1.1.2.2 uebayasi #include <arm/imx/imx31reg.h> 47 1.1.2.2 uebayasi #include <arm/imx/imx31var.h> 48 1.1.2.2 uebayasi #include <arm/imx/imx31_ccmvar.h> 49 1.1.2.2 uebayasi #include <arm/imx/imxclockvar.h> 50 1.1.2.2 uebayasi 51 1.1.2.2 uebayasi static int imxclock_match(device_t, struct cfdata *, void *); 52 1.1.2.2 uebayasi static void imxclock_attach(device_t, device_t, void *); 53 1.1.2.2 uebayasi 54 1.1.2.2 uebayasi struct imxclock_softc *epit1_sc = NULL; 55 1.1.2.2 uebayasi struct imxclock_softc *epit2_sc = NULL; 56 1.1.2.2 uebayasi 57 1.1.2.2 uebayasi CFATTACH_DECL_NEW(imxclock, sizeof(struct imxclock_softc), 58 1.1.2.2 uebayasi imxclock_match, imxclock_attach, NULL, NULL); 59 1.1.2.2 uebayasi 60 1.1.2.2 uebayasi static int 61 1.1.2.2 uebayasi imxclock_match(device_t parent, struct cfdata *match, void *aux) 62 1.1.2.2 uebayasi { 63 1.1.2.2 uebayasi struct aips_attach_args *aipsa = aux; 64 1.1.2.2 uebayasi 65 1.1.2.2 uebayasi if ( (aipsa->aipsa_addr != EPIT1_BASE) && 66 1.1.2.2 uebayasi (aipsa->aipsa_addr != EPIT2_BASE) ) { 67 1.1.2.2 uebayasi return 0; 68 1.1.2.2 uebayasi } 69 1.1.2.2 uebayasi 70 1.1.2.2 uebayasi return 2; 71 1.1.2.2 uebayasi } 72 1.1.2.2 uebayasi 73 1.1.2.2 uebayasi static void 74 1.1.2.2 uebayasi imxclock_attach(device_t parent, device_t self, void *aux) 75 1.1.2.2 uebayasi { 76 1.1.2.2 uebayasi struct imxclock_softc *sc = device_private(self); 77 1.1.2.2 uebayasi struct aips_attach_args *aipsa = aux; 78 1.1.2.2 uebayasi 79 1.1.2.2 uebayasi aprint_normal("\n"); 80 1.1.2.2 uebayasi 81 1.1.2.2 uebayasi sc->sc_dev = self; 82 1.1.2.2 uebayasi sc->sc_iot = aipsa->aipsa_memt; 83 1.1.2.2 uebayasi sc->sc_intr = aipsa->aipsa_intr; 84 1.1.2.2 uebayasi 85 1.1.2.2 uebayasi KASSERT((sc->sc_intr == IRQ_EPIT1) || (sc->sc_intr == IRQ_EPIT2)); 86 1.1.2.2 uebayasi 87 1.1.2.2 uebayasi switch ( aipsa->aipsa_addr ) { 88 1.1.2.2 uebayasi case EPIT1_BASE: 89 1.1.2.2 uebayasi epit1_sc = sc; 90 1.1.2.2 uebayasi break; 91 1.1.2.2 uebayasi case EPIT2_BASE: 92 1.1.2.2 uebayasi epit2_sc = sc; 93 1.1.2.2 uebayasi break; 94 1.1.2.2 uebayasi default: 95 1.1.2.2 uebayasi panic("%s: invalid address %p", self->dv_xname, (void *)aipsa->aipsa_addr); 96 1.1.2.2 uebayasi break; 97 1.1.2.2 uebayasi } 98 1.1.2.2 uebayasi 99 1.1.2.2 uebayasi if (bus_space_map(aipsa->aipsa_memt, aipsa->aipsa_addr, 100 1.1.2.2 uebayasi aipsa->aipsa_size, 0, &sc->sc_ioh)) { 101 1.1.2.2 uebayasi panic("%s: Cannot map registers", device_xname(self)); 102 1.1.2.2 uebayasi } 103 1.1.2.2 uebayasi } 104 1.1.2.2 uebayasi 105 1.1.2.2 uebayasi int 106 1.1.2.2 uebayasi imxclock_get_timerfreq(struct imxclock_softc *sc) 107 1.1.2.2 uebayasi { 108 1.1.2.2 uebayasi struct imx31_clocks clk; 109 1.1.2.2 uebayasi imx31_get_clocks(&clk); 110 1.1.2.2 uebayasi 111 1.1.2.2 uebayasi return clk.ipg_clk; 112 1.1.2.2 uebayasi } 113 1.1.2.2 uebayasi 114 1.1.2.2 uebayasi 115
Indexes created Tue Sep 30 20:09:53 GMT 2025