imx31_clock.c revision 1.2.6.2
1 1.2.6.2 rmind /* $NetBSD: imx31_clock.c,v 1.2.6.2 2011/03/05 20:49:34 rmind Exp $ */ 2 1.2.6.2 rmind /* 3 1.2.6.2 rmind * Copyright (c) 2009,2010 Genetec corp. All rights reserved. 4 1.2.6.2 rmind * Written by Hashimoto Kenichi for Genetec corp. 5 1.2.6.2 rmind * 6 1.2.6.2 rmind * Redistribution and use in source and binary forms, with or without 7 1.2.6.2 rmind * modification, are permitted provided that the following conditions 8 1.2.6.2 rmind * are met: 9 1.2.6.2 rmind * 1. Redistributions of source code must retain the above copyright 10 1.2.6.2 rmind * notice, this list of conditions and the following disclaimer. 11 1.2.6.2 rmind * 2. Redistributions in binary form must reproduce the above copyright 12 1.2.6.2 rmind * notice, this list of conditions and the following disclaimer in the 13 1.2.6.2 rmind * documentation and/or other materials provided with the distribution. 14 1.2.6.2 rmind * 15 1.2.6.2 rmind * THIS SOFTWARE IS PROVIDED BY GENETEC CORP. ``AS IS'' AND 16 1.2.6.2 rmind * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 17 1.2.6.2 rmind * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 18 1.2.6.2 rmind * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL GENETEC CORP. 19 1.2.6.2 rmind * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 20 1.2.6.2 rmind * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 21 1.2.6.2 rmind * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 22 1.2.6.2 rmind * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 23 1.2.6.2 rmind * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 24 1.2.6.2 rmind * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 25 1.2.6.2 rmind * POSSIBILITY OF SUCH DAMAGE. 26 1.2.6.2 rmind */ 27 1.2.6.2 rmind 28 1.2.6.2 rmind #include <sys/param.h> 29 1.2.6.2 rmind #include <sys/systm.h> 30 1.2.6.2 rmind #include <sys/kernel.h> 31 1.2.6.2 rmind #include <sys/evcnt.h> 32 1.2.6.2 rmind #include <sys/atomic.h> 33 1.2.6.2 rmind #include <sys/time.h> 34 1.2.6.2 rmind #include <sys/timetc.h> 35 1.2.6.2 rmind 36 1.2.6.2 rmind #include <sys/types.h> 37 1.2.6.2 rmind #include <sys/device.h> 38 1.2.6.2 rmind 39 1.2.6.2 rmind #include <machine/intr.h> 40 1.2.6.2 rmind #include <machine/bus.h> 41 1.2.6.2 rmind 42 1.2.6.2 rmind #include <arm/cpu.h> 43 1.2.6.2 rmind #include <arm/armreg.h> 44 1.2.6.2 rmind #include <arm/cpufunc.h> 45 1.2.6.2 rmind 46 1.2.6.2 rmind #include <arm/imx/imx31reg.h> 47 1.2.6.2 rmind #include <arm/imx/imx31var.h> 48 1.2.6.2 rmind #if 0 /* notyet */ 49 1.2.6.2 rmind #include <arm/imx/imx31_ccmvar.h> 50 1.2.6.2 rmind #endif 51 1.2.6.2 rmind #include <arm/imx/imxclockvar.h> 52 1.2.6.2 rmind #include <arm/imx/imxepitreg.h> 53 1.2.6.2 rmind 54 1.2.6.2 rmind #include "imxccm.h" /* if CCM driver is configured into the kernel */ 55 1.2.6.2 rmind #include "opt_imx31clk.h" 56 1.2.6.2 rmind 57 1.2.6.2 rmind static int imxclock_match(device_t, struct cfdata *, void *); 58 1.2.6.2 rmind static void imxclock_attach(device_t, device_t, void *); 59 1.2.6.2 rmind 60 1.2.6.2 rmind struct imxclock_softc *epit1_sc = NULL; 61 1.2.6.2 rmind struct imxclock_softc *epit2_sc = NULL; 62 1.2.6.2 rmind 63 1.2.6.2 rmind CFATTACH_DECL_NEW(imxclock, sizeof(struct imxclock_softc), 64 1.2.6.2 rmind imxclock_match, imxclock_attach, NULL, NULL); 65 1.2.6.2 rmind 66 1.2.6.2 rmind static int 67 1.2.6.2 rmind imxclock_match(device_t parent, struct cfdata *match, void *aux) 68 1.2.6.2 rmind { 69 1.2.6.2 rmind struct aips_attach_args *aipsa = aux; 70 1.2.6.2 rmind 71 1.2.6.2 rmind if ( (aipsa->aipsa_addr != EPIT1_BASE) && 72 1.2.6.2 rmind (aipsa->aipsa_addr != EPIT2_BASE) ) { 73 1.2.6.2 rmind return 0; 74 1.2.6.2 rmind } 75 1.2.6.2 rmind 76 1.2.6.2 rmind return 2; 77 1.2.6.2 rmind } 78 1.2.6.2 rmind 79 1.2.6.2 rmind static void 80 1.2.6.2 rmind imxclock_attach(device_t parent, device_t self, void *aux) 81 1.2.6.2 rmind { 82 1.2.6.2 rmind struct imxclock_softc *sc = device_private(self); 83 1.2.6.2 rmind struct aips_attach_args *aipsa = aux; 84 1.2.6.2 rmind 85 1.2.6.2 rmind aprint_normal("\n"); 86 1.2.6.2 rmind 87 1.2.6.2 rmind sc->sc_dev = self; 88 1.2.6.2 rmind sc->sc_iot = aipsa->aipsa_memt; 89 1.2.6.2 rmind sc->sc_intr = aipsa->aipsa_intr; 90 1.2.6.2 rmind 91 1.2.6.2 rmind KASSERT((sc->sc_intr == IRQ_EPIT1) || (sc->sc_intr == IRQ_EPIT2)); 92 1.2.6.2 rmind 93 1.2.6.2 rmind switch ( aipsa->aipsa_addr ) { 94 1.2.6.2 rmind case EPIT1_BASE: 95 1.2.6.2 rmind epit1_sc = sc; 96 1.2.6.2 rmind break; 97 1.2.6.2 rmind case EPIT2_BASE: 98 1.2.6.2 rmind epit2_sc = sc; 99 1.2.6.2 rmind break; 100 1.2.6.2 rmind default: 101 1.2.6.2 rmind panic("%s: invalid address %p", self->dv_xname, (void *)aipsa->aipsa_addr); 102 1.2.6.2 rmind break; 103 1.2.6.2 rmind } 104 1.2.6.2 rmind 105 1.2.6.2 rmind if (bus_space_map(aipsa->aipsa_memt, aipsa->aipsa_addr, 106 1.2.6.2 rmind aipsa->aipsa_size, 0, &sc->sc_ioh)) { 107 1.2.6.2 rmind panic("%s: Cannot map registers", device_xname(self)); 108 1.2.6.2 rmind } 109 1.2.6.2 rmind } 110 1.2.6.2 rmind 111 1.2.6.2 rmind int 112 1.2.6.2 rmind imxclock_get_timerfreq(struct imxclock_softc *sc) 113 1.2.6.2 rmind { 114 1.2.6.2 rmind #if NIMXCCM > 0 115 1.2.6.2 rmind struct imx31_clocks clk; 116 1.2.6.2 rmind imx31_get_clocks(&clk); 117 1.2.6.2 rmind 118 1.2.6.2 rmind return clk.ipg_clk; 119 1.2.6.2 rmind #else 120 1.2.6.2 rmind #ifndef IMX31_IPGCLK_FREQ 121 1.2.6.2 rmind #error IMX31_IPGCLK_FREQ need to be defined. 122 1.2.6.2 rmind #endif 123 1.2.6.2 rmind return IMX31_IPGCLK_FREQ; 124 1.2.6.2 rmind 125 1.2.6.2 rmind #endif 126 1.2.6.2 rmind } 127 1.2.6.2 rmind 128 1.2.6.2 rmind 129
Indexes created Tue Sep 30 20:09:53 GMT 2025