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imx31_intr.h revision 1.2
      1  1.2  matt /*	$NetBSD: imx31_intr.h,v 1.2 2008/04/27 18:58:44 matt Exp $	*/
      2  1.2  matt /*-
      3  1.2  matt  * Copyright (c) 2007 The NetBSD Foundation, Inc.
      4  1.2  matt  * All rights reserved.
      5  1.2  matt  *
      6  1.2  matt  * This code is derived from software contributed to The NetBSD Foundation
      7  1.2  matt  * by Matt Thomas.
      8  1.2  matt  *
      9  1.2  matt  * Redistribution and use in source and binary forms, with or without
     10  1.2  matt  * modification, are permitted provided that the following conditions
     11  1.2  matt  * are met:
     12  1.2  matt  * 1. Redistributions of source code must retain the above copyright
     13  1.2  matt  *    notice, this list of conditions and the following disclaimer.
     14  1.2  matt  * 2. Redistributions in binary form must reproduce the above copyright
     15  1.2  matt  *    notice, this list of conditions and the following disclaimer in the
     16  1.2  matt  *    documentation and/or other materials provided with the distribution.
     17  1.2  matt  * 3. All advertising materials mentioning features or use of this software
     18  1.2  matt  *    must display the following acknowledgement:
     19  1.2  matt  *        This product includes software developed by the NetBSD
     20  1.2  matt  *        Foundation, Inc. and its contributors.
     21  1.2  matt  * 4. Neither the name of The NetBSD Foundation nor the names of its
     22  1.2  matt  *    contributors may be used to endorse or promote products derived
     23  1.2  matt  *    from this software without specific prior written permission.
     24  1.2  matt  *
     25  1.2  matt  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     26  1.2  matt  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     27  1.2  matt  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     28  1.2  matt  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     29  1.2  matt  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     30  1.2  matt  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     31  1.2  matt  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     32  1.2  matt  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     33  1.2  matt  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     34  1.2  matt  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     35  1.2  matt  * POSSIBILITY OF SUCH DAMAGE.
     36  1.2  matt  */
     37  1.2  matt #ifndef _ARM_IMX_IMX31_INTR_H_
     38  1.2  matt #define _ARM_IMX_IMX31_INTR_H_
     39  1.2  matt 
     40  1.2  matt #define	IRQ__RSVD0	0
     41  1.2  matt #define	IRQ__RSVD1	1
     42  1.2  matt #define	IRQ__RSVD2	2
     43  1.2  matt #define	IRQ_I2C3	3	/* I2C 3 */
     44  1.2  matt #define	IRQ_I2C2	4	/* I2C 2 */
     45  1.2  matt #define	IRQ_MPEG4_ENC	5	/* MPEG-4 Encoder */
     46  1.2  matt #define	IRQ_RTIC	6	/* RTIC */
     47  1.2  matt #define	IRQ_FIR		7	/* Fast Infrared */
     48  1.2  matt #define	IRQ_MMSD_HC2	8	/* MultiMedia/Secure Data Host Controller 2 */
     49  1.2  matt #define	IRQ_MMSD_HC1	9	/* MultiMedia/Secure Data Host Controller 1 */
     50  1.2  matt #define	IRQ_I2C1	10	/* i2c 1 */
     51  1.2  matt #define	IRQ_SSI2	11	/* Synchronous Serial Interface 1 */
     52  1.2  matt #define	IRQ_SSI1	12	/* Synchronous Serial Interface 2 */
     53  1.2  matt #define	IRQ_CSPI2	13	/* Configurable Serial Peripheral Intf 2 */
     54  1.2  matt #define	IRQ_CSPI1	14	/* Configurable Serial Peripheral Intf 1 */
     55  1.2  matt #define	IRQ_ATA		15	/* Hard Drive (ATA) Controller */
     56  1.2  matt #define	IRQ_MBX_RS	16	/* Graphics Accelerator */
     57  1.2  matt #define	IRQ_CSPI3	17	/* Configurable Serial Peripheral Intf 3 */
     58  1.2  matt #define	IRQ_UART3	18	/* UART3 (rx,tx,mint) */
     59  1.2  matt #define	IRQ_I2C_ID	19	/* IC identification */
     60  1.2  matt #define	IRQ_SIM1	20	/* Subscriber Identification Module */
     61  1.2  matt #define	IRQ_SIM2	21	/* Subscriber Identification Module */
     62  1.2  matt #define	IRQ_RNGA	22	/* Random Number Generator Accelerator */
     63  1.2  matt #define	IRQ_EVTMON	23	/* event monitor + pmu */
     64  1.2  matt #define	IRQ_KPP		24	/* Keyboard Port Port */
     65  1.2  matt #define	IRQ_RTC		25	/* Real Time Clock */
     66  1.2  matt #define	IRQ_PWM		26	/* Pulse Width Modulator */
     67  1.2  matt #define	IRQ_EPIT2	27	/* Enhanced Periodic Timer 2 */
     68  1.2  matt #define	IRQ_EPIT1	28	/* Enhanced Periodic Timer 1 */
     69  1.2  matt #define	IRQ_GPT		29	/* General Purpose Timer */
     70  1.2  matt #define	IRQ_PWRFAIL	30	/* Power Fail */
     71  1.2  matt #define	IRQ_CCM_DVFS	31	/* Configurable Serial Peripheral Intf 3 */
     72  1.2  matt #define	IRQ_UART2	32	/* UART2 (rx,tx,mint) */
     73  1.2  matt #define	IRQ_NANDFC	33	/* NAND Flash Controller */
     74  1.2  matt #define	IRQ_SDMA	34	/* Smart Direct Memory Access */
     75  1.2  matt #define	IRQ_USB_H1	35	/* USB Host 1 */
     76  1.2  matt #define	IRQ_USB_H2	36	/* USB Host 2 */
     77  1.2  matt #define	IRQ_USB_OTG	37	/* USB OTG */
     78  1.2  matt #define	IRQ__RSVD38	38	/* */
     79  1.2  matt #define	IRQ_MS_HC1	39	/* Memory Stick Host Controller 1 */
     80  1.2  matt #define	IRQ_MS_HC2	40	/* Memory Stick Host Controller 2 */
     81  1.2  matt #define	IRQ_IPU_ERR	41	/* */
     82  1.2  matt #define	IRQ_IPU		42	/* */
     83  1.2  matt #define	IRQ__RSVD43	43	/* */
     84  1.2  matt #define	IRQ__RSVD44	44	/* */
     85  1.2  matt #define	IRQ_UART1	45	/* UART1 (rx,tx,mint) */
     86  1.2  matt #define	IRQ_UART4	46	/* UART4 (rx,tx,mint) */
     87  1.2  matt #define	IRQ_UART5	47	/* UART5 (rx,tx,mint) */
     88  1.2  matt #define	IRQ_ECT		48	/*  */
     89  1.2  matt #define	IRQ_SCC_SCM	49	/* SCM interrupt */
     90  1.2  matt #define	IRQ_SCC_SMN	50	/* SMN interrupt */
     91  1.2  matt #define	IRQ_GPIO2	51	/* General Purpose I/O 2 */
     92  1.2  matt #define	IRQ_GPIO1	52	/* General Purpose I/O 1 */
     93  1.2  matt #define	IRQ_CCM		53	/* Clock Controller */
     94  1.2  matt #define	IRQ_PCMCIA	54	/* PCMCIA Controller 3 */
     95  1.2  matt #define	IRQ_WDOG	55	/* Watchdog Timer */
     96  1.2  matt #define	IRQ_GPIO3	56	/* General Purpose I/O 3 */
     97  1.2  matt #define	IRQ__RSVD57	57
     98  1.2  matt #define	IRQ_EXT_PWRMGT	58	/* External (power managerment) */
     99  1.2  matt #define	IRQ_EXT_TEMP	59	/* External (Temperture) */
    100  1.2  matt #define	IRQ_EXT_SENS2	60	/* External (sensor) */
    101  1.2  matt #define	IRQ_EXT_SENS1	61	/* External (sensor) */
    102  1.2  matt #define	IRQ_EXT_WDOG	62	/* External (WDOG) */
    103  1.2  matt #define	IRQ_EXT_TV	63	/* External (TV) 3 */
    104  1.2  matt 
    105  1.2  matt #ifdef _LOCORE
    106  1.2  matt 
    107  1.2  matt #define	ARM_IRQ_HANDLER	_C_LABEL(imx31_irq_handler)
    108  1.2  matt 
    109  1.2  matt #else
    110  1.2  matt 
    111  1.2  matt #define AVIC_INTR_SOURCE_NAMES \
    112  1.2  matt {	"reserved 0",	"reserved 1",	"reserved 2",	"i2c #3",	\
    113  1.2  matt 	"i2c #2",	"mpeg4 enc",	"rtic",		"fir", 		\
    114  1.2  matt 	"mm/sd hc #2",	"mm/sd hc #1",	"i2c #1",	"ssi #2",	\
    115  1.2  matt 	"ssi #1",	"cspi #2",	"cspi #1",	"ata",		\
    116  1.2  matt 	"mbx rs",	"cspi #3",	"uart #3",	"i2c id",	\
    117  1.2  matt 	"sim #1",	"sim #2",	"rnga",		"evtmon",	\
    118  1.2  matt 	"kpp",		"rtc",		"pwm",		"epit #2",	\
    119  1.2  matt 	"epit #1",	"gpt",		"pwrfail",	"ccm dvfs",	\
    120  1.2  matt 	"uart #2",	"nandfc",	"sdma",		"usb hc #1",	\
    121  1.2  matt 	"usb hc #2",	"usb otg",	"reserved 38",	"ms hc #1",	\
    122  1.2  matt 	"ms hc#2",	"ipu err",	"ipu",		"reserved 43",	\
    123  1.2  matt 	"reserved 44",	"uart #1",	"uart #4",	"uart #5",	\
    124  1.2  matt 	"ect",		"scc scm",	"scc smn",	"gpio #2",	\
    125  1.2  matt 	"gpio #1",	"ccm",		"pcmcia",	"wdog",		\
    126  1.2  matt 	"gpio #3",	"reserved 57",	"ext pwrmgt",	"ext temp",	\
    127  1.2  matt 	"ext sens #2",	"ext sens #1",	"ext wdog",	"ext tv", }
    128  1.2  matt 
    129  1.2  matt #define	PIC_MAXMAXSOURCES	(64+3*32+128)
    130  1.2  matt 
    131  1.2  matt #include <arm/pic/picvar.h>
    132  1.2  matt 
    133  1.2  matt int	_splraise(int);
    134  1.2  matt int	_spllower(int);
    135  1.2  matt void	splx(int);
    136  1.2  matt const char *
    137  1.2  matt 	intr_typename(int);
    138  1.2  matt 
    139  1.2  matt void imx31_irq_handler(void *);
    140  1.2  matt 
    141  1.2  matt #endif /* !_LOCORE */
    142  1.2  matt 
    143  1.2  matt #endif /* _ARM_IMX_IMX31_INTR_H_ */
    144