Home | History | Annotate | Line # | Download | only in imx
imx51_ccmvar.h revision 1.2 
      1  1.2  hkenken /*	$NetBSD: imx51_ccmvar.h,v 1.2 2014/03/22 09:46:33 hkenken Exp $	*/
      2  1.1      bsh /*
      3  1.1      bsh  * Copyright (c) 2012  Genetec Corporation.  All rights reserved.
      4  1.1      bsh  * Written by Hashimoto Kenichi for Genetec Corporation.
      5  1.1      bsh  *
      6  1.1      bsh  * Redistribution and use in source and binary forms, with or without
      7  1.1      bsh  * modification, are permitted provided that the following conditions
      8  1.1      bsh  * are met:
      9  1.1      bsh  * 1. Redistributions of source code must retain the above copyright
     10  1.1      bsh  *    notice, this list of conditions and the following disclaimer.
     11  1.1      bsh  * 2. Redistributions in binary form must reproduce the above copyright
     12  1.1      bsh  *    notice, this list of conditions and the following disclaimer in the
     13  1.1      bsh  *    documentation and/or other materials provided with the distribution.
     14  1.1      bsh  *
     15  1.1      bsh  * THIS SOFTWARE IS PROVIDED BY GENETEC CORPORATION ``AS IS'' AND
     16  1.1      bsh  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     17  1.1      bsh  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     18  1.1      bsh  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL GENETEC CORPORATION
     19  1.1      bsh  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     20  1.1      bsh  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     21  1.1      bsh  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     22  1.1      bsh  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     23  1.1      bsh  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     24  1.1      bsh  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     25  1.1      bsh  * POSSIBILITY OF SUCH DAMAGE.
     26  1.1      bsh  */
     27  1.1      bsh 
     28  1.1      bsh #ifndef	_ARM_IMX_IMX51_CCMVAR_H_
     29  1.1      bsh #define	_ARM_IMX_IMX51_CCMVAR_H_
     30  1.1      bsh 
     31  1.1      bsh enum imx51_clock {
     32  1.1      bsh 	IMX51CLK_FPM,
     33  1.1      bsh 	IMX51CLK_PLL1,
     34  1.1      bsh 	IMX51CLK_PLL2,
     35  1.1      bsh 	IMX51CLK_PLL3,
     36  1.1      bsh 	IMX51CLK_PLL1SW,
     37  1.1      bsh 	IMX51CLK_PLL2SW,
     38  1.1      bsh 	IMX51CLK_PLL3SW,
     39  1.1      bsh 	IMX51CLK_PLL1STEP,
     40  1.1      bsh 	IMX51CLK_LP_APM,
     41  1.1      bsh 	IMX51CLK_ARM_ROOT,
     42  1.1      bsh 	IMX51CLK_MAIN_BUS_CLK_SRC,	/* XXX */
     43  1.1      bsh 	IMX51CLK_MAIN_BUS_CLK,
     44  1.1      bsh 	IMX51CLK_EMI_SLOW_CLK_ROOT,
     45  1.1      bsh 	IMX51CLK_ENFC_CLK_ROOT,
     46  1.1      bsh 	IMX51CLK_AHB_CLK_ROOT,
     47  1.1      bsh 	IMX51CLK_IPG_CLK_ROOT,
     48  1.1      bsh 	IMX51CLK_PERCLK_ROOT,
     49  1.1      bsh 	IMX51CLK_DDR_CLK_ROOT,
     50  1.1      bsh 	IMX51CLK_ARM_AXI_CLK_ROOT,
     51  1.1      bsh 	IMX51CLK_ARM_AXI_A_CLK,
     52  1.1      bsh 	IMX51CLK_ARM_AXI_B_CLK,
     53  1.1      bsh 	IMX51CLK_IPU_HSP_CLK_ROOT,
     54  1.1      bsh 	IMX51CLK_CKIL_SYNC_CLK_ROOT,
     55  1.1      bsh 	IMX51CLK_USBOH3_CLK_ROOT,
     56  1.1      bsh 	IMX51CLK_ESDHC1_CLK_ROOT,
     57  1.1      bsh 	IMX51CLK_ESDHC2_CLK_ROOT,
     58  1.1      bsh 	IMX51CLK_ESDHC3_CLK_ROOT,
     59  1.2  hkenken 	IMX51CLK_ESDHC4_CLK_ROOT,
     60  1.1      bsh 	IMX51CLK_UART_CLK_ROOT,
     61  1.1      bsh 	IMX51CLK_SSI1_CLK_ROOT,
     62  1.1      bsh 	IMX51CLK_SSI2_CLK_ROOT,
     63  1.1      bsh 	IMX51CLK_SSI_EXT1_CLK_ROOT,
     64  1.1      bsh 	IMX51CLK_SSI_EXT2_CLK_ROOT,
     65  1.1      bsh 	IMX51CLK_USB_PHY_CLK_ROOT,
     66  1.1      bsh 	IMX51CLK_TVE_216_54_CLK_ROOT,
     67  1.1      bsh 	IMX51CLK_DI_CLK_ROOT,
     68  1.1      bsh 	IMX51CLK_SPDIF0_CLK_ROOT,
     69  1.1      bsh 	IMX51CLK_SPDIF1_CLK_ROOT,
     70  1.1      bsh 	IMX51CLK_CSPI_CLK_ROOT,
     71  1.1      bsh 	IMX51CLK_WRCK_CLK_ROOT,
     72  1.1      bsh 	IMX51CLK_LPSR_CLK_ROOT,
     73  1.1      bsh 	IMX51CLK_PGC_CLK_ROOT
     74  1.1      bsh };
     75  1.1      bsh 
     76  1.1      bsh u_int imx51_get_clock(enum imx51_clock);
     77  1.1      bsh void imx51_clk_gating(int, int);
     78  1.1      bsh 
     79  1.1      bsh #endif	/* _ARM_IMX_IMX51_CCMVAR_H_ */
     80