1 1.5 hkenken /* $NetBSD: imx51_clock.c,v 1.5 2014/07/25 07:49:56 hkenken Exp $ */ 2 1.1 bsh /* 3 1.1 bsh * Copyright (c) 2009 Genetec corp. All rights reserved. 4 1.1 bsh * Written by Hashimoto Kenichi for Genetec corp. 5 1.1 bsh * 6 1.1 bsh * Redistribution and use in source and binary forms, with or without 7 1.1 bsh * modification, are permitted provided that the following conditions 8 1.1 bsh * are met: 9 1.1 bsh * 1. Redistributions of source code must retain the above copyright 10 1.1 bsh * notice, this list of conditions and the following disclaimer. 11 1.1 bsh * 2. Redistributions in binary form must reproduce the above copyright 12 1.1 bsh * notice, this list of conditions and the following disclaimer in the 13 1.1 bsh * documentation and/or other materials provided with the distribution. 14 1.1 bsh * 15 1.1 bsh * THIS SOFTWARE IS PROVIDED BY GENETEC CORP. ``AS IS'' AND 16 1.1 bsh * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 17 1.1 bsh * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 18 1.1 bsh * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL GENETEC CORP. 19 1.1 bsh * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 20 1.1 bsh * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 21 1.1 bsh * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 22 1.1 bsh * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 23 1.1 bsh * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 24 1.1 bsh * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 25 1.1 bsh * POSSIBILITY OF SUCH DAMAGE. 26 1.1 bsh */ 27 1.1 bsh #include <sys/cdefs.h> 28 1.5 hkenken __KERNEL_RCSID(0, "$NetBSD: imx51_clock.c,v 1.5 2014/07/25 07:49:56 hkenken Exp $"); 29 1.5 hkenken 30 1.5 hkenken #include "opt_imx.h" 31 1.5 hkenken #include "opt_imx51clk.h" 32 1.1 bsh 33 1.1 bsh #include <sys/param.h> 34 1.1 bsh #include <sys/systm.h> 35 1.1 bsh #include <sys/kernel.h> 36 1.1 bsh #include <sys/evcnt.h> 37 1.1 bsh #include <sys/atomic.h> 38 1.1 bsh #include <sys/time.h> 39 1.1 bsh #include <sys/timetc.h> 40 1.1 bsh 41 1.1 bsh #include <sys/types.h> 42 1.1 bsh #include <sys/device.h> 43 1.1 bsh 44 1.1 bsh #include <dev/clock_subr.h> 45 1.1 bsh 46 1.1 bsh #include <machine/intr.h> 47 1.2 dyoung #include <sys/bus.h> 48 1.1 bsh 49 1.1 bsh #include <arm/cpufunc.h> 50 1.1 bsh 51 1.1 bsh #include <arm/imx/imx51reg.h> 52 1.1 bsh #include <arm/imx/imx51var.h> 53 1.1 bsh #include <arm/imx/imxepitreg.h> 54 1.3 bsh #include <arm/imx/imx51_ccmvar.h> 55 1.1 bsh #include <arm/imx/imxclockvar.h> 56 1.1 bsh 57 1.1 bsh #include "imxccm.h" /* if CCM driver is configured into the kernel */ 58 1.1 bsh 59 1.1 bsh 60 1.1 bsh 61 1.1 bsh static int imxclock_match(device_t, struct cfdata *, void *); 62 1.1 bsh static void imxclock_attach(device_t, device_t, void *); 63 1.1 bsh 64 1.1 bsh struct imxclock_softc *epit1_sc = NULL; 65 1.1 bsh struct imxclock_softc *epit2_sc = NULL; 66 1.1 bsh 67 1.1 bsh CFATTACH_DECL_NEW(imxclock, sizeof(struct imxclock_softc), 68 1.1 bsh imxclock_match, imxclock_attach, NULL, NULL); 69 1.1 bsh 70 1.1 bsh static int 71 1.1 bsh imxclock_match(device_t parent, struct cfdata *match, void *aux) 72 1.1 bsh { 73 1.1 bsh struct axi_attach_args *aa = aux; 74 1.1 bsh 75 1.1 bsh if ( (aa->aa_addr != EPIT1_BASE) && 76 1.1 bsh (aa->aa_addr != EPIT2_BASE) ) { 77 1.1 bsh return 0; 78 1.1 bsh } 79 1.1 bsh 80 1.1 bsh return 2; 81 1.1 bsh } 82 1.1 bsh 83 1.1 bsh static void 84 1.1 bsh imxclock_attach(device_t parent, device_t self, void *aux) 85 1.1 bsh { 86 1.1 bsh struct imxclock_softc *sc = device_private(self); 87 1.1 bsh struct axi_attach_args *aa = aux; 88 1.1 bsh 89 1.1 bsh aprint_normal("\n"); 90 1.1 bsh 91 1.1 bsh sc->sc_dev = self; 92 1.1 bsh sc->sc_iot = aa->aa_iot; 93 1.1 bsh sc->sc_intr = aa->aa_irq; 94 1.1 bsh 95 1.1 bsh switch ( aa->aa_addr ) { 96 1.1 bsh case EPIT1_BASE: 97 1.1 bsh epit1_sc = sc; 98 1.1 bsh break; 99 1.1 bsh case EPIT2_BASE: 100 1.1 bsh epit2_sc = sc; 101 1.1 bsh break; 102 1.1 bsh default: 103 1.4 chs panic("%s: invalid address %p", device_xname(self), (void *)aa->aa_addr); 104 1.1 bsh break; 105 1.1 bsh } 106 1.1 bsh 107 1.1 bsh if (bus_space_map(aa->aa_iot, aa->aa_addr, aa->aa_size, 0, &sc->sc_ioh)) 108 1.1 bsh panic("%s: Cannot map registers", device_xname(self)); 109 1.3 bsh 110 1.3 bsh sc->sc_clksrc = EPITCR_CLKSRC_IPG; 111 1.1 bsh } 112 1.1 bsh 113 1.1 bsh int 114 1.1 bsh imxclock_get_timerfreq(struct imxclock_softc *sc) 115 1.1 bsh { 116 1.1 bsh unsigned int ipg_freq; 117 1.1 bsh #if NIMXCCM > 0 118 1.3 bsh ipg_freq = imx51_get_clock(IMX51CLK_IPG_CLK_ROOT); 119 1.1 bsh #else 120 1.1 bsh #ifndef IMX51_IPGCLK_FREQ 121 1.1 bsh #error IMX51_IPGCLK_FREQ need to be defined. 122 1.1 bsh #endif 123 1.1 bsh ipg_freq = IMX51_IPGCLK_FREQ; 124 1.1 bsh #endif 125 1.1 bsh 126 1.1 bsh return ipg_freq; 127 1.1 bsh } 128 1.1 bsh 129