1 1.2 hkenken /* $NetBSD: imx51_dpllreg.h,v 1.2 2014/07/25 07:49:56 hkenken Exp $ */ 2 1.1 bsh /* 3 1.1 bsh * Copyright (c) 2012 Genetec Corporation. All rights reserved. 4 1.1 bsh * Written by Hashimoto Kenichi for Genetec Corporation. 5 1.1 bsh * 6 1.1 bsh * Redistribution and use in source and binary forms, with or without 7 1.1 bsh * modification, are permitted provided that the following conditions 8 1.1 bsh * are met: 9 1.1 bsh * 1. Redistributions of source code must retain the above copyright 10 1.1 bsh * notice, this list of conditions and the following disclaimer. 11 1.1 bsh * 2. Redistributions in binary form must reproduce the above copyright 12 1.1 bsh * notice, this list of conditions and the following disclaimer in the 13 1.1 bsh * documentation and/or other materials provided with the distribution. 14 1.1 bsh * 15 1.1 bsh * THIS SOFTWARE IS PROVIDED BY GENETEC CORPORATION ``AS IS'' AND 16 1.1 bsh * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 17 1.1 bsh * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 18 1.1 bsh * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL GENETEC CORPORATION 19 1.1 bsh * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 20 1.1 bsh * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 21 1.1 bsh * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 22 1.1 bsh * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 23 1.1 bsh * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 24 1.1 bsh * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 25 1.1 bsh * POSSIBILITY OF SUCH DAMAGE. 26 1.1 bsh */ 27 1.1 bsh #ifndef _IMX51_DPLLREG_H 28 1.1 bsh #define _IMX51_DPLLREG_H 29 1.1 bsh 30 1.1 bsh #include <sys/cdefs.h> 31 1.1 bsh 32 1.1 bsh /* register offset address */ 33 1.1 bsh 34 1.1 bsh #define IMX51_N_DPLLS 3 /* 1..3 */ 35 1.1 bsh 36 1.1 bsh #define DPLL_DP_CTL 0x0000 37 1.1 bsh #define DP_CTL_HFSM __BIT(7) 38 1.2 hkenken #define DP_CTL_REF_CLK_SEL __BITS(8,9) 39 1.2 hkenken #define DP_CTL_REF_CLK_SEL_COSC __SHIFTIN(0x2, DP_CTL_REF_CLK_SEL) 40 1.2 hkenken #define DP_CTL_REF_CLK_SEL_FPM __SHIFTIN(0x3, DP_CTL_REF_CLK_SEL) 41 1.1 bsh #define DP_CTL_REF_CLK_DIV __BIT(10) 42 1.1 bsh #define DP_CTL_DPDCK0_2_EN __BIT(12) 43 1.1 bsh #define DPLL_DP_CONFIG 0x0004 44 1.1 bsh #define DPLL_DP_OP 0x0008 45 1.2 hkenken #define DP_OP_PDF __BITS(3, 0) 46 1.2 hkenken #define DP_OP_MFI __BITS(7, 4) 47 1.1 bsh #define DPLL_DP_MFD 0x000C 48 1.1 bsh #define DPLL_DP_MFN 0x0010 49 1.1 bsh #define DPLL_DP_MFNMINUS 0x0014 50 1.1 bsh #define DPLL_DP_MFNPLUS 0x0018 51 1.1 bsh #define DPLL_DP_HFS_OP 0x001C 52 1.1 bsh #define DPLL_DP_HFS_MFD 0x0020 53 1.1 bsh #define DPLL_DP_HFS_MFN 0x0024 54 1.1 bsh #define DPLL_DP_TOGC 0x0028 55 1.1 bsh #define DPLL_DP_DESTAT 0x002C 56 1.1 bsh 57 1.1 bsh #endif /* _IMX51_DPLLREG_H */ 58