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imxpcievar.h revision 1.2 
      1 /*	$NetBSD: imxpcievar.h,v 1.2 2019/09/02 01:28:41 hkenken Exp $	*/
      2 
      3 /*
      4  * Copyright (c) 2019  Genetec Corporation.  All rights reserved.
      5  * Written by Hashimoto Kenichi for Genetec Corporation.
      6  *
      7  * Redistribution and use in source and binary forms, with or without
      8  * modification, are permitted provided that the following conditions
      9  * are met:
     10  * 1. Redistributions of source code must retain the above copyright
     11  *    notice, this list of conditions and the following disclaimer.
     12  * 2. Redistributions in binary form must reproduce the above copyright
     13  *    notice, this list of conditions and the following disclaimer in the
     14  *    documentation and/or other materials provided with the distribution.
     15  *
     16  * THIS SOFTWARE IS PROVIDED BY GENETEC CORPORATION ``AS IS'' AND
     17  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     18  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     19  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL GENETEC CORPORATION
     20  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     21  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     22  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     23  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     24  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     25  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     26  * POSSIBILITY OF SUCH DAMAGE.
     27  */
     28 
     29 #ifndef	_ARM_IMX_IMXPCIEVAR_H_
     30 #define	_ARM_IMX_IMXPCIEVAR_H_
     31 
     32 struct imxpcie_ih;
     33 
     34 struct imxpcie_softc {
     35 	device_t sc_dev;
     36 
     37 	bus_space_tag_t sc_iot;
     38 	bus_space_handle_t sc_ioh;
     39 	bus_space_handle_t sc_root_ioh;
     40 	bus_space_handle_t sc_gpr_ioh;
     41 	bus_dma_tag_t sc_dmat;
     42 
     43 	paddr_t sc_root_addr;
     44 	size_t sc_root_size;
     45 
     46 	struct arm32_pci_chipset sc_pc;
     47 
     48 	TAILQ_HEAD(, imxpcie_ih) sc_intrs;
     49 
     50 	void *sc_ih;
     51 	kmutex_t sc_lock;
     52 	u_int sc_intrgen;
     53 
     54 	struct clk *sc_clk_pcie_axi;
     55 	struct clk *sc_clk_lvds1_gate;
     56 	struct clk *sc_clk_pcie_ref;
     57 	struct clk *sc_clk_pcie_ext;
     58 	struct clk *sc_clk_pcie_ext_src;
     59 	bool sc_ext_osc;
     60 
     61 	void *sc_cookie;
     62 	void (* sc_pci_netbsd_configure)(void *);
     63 	uint32_t (* sc_gpr_read)(void *, uint32_t);
     64 	void (* sc_gpr_write)(void *, uint32_t, uint32_t);
     65 	void (* sc_reset)(void *);
     66 
     67 	bool sc_have_sw_reset;
     68 };
     69 
     70 struct imxpcie_ih {
     71 	int (*ih_handler)(void *);
     72 	void *ih_arg;
     73 	int ih_ipl;
     74 	TAILQ_ENTRY(imxpcie_ih) ih_entry;
     75 };
     76 
     77 int imxpcie_intr(void *);
     78 void imxpcie_attach_common(struct imxpcie_softc *);
     79 
     80 #endif	/* _ARM_IMX_IMXPCIEVAR_H_ */
     81