imxpwm.c revision 1.1.10.2
1 1.1.10.2 tls /* $NetBSD: imxpwm.c,v 1.1.10.2 2014/08/20 00:02:46 tls Exp $ */ 2 1.1.10.2 tls 3 1.1.10.2 tls /* 4 1.1.10.2 tls * Copyright (c) 2014 Genetec Corporation. All rights reserved. 5 1.1.10.2 tls * Written by Hashimoto Kenichi for Genetec Corporation. 6 1.1.10.2 tls * 7 1.1.10.2 tls * Redistribution and use in source and binary forms, with or without 8 1.1.10.2 tls * modification, are permitted provided that the following conditions 9 1.1.10.2 tls * are met: 10 1.1.10.2 tls * 1. Redistributions of source code must retain the above copyright 11 1.1.10.2 tls * notice, this list of conditions and the following disclaimer. 12 1.1.10.2 tls * 2. Redistributions in binary form must reproduce the above copyright 13 1.1.10.2 tls * notice, this list of conditions and the following disclaimer in the 14 1.1.10.2 tls * documentation and/or other materials provided with the distribution. 15 1.1.10.2 tls * 16 1.1.10.2 tls * THIS SOFTWARE IS PROVIDED BY GENETEC CORPORATION ``AS IS'' AND 17 1.1.10.2 tls * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 18 1.1.10.2 tls * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 19 1.1.10.2 tls * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL GENETEC CORPORATION 20 1.1.10.2 tls * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 21 1.1.10.2 tls * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 22 1.1.10.2 tls * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 23 1.1.10.2 tls * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 24 1.1.10.2 tls * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 25 1.1.10.2 tls * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 26 1.1.10.2 tls * POSSIBILITY OF SUCH DAMAGE. 27 1.1.10.2 tls */ 28 1.1.10.2 tls 29 1.1.10.2 tls #include <sys/cdefs.h> 30 1.1.10.2 tls __KERNEL_RCSID(0, "$NetBSD: imxpwm.c,v 1.1.10.2 2014/08/20 00:02:46 tls Exp $"); 31 1.1.10.2 tls 32 1.1.10.2 tls #include "opt_imx.h" 33 1.1.10.2 tls #include "locators.h" 34 1.1.10.2 tls 35 1.1.10.2 tls #include <sys/types.h> 36 1.1.10.2 tls #include <sys/param.h> 37 1.1.10.2 tls #include <sys/bus.h> 38 1.1.10.2 tls #include <sys/device.h> 39 1.1.10.2 tls 40 1.1.10.2 tls #include <arm/imx/imxpwmreg.h> 41 1.1.10.2 tls #include <arm/imx/imxpwmvar.h> 42 1.1.10.2 tls 43 1.1.10.2 tls static inline uint32_t 44 1.1.10.2 tls imxpwm_read(struct imxpwm_softc *sc, bus_size_t o) 45 1.1.10.2 tls { 46 1.1.10.2 tls return bus_space_read_4(sc->sc_iot, sc->sc_ioh, o); 47 1.1.10.2 tls } 48 1.1.10.2 tls 49 1.1.10.2 tls static inline void 50 1.1.10.2 tls imxpwm_write(struct imxpwm_softc *sc, bus_size_t o, uint32_t v) 51 1.1.10.2 tls { 52 1.1.10.2 tls bus_space_write_4(sc->sc_iot, sc->sc_ioh, o, v); 53 1.1.10.2 tls } 54 1.1.10.2 tls 55 1.1.10.2 tls static int 56 1.1.10.2 tls imxpwm_intr(void *arg) 57 1.1.10.2 tls { 58 1.1.10.2 tls struct imxpwm_softc *sc = arg; 59 1.1.10.2 tls uint32_t sts = imxpwm_read(sc, PWM_SR); 60 1.1.10.2 tls 61 1.1.10.2 tls imxpwm_write(sc, PWM_SR, sts); 62 1.1.10.2 tls 63 1.1.10.2 tls if ((sts & SR_ROV) && (sc->sc_handler != NULL)) 64 1.1.10.2 tls sc->sc_handler(sc->sc_cookie); 65 1.1.10.2 tls 66 1.1.10.2 tls return 1; 67 1.1.10.2 tls } 68 1.1.10.2 tls 69 1.1.10.2 tls void 70 1.1.10.2 tls imxpwm_attach_common(struct imxpwm_softc *sc) 71 1.1.10.2 tls { 72 1.1.10.2 tls uint32_t reg; 73 1.1.10.2 tls int div; 74 1.1.10.2 tls 75 1.1.10.2 tls if (sc->sc_handler != NULL) { 76 1.1.10.2 tls sc->sc_ih = intr_establish(sc->sc_intr, IPL_BIO, IST_LEVEL, 77 1.1.10.2 tls imxpwm_intr, sc); 78 1.1.10.2 tls 79 1.1.10.2 tls reg = IR_RIE; 80 1.1.10.2 tls imxpwm_write(sc, PWM_IR, reg); 81 1.1.10.2 tls } 82 1.1.10.2 tls 83 1.1.10.2 tls if (sc->sc_hz <= 0) 84 1.1.10.2 tls sc->sc_hz = IMXPWM_DEFAULT_HZ; 85 1.1.10.2 tls div = 0; 86 1.1.10.2 tls do { 87 1.1.10.2 tls div++; 88 1.1.10.2 tls sc->sc_cycle = sc->sc_freq / div / sc->sc_hz; 89 1.1.10.2 tls } while (sc->sc_cycle > 0xffff); 90 1.1.10.2 tls 91 1.1.10.2 tls imxpwm_write(sc, PWM_PR, __SHIFTIN(sc->sc_cycle - 2, PR_PERIOD)); 92 1.1.10.2 tls 93 1.1.10.2 tls reg = 0; 94 1.1.10.2 tls reg |= __SHIFTIN(CLKSRC_IPG_CLK, CR_CLKSRC); 95 1.1.10.2 tls reg |= __SHIFTIN(div - 1, CR_PRESCALER); 96 1.1.10.2 tls reg |= CR_EN; 97 1.1.10.2 tls imxpwm_write(sc, PWM_CR, reg); 98 1.1.10.2 tls } 99 1.1.10.2 tls 100 1.1.10.2 tls int 101 1.1.10.2 tls imxpwm_set_pwm(struct imxpwm_softc *sc, int duty) 102 1.1.10.2 tls { 103 1.1.10.2 tls if (duty < 0 || IMXPWM_DUTY_MAX < duty) 104 1.1.10.2 tls return EINVAL; 105 1.1.10.2 tls 106 1.1.10.2 tls sc->sc_duty = duty; 107 1.1.10.2 tls 108 1.1.10.2 tls uint16_t reg = sc->sc_cycle * sc->sc_duty / IMXPWM_DUTY_MAX; 109 1.1.10.2 tls if (reg != 0) 110 1.1.10.2 tls reg -= 1; 111 1.1.10.2 tls imxpwm_write(sc, PWM_SAR, __SHIFTIN(reg, SAR_SAMPLE)); 112 1.1.10.2 tls 113 1.1.10.2 tls return 0; 114 1.1.10.2 tls } 115
Indexes created Wed Oct 15 16:09:53 GMT 2025