imxuart.c revision 1.2.4.1 1 1.2.4.1 simonb /* $Id: imxuart.c,v 1.2.4.1 2008/07/03 18:37:52 simonb Exp $ */
2 1.2 matt #include <sys/types.h>
3 1.2 matt #include <sys/systm.h>
4 1.2 matt #include <sys/device.h>
5 1.2 matt #include <sys/conf.h>
6 1.2 matt
7 1.2 matt #include <arm/armreg.h>
8 1.2 matt
9 1.2 matt #include <sys/tty.h>
10 1.2 matt #include <sys/termios.h>
11 1.2 matt #include <dev/cons.h>
12 1.2 matt
13 1.2 matt #include <machine/bus.h>
14 1.2 matt #include <arm/imx/imx31var.h>
15 1.2 matt #include <arm/imx/imxuartreg.h>
16 1.2 matt #include <arm/imx/imxuartvar.h>
17 1.2 matt #include <evbarm/imx31/imx31lk_reg.h>
18 1.2 matt
19 1.2 matt #define IMXUART_UNIT_MASK 0x7ffff
20 1.2 matt #define IMXUART_DIALOUT_MASK 0x80000
21 1.2 matt
22 1.2 matt #define IMXUART_UNIT(dev) (minor(dev) & IMXUART_UNIT_MASK)
23 1.2 matt #define IMXUART_DIALOUT(dev) (minor(dev) & IMXUART_DIALOUT_MASK)
24 1.2 matt
25 1.2 matt
26 1.2 matt
27 1.2.4.1 simonb #define __TRACE imxuart_puts(&imxuart_softc, __func__ )
28 1.2 matt
29 1.2 matt extern struct bus_space imx31_bs_tag;
30 1.2 matt
31 1.2 matt imxuart_softc_t imxuart_softc = { { 0, }, };
32 1.2 matt
33 1.2 matt uint32_t imxuart_snapshot_data[32];
34 1.2 matt const char *imxuart_test_string =
35 1.2 matt "0123456789012345678901234567890123456789\r\n";
36 1.2 matt
37 1.2 matt
38 1.2 matt cons_decl(imxuart);
39 1.2 matt static struct consdev imxuartcntab = cons_init(imxuart);
40 1.2 matt
41 1.2 matt #ifdef NOTYET
42 1.2 matt dev_type_open(imxuartopen);
43 1.2 matt dev_type_close(imxuartclose);
44 1.2 matt dev_type_read(imxuartread);
45 1.2 matt dev_type_write(imxuartwrite);
46 1.2 matt dev_type_ioctl(imxuartioctl);
47 1.2 matt dev_type_stop(imxuartstop);
48 1.2 matt dev_type_tty(imxuarttty);
49 1.2 matt dev_type_poll(imxuartpoll);
50 1.2 matt const struct cdevsw imxuart_cdevsw = {
51 1.2 matt imxuartopen, imxuartclose, imxuartread, imxuartwrite,
52 1.2 matt imxuartioctl, imxuartstop, imxuarttty, imxuartpoll,
53 1.2 matt nommap, ttykqfilter, D_TTY
54 1.2 matt };
55 1.2 matt #else
56 1.2 matt const struct cdevsw imxuart_cdevsw = {
57 1.2 matt nullopen, nullclose, nullread, nullwrite,
58 1.2 matt nullioctl, nullstop, notty, nullpoll,
59 1.2 matt nommap, nullkqfilter, D_TTY
60 1.2 matt };
61 1.2 matt #endif
62 1.2 matt
63 1.2 matt
64 1.2 matt int imxuart_cnattach(bus_space_tag_t, bus_addr_t, int, int, int, tcflag_t);
65 1.2 matt int imxuart_puts(imxuart_softc_t *, const char *);
66 1.2 matt int imxuart_putchar(imxuart_softc_t *, int);
67 1.2 matt int imxuart_getchar(imxuart_softc_t *);
68 1.2 matt
69 1.2 matt static int imxuart_urxd_brk(void);
70 1.2 matt static void imxuart_urxd_err(imxuart_softc_t *, uint32_t);
71 1.2 matt
72 1.2 matt static int imxuart_match(struct device *, struct cfdata *, void *);
73 1.2 matt static void imxuart_attach(struct device *, struct device *, void *);
74 1.2 matt
75 1.2 matt static void imxuart_start(struct tty *);
76 1.2 matt static int imxuart_param(struct tty *, struct termios *);
77 1.2 matt static void imxuart_shutdownhook(void *arg);
78 1.2 matt
79 1.2 matt CFATTACH_DECL(imxuart, sizeof(struct imxuart_softc),
80 1.2 matt imxuart_match, imxuart_attach, NULL, NULL);
81 1.2 matt
82 1.2 matt
83 1.2 matt /*
84 1.2 matt * disable the specified IMX UART interrupt in softc
85 1.2 matt * return -1 on error
86 1.2 matt * else return previous enabled state
87 1.2 matt */
88 1.2 matt static __inline int
89 1.2 matt imxuart_intrspec_dis(imxuart_softc_t *sc, imxuart_intrix_t ix)
90 1.2 matt {
91 1.2 matt const imxuart_intrspec_t *spec = &imxuart_intrspec_tab[ix];
92 1.2 matt uint32_t v;
93 1.2 matt uint32_t b;
94 1.2 matt const uint32_t syncbit = 1 << 31;
95 1.2 matt uint n;
96 1.2 matt
97 1.2 matt if (ix >= IMXUART_INTRSPEC_TAB_SZ)
98 1.2 matt return -1;
99 1.2 matt
100 1.2 matt v = (1 << ix);
101 1.2 matt if ((sc->sc_intrspec_enb & v) == 0)
102 1.2 matt return 0;
103 1.2 matt sc->sc_intrspec_enb &= ~v;
104 1.2 matt
105 1.2 matt n = spec->enb_reg;
106 1.2 matt b = spec->enb_bit;
107 1.2 matt v = sc->sc_ucr[n];
108 1.2 matt v &= ~b;
109 1.2 matt v |= syncbit;
110 1.2 matt sc->sc_ucr[n] = v;
111 1.2 matt
112 1.2 matt n = spec->flg_reg;
113 1.2 matt b = spec->flg_bit;
114 1.2 matt v = sc->sc_usr[n];
115 1.2 matt v &= ~b;
116 1.2 matt v |= syncbit;
117 1.2 matt sc->sc_usr[n] = v;
118 1.2 matt
119 1.2 matt return 1;
120 1.2 matt }
121 1.2 matt
122 1.2 matt /*
123 1.2 matt * enable the specified IMX UART interrupt in softc
124 1.2 matt * return -1 on error
125 1.2 matt * else return previous enabled state
126 1.2 matt */
127 1.2 matt static __inline int
128 1.2 matt imxuart_intrspec_enb(imxuart_softc_t *sc, imxuart_intrix_t ix)
129 1.2 matt {
130 1.2 matt const imxuart_intrspec_t *spec = &imxuart_intrspec_tab[ix];
131 1.2 matt uint32_t v;
132 1.2 matt uint n;
133 1.2 matt const uint32_t syncbit = 1 << 31;
134 1.2 matt
135 1.2 matt if (ix >= IMXUART_INTRSPEC_TAB_SZ)
136 1.2 matt return -1;
137 1.2 matt
138 1.2 matt v = (1 << ix);
139 1.2 matt if ((sc->sc_intrspec_enb & v) != 0)
140 1.2 matt return 1;
141 1.2 matt sc->sc_intrspec_enb |= v;
142 1.2 matt
143 1.2 matt
144 1.2 matt n = spec->enb_reg;
145 1.2 matt v = spec->enb_bit;
146 1.2 matt v |= syncbit;
147 1.2 matt sc->sc_ucr[n] |= v;
148 1.2 matt
149 1.2 matt n = spec->flg_reg;
150 1.2 matt v = spec->flg_bit;
151 1.2 matt v |= syncbit;
152 1.2 matt sc->sc_usr[n] |= v;
153 1.2 matt
154 1.2 matt return 0;
155 1.2 matt }
156 1.2 matt
157 1.2 matt /*
158 1.2 matt * sync softc interrupt spec to UART Control regs
159 1.2 matt */
160 1.2 matt static __inline void
161 1.2 matt imxuart_intrspec_sync(imxuart_softc_t *sc)
162 1.2 matt {
163 1.2 matt int i;
164 1.2 matt uint32_t r;
165 1.2 matt uint32_t v;
166 1.2 matt const uint32_t syncbit = 1 << 31;
167 1.2 matt const uint32_t mask[4] = {
168 1.2 matt IMXUART_INTRS_UCR1,
169 1.2 matt IMXUART_INTRS_UCR2,
170 1.2 matt IMXUART_INTRS_UCR3,
171 1.2 matt IMXUART_INTRS_UCR4
172 1.2 matt };
173 1.2 matt
174 1.2 matt for (i=0; i < 4; i++) {
175 1.2 matt v = sc->sc_ucr[i];
176 1.2 matt if (v & syncbit) {
177 1.2 matt v &= ~syncbit;
178 1.2 matt sc->sc_ucr[i] = v;
179 1.2 matt r = bus_space_read_4(sc->sc_bt, sc->sc_bh, IMX_UCRn(i));
180 1.2 matt r &= ~mask[i];
181 1.2 matt r |= v;
182 1.2 matt bus_space_write_4(sc->sc_bt, sc->sc_bh, IMX_UCRn(i), r);
183 1.2 matt }
184 1.2 matt }
185 1.2 matt }
186 1.2 matt
187 1.2 matt
188 1.2 matt int
189 1.2 matt imxuart_init(imxuart_softc_t *sc, uint bh)
190 1.2 matt {
191 1.2 matt if (sc == 0)
192 1.2 matt sc = &imxuart_softc;
193 1.2 matt sc->sc_init_cnt++;
194 1.2 matt cn_tab = &imxuartcntab;
195 1.2 matt sc->sc_bt = &imx31_bs_tag;
196 1.2 matt sc->sc_bh = bh;
197 1.2 matt
198 1.2 matt memset(&sc->sc_errors, 0, sizeof(sc->sc_errors));
199 1.2 matt
200 1.2 matt return 0;
201 1.2 matt }
202 1.2 matt
203 1.2 matt int
204 1.2 matt imxuart_puts(imxuart_softc_t *sc, const char *s)
205 1.2 matt {
206 1.2 matt char c;
207 1.2 matt int err = -2;
208 1.2 matt
209 1.2 matt for(;;) {
210 1.2 matt c = *s++;
211 1.2 matt if (c == '\0')
212 1.2 matt break;
213 1.2 matt err = imxuart_putchar(sc, c);
214 1.2 matt }
215 1.2 matt return err;
216 1.2 matt }
217 1.2 matt
218 1.2 matt int
219 1.2 matt imxuart_putchar(imxuart_softc_t *sc, int c)
220 1.2 matt {
221 1.2 matt uint32_t r;
222 1.2 matt
223 1.2 matt for (;;) {
224 1.2 matt r = bus_space_read_4(sc->sc_bt, sc->sc_bh, IMX_UTS);
225 1.2 matt if ((r & IMX_UTS_TXFUL) == 0)
226 1.2 matt break;
227 1.2 matt }
228 1.2 matt
229 1.2 matt r = (uint32_t)c & IMX_UTXD_TX_DATA;
230 1.2 matt bus_space_write_4(sc->sc_bt, sc->sc_bh, IMX_UTXD, r);
231 1.2 matt
232 1.2 matt return 0;
233 1.2 matt }
234 1.2 matt
235 1.2 matt int
236 1.2 matt imxuart_getchar(imxuart_softc_t *sc)
237 1.2 matt {
238 1.2 matt uint32_t r;
239 1.2 matt int c;
240 1.2 matt
241 1.2 matt for(;;) {
242 1.2 matt r = bus_space_read_4(sc->sc_bt, sc->sc_bh, IMX_URXD);
243 1.2 matt if (r & IMX_URXD_ERR) {
244 1.2 matt imxuart_urxd_err(sc, r);
245 1.2 matt continue;
246 1.2 matt }
247 1.2 matt if (r & IMX_URXD_CHARDY) {
248 1.2 matt c = (int)(r & IMX_URXD_RX_DATA);
249 1.2 matt break;
250 1.2 matt }
251 1.2 matt }
252 1.2 matt
253 1.2 matt return c;
254 1.2 matt }
255 1.2 matt
256 1.2 matt static int
257 1.2 matt imxuart_urxd_brk(void)
258 1.2 matt {
259 1.2 matt #ifdef DDB
260 1.2 matt if (cn_tab == &imxuartcntab) {
261 1.2 matt Debugger();
262 1.2 matt return 0;
263 1.2 matt }
264 1.2 matt #endif
265 1.2 matt return 1;
266 1.2 matt }
267 1.2 matt
268 1.2 matt static void
269 1.2 matt imxuart_urxd_err(imxuart_softc_t *sc, uint32_t r)
270 1.2 matt {
271 1.2 matt if (r & IMX_URXD_BRK)
272 1.2 matt if (imxuart_urxd_brk() == 0)
273 1.2 matt return;
274 1.2 matt
275 1.2 matt sc->sc_errors.err++;
276 1.2 matt if (r & IMX_URXD_BRK)
277 1.2 matt sc->sc_errors.brk++;
278 1.2 matt if (r & IMX_URXD_PRERR)
279 1.2 matt sc->sc_errors.prerr++;
280 1.2 matt if (r & IMX_URXD_FRMERR)
281 1.2 matt sc->sc_errors.frmerr++;
282 1.2 matt if (r & IMX_URXD_OVRRUN)
283 1.2 matt sc->sc_errors.ovrrun++;
284 1.2 matt }
285 1.2 matt
286 1.2 matt static int
287 1.2 matt imxuart_snapshot(imxuart_softc_t *sc, uint32_t *p)
288 1.2 matt {
289 1.2 matt int i;
290 1.2 matt const uint r[] = { IMX_URXD, IMX_UTXD, IMX_UCR1, IMX_UCR2,
291 1.2 matt IMX_UCR3, IMX_UCR4, IMX_UFCR, IMX_USR1,
292 1.2 matt IMX_USR2, IMX_UESC, IMX_UTIM, IMX_UBIR,
293 1.2 matt IMX_UBMR, IMX_UBRC, IMX_ONEMS, IMX_UTS };
294 1.2 matt
295 1.2 matt for (i=0; i < ((sizeof(r)/sizeof(r[0]))); i++) {
296 1.2 matt *p++ = sc->sc_bh + r[i];
297 1.2 matt *p++ = bus_space_read_4(sc->sc_bt, sc->sc_bh, r[i]);
298 1.2 matt }
299 1.2 matt return 0;
300 1.2 matt }
301 1.2 matt
302 1.2 matt int
303 1.2 matt imxuart_test(void)
304 1.2 matt {
305 1.2 matt imxuart_softc_t *sc = &imxuart_softc;
306 1.2 matt int n;
307 1.2 matt int err;
308 1.2 matt
309 1.2 matt err = imxuart_init(sc, 1);
310 1.2 matt if (err != 0)
311 1.2 matt return err;
312 1.2 matt
313 1.2 matt if (0) {
314 1.2 matt extern u_int cpufunc_id(void);
315 1.2 matt err = cpufunc_id();
316 1.2 matt return err;
317 1.2 matt }
318 1.2 matt
319 1.2 matt #if 0
320 1.2 matt err = imxuart_snapshot(sc, imxuart_snapshot_data);
321 1.2 matt if (err != 0)
322 1.2 matt return err;
323 1.2 matt #endif
324 1.2 matt
325 1.2 matt
326 1.2 matt err = imxuart_putchar(sc, 'x');
327 1.2 matt if (err != 0)
328 1.2 matt return err;
329 1.2 matt
330 1.2 matt for (n=100; n--; ) {
331 1.2 matt err = imxuart_puts(sc, imxuart_test_string);
332 1.2 matt if (err != 0)
333 1.2 matt break;
334 1.2 matt }
335 1.2 matt
336 1.2 matt err = imxuart_snapshot(sc, imxuart_snapshot_data);
337 1.2 matt if (err != 0)
338 1.2 matt return err;
339 1.2 matt
340 1.2 matt return err;
341 1.2 matt }
342 1.2 matt
343 1.2 matt static int
344 1.2 matt imxuart_match(struct device *parent, struct cfdata *cf, void *aux)
345 1.2 matt {
346 1.2 matt struct aips_attach_args * const aipsa = aux;
347 1.2 matt
348 1.2 matt switch (aipsa->aipsa_addr) {
349 1.2 matt case IMX_UART1_BASE:
350 1.2 matt case IMX_UART2_BASE:
351 1.2 matt case IMX_UART3_BASE:
352 1.2 matt case IMX_UART4_BASE:
353 1.2 matt case IMX_UART5_BASE:
354 1.2 matt return 1;
355 1.2 matt default:
356 1.2 matt return 0;
357 1.2 matt }
358 1.2 matt }
359 1.2 matt
360 1.2 matt static void
361 1.2 matt imxuart_attach(struct device *parent, struct device *self, void *aux)
362 1.2 matt {
363 1.2 matt imxuart_softc_t *sc = (void *)self;
364 1.2 matt struct aips_attach_args * const aipsa = aux;
365 1.2 matt struct tty *tp;
366 1.2 matt
367 1.2 matt sc->sc_bt = aipsa->aipsa_memt;
368 1.2 matt sc->sc_addr = aipsa->aipsa_addr;
369 1.2 matt sc->sc_size = aipsa->aipsa_size;
370 1.2 matt sc->sc_intr = aipsa->aipsa_intr;
371 1.2 matt
372 1.2 matt sc->sc_tty = tp = ttymalloc();
373 1.2 matt tp->t_oproc = imxuart_start;
374 1.2 matt tp->t_param = imxuart_param;
375 1.2 matt tty_attach(tp);
376 1.2 matt
377 1.2 matt shutdownhook_establish(imxuart_shutdownhook, sc);
378 1.2 matt
379 1.2 matt printf("\n");
380 1.2 matt }
381 1.2 matt
382 1.2 matt void
383 1.2 matt imxuartcnprobe(struct consdev *cp)
384 1.2 matt {
385 1.2 matt int major;
386 1.2 matt
387 1.2 matt __TRACE;
388 1.2 matt major = cdevsw_lookup_major(&imxuart_cdevsw);
389 1.2 matt cp->cn_dev = makedev(major, 0); /* XXX unit 0 */
390 1.2 matt cp->cn_pri = CN_REMOTE;
391 1.2 matt }
392 1.2 matt
393 1.2 matt static void
394 1.2 matt imxuart_start(struct tty *tp)
395 1.2 matt {
396 1.2 matt __TRACE;
397 1.2 matt }
398 1.2 matt
399 1.2 matt static int
400 1.2 matt imxuart_param(struct tty *tp, struct termios *termios)
401 1.2 matt {
402 1.2 matt __TRACE;
403 1.2 matt return 0;
404 1.2 matt }
405 1.2 matt
406 1.2 matt static void
407 1.2 matt imxuart_shutdownhook(void *arg)
408 1.2 matt {
409 1.2 matt __TRACE;
410 1.2 matt }
411 1.2 matt
412 1.2 matt void
413 1.2 matt imxuartcninit(struct consdev *cp)
414 1.2 matt {
415 1.2 matt __TRACE;
416 1.2 matt }
417 1.2 matt
418 1.2 matt int
419 1.2 matt imxuartcngetc(dev_t dev)
420 1.2 matt {
421 1.2 matt struct imxuart_softc *sc;
422 1.2 matt uint unit;
423 1.2 matt int c;
424 1.2 matt
425 1.2 matt unit = IMXUART_UNIT(dev);
426 1.2 matt if (unit != 0)
427 1.2 matt return 0;
428 1.2 matt sc = &imxuart_softc;
429 1.2 matt c = imxuart_getchar(sc);
430 1.2 matt return c;
431 1.2 matt }
432 1.2 matt
433 1.2 matt void
434 1.2 matt imxuartcnputc(dev_t dev, int c)
435 1.2 matt {
436 1.2 matt (void)imxuart_putchar(&imxuart_softc, c);
437 1.2 matt }
438 1.2 matt
439 1.2 matt void
440 1.2 matt imxuartcnpollc(dev_t dev, int mode)
441 1.2 matt {
442 1.2 matt /* always polled for now */
443 1.2 matt }
444 1.2 matt int
445 1.2 matt imxuart_cnattach(bus_space_tag_t iot, bus_addr_t iobase,
446 1.2 matt int rate, int frequency, int type, tcflag_t cflag)
447 1.2 matt {
448 1.2 matt cn_tab = &imxuartcntab;
449 1.2 matt return 0;
450 1.2 matt }
451 1.2 matt
452