imxuartvar.h revision 1.4.18.2
1 /* $NetBSD: imxuartvar.h,v 1.4.18.2 2017/12/03 11:35:53 jdolecek Exp $ */ 2 /* 3 * driver include for Freescale i.MX31 and i.MX31L UARTs 4 */ 5 /* 6 * Copyright (c) 2009, 2010 Genetec Corporation. All rights reserved. 7 * Written by Hiroyuki Bessho for Genetec Corporation. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 18 * THIS SOFTWARE IS PROVIDED BY GENETEC CORPORATION ``AS IS'' AND 19 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 20 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 21 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL GENETEC CORPORATION 22 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 28 * POSSIBILITY OF SUCH DAMAGE. 29 * 30 */ 31 #ifndef _IMXUARTVAR_H 32 #define _IMXUARTVAR_H 33 34 35 #include <sys/cdefs.h> 36 #include <sys/termios.h> /* for tcflag_t */ 37 38 struct imxuart_softc { 39 device_t sc_dev; 40 41 int sc_unit; 42 struct imxuart_regs { 43 bus_space_tag_t ur_iot; 44 bus_space_handle_t ur_ioh; 45 bus_addr_t ur_iobase; 46 #if 0 47 bus_size_t ur_nports; 48 bus_size_t ur_map[16]; 49 #endif 50 } sc_regs; 51 52 #define sc_bt sc_regs.ur_iot 53 #define sc_bh sc_regs.ur_ioh 54 55 uint32_t sc_intrspec_enb; 56 uint32_t sc_ucr2_d; /* target value for UCR2 */ 57 uint32_t sc_ucr[4]; /* cached value of UCRn */ 58 #define sc_ucr1 sc_ucr[0] 59 #define sc_ucr2 sc_ucr[1] 60 #define sc_ucr3 sc_ucr[2] 61 #define sc_ucr4 sc_ucr[3] 62 63 uint sc_init_cnt; 64 65 bus_addr_t sc_addr; 66 bus_size_t sc_size; 67 int sc_intr; 68 69 u_char sc_hwflags; 70 /* Hardware flag masks */ 71 #define IMXUART_HW_FLOW __BIT(0) 72 #define IMXUART_HW_DEV_OK __BIT(1) 73 #define IMXUART_HW_CONSOLE __BIT(2) 74 #define IMXUART_HW_KGDB __BIT(3) 75 76 bool enabled; 77 78 u_char sc_swflags; 79 80 u_char sc_rx_flags; 81 #define IMXUART_RX_TTY_BLOCKED __BIT(0) 82 #define IMXUART_RX_TTY_OVERFLOWED __BIT(1) 83 #define IMXUART_RX_IBUF_BLOCKED __BIT(2) 84 #define IMXUART_RX_IBUF_OVERFLOWED __BIT(3) 85 #define IMXUART_RX_ANY_BLOCK \ 86 (IMXUART_RX_TTY_BLOCKED|IMXUART_RX_TTY_OVERFLOWED| \ 87 IMXUART_RX_IBUF_BLOCKED|IMXUART_RX_IBUF_OVERFLOWED) 88 89 bool sc_tx_busy, sc_tx_done, sc_tx_stopped; 90 bool sc_rx_ready,sc_st_check; 91 u_short sc_txfifo_len, sc_txfifo_thresh; 92 93 uint16_t *sc_rbuf; 94 u_int sc_rbuf_size; 95 u_int sc_rbuf_in; 96 u_int sc_rbuf_out; 97 #define IMXUART_RBUF_AVAIL(sc) \ 98 ((sc->sc_rbuf_out <= sc->sc_rbuf_in) ? \ 99 (sc->sc_rbuf_in - sc->sc_rbuf_out) : \ 100 (sc->sc_rbuf_size - (sc->sc_rbuf_out - sc->sc_rbuf_in))) 101 102 #define IMXUART_RBUF_SPACE(sc) \ 103 ((sc->sc_rbuf_in <= sc->sc_rbuf_out ? \ 104 sc->sc_rbuf_size - (sc->sc_rbuf_out - sc->sc_rbuf_in) : \ 105 sc->sc_rbuf_in - sc->sc_rbuf_out) - 1) 106 /* increment ringbuffer pointer */ 107 #define IMXUART_RBUF_INC(sc,v,i) (((v) + (i))&((sc->sc_rbuf_size)-1)) 108 u_int sc_r_lowat; 109 u_int sc_r_hiwat; 110 111 /* output chunk */ 112 u_char *sc_tba; 113 u_int sc_tbc; 114 u_int sc_heldtbc; 115 /* pending parameter changes */ 116 u_char sc_pending; 117 #define IMXUART_PEND_PARAM __BIT(0) 118 #define IMXUART_PEND_SPEED __BIT(1) 119 120 121 struct callout sc_diag_callout; 122 kmutex_t sc_lock; 123 void *sc_ih; /* interrupt handler */ 124 void *sc_si; /* soft interrupt */ 125 struct tty *sc_tty; 126 127 /* power management hooks */ 128 int (*enable)(struct imxuart_softc *); 129 void (*disable)(struct imxuart_softc *); 130 131 struct { 132 ulong err; 133 ulong brk; 134 ulong prerr; 135 ulong frmerr; 136 ulong ovrrun; 137 } sc_errors; 138 139 struct imxuart_baudrate_ratio { 140 uint16_t numerator; /* UBIR */ 141 uint16_t modulator; /* UBMR */ 142 } sc_ratio; 143 144 }; 145 146 void imxuart_attach_common(device_t parent, device_t self, 147 bus_space_tag_t, paddr_t, size_t, int, int); 148 149 int imxuart_kgdb_attach(bus_space_tag_t, paddr_t, u_int, tcflag_t); 150 int imxuart_cnattach(bus_space_tag_t, paddr_t, u_int, tcflag_t); 151 152 int imxuart_is_console(bus_space_tag_t, bus_addr_t, bus_space_handle_t *); 153 154 /* 155 * Set platform dependent values 156 */ 157 void imxuart_set_frequency(u_int, u_int); 158 159 /* 160 * defined in imx51uart.c and imx31uart.c 161 */ 162 int imxuart_match(device_t, cfdata_t, void *); 163 void imxuart_attach(device_t, device_t, void *); 164 165 void imxuart_attach_subr(struct imxuart_softc *); 166 167 int imxuintr(void *); 168 169 #endif /* _IMXUARTVAR_H */ 170
Indexes created Tue Sep 30 20:09:53 GMT 2025