imxusb.c revision 1.1.10.2 1 1.1.10.2 yamt /* $NetBSD: imxusb.c,v 1.1.10.2 2013/01/16 05:32:48 yamt Exp $ */
2 1.1 bsh /*
3 1.1 bsh * Copyright (c) 2009, 2010 Genetec Corporation. All rights reserved.
4 1.1 bsh * Written by Hashimoto Kenichi and Hiroyuki Bessho for Genetec Corporation.
5 1.1 bsh *
6 1.1 bsh * Redistribution and use in source and binary forms, with or without
7 1.1 bsh * modification, are permitted provided that the following conditions
8 1.1 bsh * are met:
9 1.1 bsh * 1. Redistributions of source code must retain the above copyright
10 1.1 bsh * notice, this list of conditions and the following disclaimer.
11 1.1 bsh * 2. Redistributions in binary form must reproduce the above copyright
12 1.1 bsh * notice, this list of conditions and the following disclaimer in the
13 1.1 bsh * documentation and/or other materials provided with the distribution.
14 1.1 bsh *
15 1.1 bsh * THIS SOFTWARE IS PROVIDED BY GENETEC CORPORATION ``AS IS'' AND
16 1.1 bsh * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
17 1.1 bsh * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
18 1.1 bsh * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL GENETEC CORPORATION
19 1.1 bsh * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
20 1.1 bsh * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
21 1.1 bsh * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
22 1.1 bsh * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
23 1.1 bsh * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
24 1.1 bsh * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
25 1.1 bsh * POSSIBILITY OF SUCH DAMAGE.
26 1.1 bsh */
27 1.1 bsh #include <sys/cdefs.h>
28 1.1.10.2 yamt __KERNEL_RCSID(0, "$NetBSD: imxusb.c,v 1.1.10.2 2013/01/16 05:32:48 yamt Exp $");
29 1.1 bsh
30 1.1 bsh #include <sys/param.h>
31 1.1 bsh #include <sys/systm.h>
32 1.1 bsh #include <sys/conf.h>
33 1.1 bsh #include <sys/kernel.h>
34 1.1 bsh #include <sys/device.h>
35 1.1 bsh #include <sys/intr.h>
36 1.1 bsh #include <sys/bus.h>
37 1.1 bsh
38 1.1 bsh #include <dev/usb/usb.h>
39 1.1 bsh #include <dev/usb/usbdi.h>
40 1.1 bsh #include <dev/usb/usbdivar.h>
41 1.1 bsh #include <dev/usb/usb_mem.h>
42 1.1 bsh
43 1.1 bsh #include <dev/usb/ehcireg.h>
44 1.1 bsh #include <dev/usb/ehcivar.h>
45 1.1 bsh
46 1.1 bsh #include <arm/imx/imxusbreg.h>
47 1.1 bsh #include <arm/imx/imxusbvar.h>
48 1.1 bsh #include <arm/imx/imxgpiovar.h>
49 1.1 bsh #include "locators.h"
50 1.1 bsh
51 1.1 bsh #include <dev/usb/ulpireg.h> /* for test */
52 1.1 bsh
53 1.1 bsh static int imxehci_match(device_t, cfdata_t, void *);
54 1.1 bsh static void imxehci_attach(device_t, device_t, void *);
55 1.1 bsh
56 1.1 bsh uint8_t imxusb_ulpi_read(struct imxehci_softc *sc, int addr);
57 1.1 bsh void imxusb_ulpi_write(struct imxehci_softc *sc, int addr, uint8_t data);
58 1.1 bsh static void ulpi_reset(struct imxehci_softc *sc);
59 1.1 bsh
60 1.1 bsh
61 1.1 bsh
62 1.1 bsh /* attach structures */
63 1.1 bsh CFATTACH_DECL_NEW(imxehci, sizeof(struct imxehci_softc),
64 1.1 bsh imxehci_match, imxehci_attach, NULL, NULL);
65 1.1 bsh
66 1.1 bsh static int
67 1.1 bsh imxehci_match(device_t parent, cfdata_t cf, void *aux)
68 1.1 bsh {
69 1.1 bsh struct imxusbc_attach_args *aa = aux;
70 1.1 bsh
71 1.1 bsh if (aa->aa_unit < 0 || 3 < aa->aa_unit) {
72 1.1 bsh return 0;
73 1.1 bsh }
74 1.1 bsh
75 1.1 bsh return 1;
76 1.1 bsh }
77 1.1 bsh
78 1.1 bsh static void
79 1.1 bsh imxehci_attach(device_t parent, device_t self, void *aux)
80 1.1 bsh {
81 1.1 bsh struct imxusbc_attach_args *aa = aux;
82 1.1 bsh struct imxusbc_softc *usbc = device_private(parent);
83 1.1 bsh struct imxehci_softc *sc = device_private(self);
84 1.1 bsh ehci_softc_t *hsc = &sc->sc_hsc;
85 1.1 bsh bus_space_tag_t iot;
86 1.1 bsh uint16_t hcirev;
87 1.1 bsh usbd_status r;
88 1.1 bsh uint32_t id, hwhost, hwdevice;
89 1.1 bsh const char *comma;
90 1.1 bsh
91 1.1 bsh sc->sc_hsc.sc_dev = self;
92 1.1 bsh iot = sc->sc_iot = sc->sc_hsc.iot = aa->aa_iot;
93 1.1 bsh sc->sc_unit = aa->aa_unit;
94 1.1 bsh sc->sc_usbc = usbc;
95 1.1 bsh hsc->sc_bus.hci_private = sc;
96 1.1.10.2 yamt hsc->sc_flags |= EHCIF_ETTF;
97 1.1 bsh
98 1.1 bsh aprint_normal("\n");
99 1.1 bsh
100 1.1 bsh /* per unit registers */
101 1.1 bsh if (bus_space_subregion(iot, aa->aa_ioh,
102 1.1 bsh aa->aa_unit * IMXUSB_EHCI_SIZE, IMXUSB_EHCI_SIZE,
103 1.1 bsh &sc->sc_ioh) ||
104 1.1 bsh bus_space_subregion(iot, aa->aa_ioh,
105 1.1 bsh aa->aa_unit * IMXUSB_EHCI_SIZE + IMXUSB_EHCIREGS,
106 1.1 bsh IMXUSB_EHCI_SIZE - IMXUSB_EHCIREGS,
107 1.1 bsh &sc->sc_hsc.ioh)) {
108 1.1 bsh
109 1.1 bsh aprint_error_dev(self, "can't subregion\n");
110 1.1 bsh return;
111 1.1 bsh }
112 1.1 bsh
113 1.1 bsh id = bus_space_read_4(iot, sc->sc_ioh, IMXUSB_ID);
114 1.1 bsh hcirev = bus_space_read_2(iot, sc->sc_hsc.ioh, EHCI_HCIVERSION);
115 1.1 bsh
116 1.1 bsh aprint_normal_dev(self,
117 1.1 bsh "i.MX USB Controller id=%d revision=%d HCI revision=0x%x\n",
118 1.1 bsh id & (uint32_t)IMXUSB_ID_ID_MASK,
119 1.1 bsh (id & (uint32_t)IMXUSB_ID_REVISION_MASK) >>
120 1.1 bsh IMXUSB_ID_REVISION_SHIFT,
121 1.1 bsh hcirev);
122 1.1 bsh
123 1.1 bsh hwhost = bus_space_read_4(iot, sc->sc_ioh, IMXUSB_HWHOST);
124 1.1 bsh hwdevice = bus_space_read_4(iot, sc->sc_ioh, IMXUSB_HWDEVICE);
125 1.1 bsh
126 1.1 bsh aprint_normal_dev(self, "");
127 1.1 bsh
128 1.1 bsh comma = "";
129 1.1 bsh if (hwhost & HWHOST_HC) {
130 1.1 bsh int n_ports = 1 + ((hwhost & HWHOST_NPORT_MASK) >>
131 1.1 bsh HWHOST_NPORT_SHIFT);
132 1.1 bsh aprint_normal("%d host port%s",
133 1.1 bsh n_ports, n_ports > 1 ? "s" : "");
134 1.1 bsh comma = ", ";
135 1.1 bsh }
136 1.1 bsh
137 1.1 bsh if (hwdevice & HWDEVICE_DC) {
138 1.1 bsh int n_endpoints = (hwdevice & HWDEVICE_DEVEP_MASK) >>
139 1.1 bsh HWDEVICE_DEVEP_SHIFT;
140 1.1 bsh aprint_normal("%sdevice capable, %d endpoint%s",
141 1.1 bsh comma,
142 1.1 bsh n_endpoints, n_endpoints > 1 ? "s" : "");
143 1.1 bsh }
144 1.1 bsh aprint_normal("\n");
145 1.1 bsh
146 1.1 bsh sc->sc_hsc.sc_bus.dmatag = aa->aa_dmat;
147 1.1 bsh
148 1.1 bsh sc->sc_hsc.sc_offs = bus_space_read_1(iot, sc->sc_hsc.ioh,
149 1.1 bsh EHCI_CAPLENGTH);
150 1.1 bsh
151 1.1 bsh /* Platform dependent setup */
152 1.1 bsh if (usbc->sc_init_md_hook)
153 1.1 bsh usbc->sc_init_md_hook(sc);
154 1.1 bsh
155 1.1 bsh
156 1.1 bsh imxehci_reset(sc);
157 1.1 bsh imxehci_select_interface(sc, sc->sc_iftype);
158 1.1 bsh
159 1.1 bsh if (sc->sc_iftype == IMXUSBC_IF_ULPI) {
160 1.1 bsh bus_space_write_4(sc->sc_iot, sc->sc_ioh, IMXUSB_ULPIVIEW, 0);
161 1.1 bsh
162 1.1 bsh aprint_normal_dev(hsc->sc_dev,
163 1.1 bsh "ULPI phy VID 0x%04x PID 0x%04x\n",
164 1.1 bsh (imxusb_ulpi_read(sc, ULPI_VENDOR_ID_LOW) |
165 1.1 bsh imxusb_ulpi_read(sc, ULPI_VENDOR_ID_HIGH) << 8),
166 1.1 bsh (imxusb_ulpi_read(sc, ULPI_PRODUCT_ID_LOW) |
167 1.1 bsh imxusb_ulpi_read(sc, ULPI_PRODUCT_ID_HIGH) << 8));
168 1.1 bsh
169 1.1 bsh ulpi_reset(sc);
170 1.1 bsh
171 1.1 bsh }
172 1.1 bsh
173 1.1 bsh imxehci_host_mode(sc);
174 1.1 bsh
175 1.1 bsh if (usbc->sc_setup_md_hook)
176 1.1 bsh usbc->sc_setup_md_hook(sc, IMXUSB_HOST);
177 1.1 bsh else if (sc->sc_iftype == IMXUSBC_IF_ULPI) {
178 1.1 bsh imxusb_ulpi_write(sc, ULPI_FUNCTION_CONTROL + ULPI_REG_CLEAR,
179 1.1 bsh OTG_CONTROL_IDPULLUP);
180 1.1 bsh
181 1.1 bsh imxusb_ulpi_write(sc, ULPI_OTG_CONTROL + ULPI_REG_SET,
182 1.1 bsh OTG_CONTROL_USEEXTVBUSIND |
183 1.1 bsh OTG_CONTROL_DRVVBUSEXT |
184 1.1 bsh OTG_CONTROL_DRVVBUS |
185 1.1 bsh OTG_CONTROL_CHRGVBUS
186 1.1 bsh );
187 1.1 bsh }
188 1.1 bsh
189 1.1 bsh /* Disable interrupts, so we don't get any spurious ones. */
190 1.1.10.1 yamt EOWRITE4(hsc, EHCI_USBINTR, 0);
191 1.1 bsh
192 1.1 bsh intr_establish(aa->aa_irq, IPL_USB, IST_LEVEL, ehci_intr, hsc);
193 1.1 bsh
194 1.1 bsh /* Figure out vendor for root hub descriptor. */
195 1.1 bsh strlcpy(hsc->sc_vendor, "i.MX", sizeof(hsc->sc_vendor));
196 1.1 bsh
197 1.1 bsh r = ehci_init(hsc);
198 1.1 bsh if (r != USBD_NORMAL_COMPLETION) {
199 1.1 bsh aprint_error_dev(self, "init failed, error=%d\n", r);
200 1.1 bsh return;
201 1.1 bsh }
202 1.1 bsh
203 1.1 bsh /* Attach usb device. */
204 1.1 bsh hsc->sc_child = config_found(self, &hsc->sc_bus, usbctlprint);
205 1.1 bsh }
206 1.1 bsh
207 1.1 bsh
208 1.1 bsh
209 1.1 bsh
210 1.1 bsh void
211 1.1 bsh imxehci_select_interface(struct imxehci_softc *sc, enum imx_usb_if interface)
212 1.1 bsh {
213 1.1 bsh uint32_t reg;
214 1.1 bsh struct ehci_softc *hsc = &sc->sc_hsc;
215 1.1 bsh
216 1.1 bsh reg = EOREAD4(hsc, EHCI_PORTSC(1));
217 1.1 bsh reg = (reg & ~PORTSC_PTS_MASK) | (interface << PORTSC_PTS_SHIFT);
218 1.1 bsh EOWRITE4(hsc, EHCI_PORTSC(1), reg);
219 1.1 bsh }
220 1.1 bsh
221 1.1 bsh
222 1.1 bsh static uint32_t
223 1.1 bsh ulpi_wakeup(struct imxehci_softc *sc, int tout)
224 1.1 bsh {
225 1.1 bsh uint32_t ulpi_view;
226 1.1 bsh int i = 0;
227 1.1 bsh ulpi_view = bus_space_read_4(sc->sc_iot, sc->sc_ioh, IMXUSB_ULPIVIEW);
228 1.1 bsh
229 1.1 bsh if ( !(ulpi_view & ULPI_SS) ) {
230 1.1 bsh bus_space_write_4(sc->sc_iot, sc->sc_ioh,
231 1.1 bsh IMXUSB_ULPIVIEW, ULPI_WU);
232 1.1 bsh for (i = 0; (tout < 0) || (i < tout); i++) {
233 1.1 bsh ulpi_view = bus_space_read_4(sc->sc_iot,
234 1.1 bsh sc->sc_ioh, IMXUSB_ULPIVIEW);
235 1.1 bsh if ( !(ulpi_view & ULPI_WU) )
236 1.1 bsh break;
237 1.1 bsh delay(1);
238 1.1 bsh };
239 1.1 bsh }
240 1.1 bsh
241 1.1 bsh if ((tout > 0) && (i >= tout)) {
242 1.1 bsh aprint_error_dev(sc->sc_hsc.sc_dev, "%s: timeout\n", __func__);
243 1.1 bsh }
244 1.1 bsh
245 1.1 bsh return ulpi_view;
246 1.1 bsh }
247 1.1 bsh
248 1.1 bsh static uint32_t
249 1.1 bsh ulpi_wait(struct imxehci_softc *sc, int tout)
250 1.1 bsh {
251 1.1 bsh uint32_t ulpi_view;
252 1.1 bsh int i;
253 1.1 bsh ulpi_view = bus_space_read_4(sc->sc_iot, sc->sc_ioh, IMXUSB_ULPIVIEW);
254 1.1 bsh
255 1.1 bsh for (i = 0; (tout < 0) | (i < tout); i++) {
256 1.1 bsh ulpi_view = bus_space_read_4(sc->sc_iot, sc->sc_ioh,
257 1.1 bsh IMXUSB_ULPIVIEW);
258 1.1 bsh if (!(ulpi_view & ULPI_RUN))
259 1.1 bsh break;
260 1.1 bsh delay(1);
261 1.1 bsh }
262 1.1 bsh
263 1.1 bsh if ((tout > 0) && (i >= tout)) {
264 1.1 bsh aprint_error_dev(sc->sc_hsc.sc_dev, "%s: timeout\n", __func__);
265 1.1 bsh }
266 1.1 bsh
267 1.1 bsh return ulpi_view;
268 1.1 bsh }
269 1.1 bsh
270 1.1 bsh #define TIMEOUT 100000
271 1.1 bsh
272 1.1 bsh uint8_t
273 1.1 bsh imxusb_ulpi_read(struct imxehci_softc *sc, int addr)
274 1.1 bsh {
275 1.1 bsh uint32_t data;
276 1.1 bsh
277 1.1 bsh ulpi_wakeup(sc, TIMEOUT);
278 1.1 bsh
279 1.1 bsh data = ULPI_RUN | (addr << ULPI_ADDR_SHIFT);
280 1.1 bsh bus_space_write_4(sc->sc_iot, sc->sc_ioh, IMXUSB_ULPIVIEW, data);
281 1.1 bsh
282 1.1 bsh data = ulpi_wait(sc, TIMEOUT);
283 1.1 bsh
284 1.1 bsh return (data & ULPI_DATRD_MASK) >> ULPI_DATRD_SHIFT;
285 1.1 bsh }
286 1.1 bsh
287 1.1 bsh void
288 1.1 bsh imxusb_ulpi_write(struct imxehci_softc *sc, int addr, uint8_t data)
289 1.1 bsh {
290 1.1 bsh uint32_t reg;
291 1.1 bsh
292 1.1 bsh ulpi_wakeup(sc, TIMEOUT);
293 1.1 bsh
294 1.1 bsh reg = ULPI_RUN | ULPI_RW | ((addr) << ULPI_ADDR_SHIFT) | data;
295 1.1 bsh bus_space_write_4(sc->sc_iot, sc->sc_ioh, IMXUSB_ULPIVIEW, reg);
296 1.1 bsh
297 1.1 bsh ulpi_wait(sc, TIMEOUT);
298 1.1 bsh
299 1.1 bsh return;
300 1.1 bsh }
301 1.1 bsh
302 1.1 bsh #if 0
303 1.1 bsh static int
304 1.1 bsh ulpi_scratch_test(struct imxehci_softc *sc)
305 1.1 bsh {
306 1.1 bsh uint32_t ulpi_view;
307 1.1 bsh
308 1.1 bsh ulpi_view = ulpi_wakeup(sc, 1000);
309 1.1 bsh if (ulpi_view & ULPI_WU) {
310 1.1 bsh return -1;
311 1.1 bsh }
312 1.1 bsh
313 1.1 bsh bus_space_write_4(sc->sc_iot, sc->sc_ioh, IMXUSB_ULPIVIEW,
314 1.1 bsh (ULPI_RUN | ULPI_RW |
315 1.1 bsh (ULPI_SCRATCH << ULPI_ADDR_SHIFT) | 0xAA));
316 1.1 bsh
317 1.1 bsh ulpi_view = ulpi_wait(sc, 1000);
318 1.1 bsh
319 1.1 bsh if (ulpi_view & ULPI_RUN) {
320 1.1 bsh return -1;
321 1.1 bsh }
322 1.1 bsh
323 1.1 bsh return 0;
324 1.1 bsh }
325 1.1 bsh #endif
326 1.1 bsh
327 1.1 bsh static void
328 1.1 bsh ulpi_reset(struct imxehci_softc *sc)
329 1.1 bsh {
330 1.1 bsh uint8_t data;
331 1.1 bsh int timo = 1000 * 1000; /* XXXX: 1sec */
332 1.1 bsh
333 1.1 bsh imxusb_ulpi_write(sc, ULPI_FUNCTION_CONTROL + ULPI_REG_SET,
334 1.1 bsh FUNCTION_CONTROL_RESET /*0x20*/);
335 1.1 bsh do {
336 1.1 bsh data = imxusb_ulpi_read(sc, ULPI_FUNCTION_CONTROL);
337 1.1 bsh if (!(data & FUNCTION_CONTROL_RESET))
338 1.1 bsh break;
339 1.1 bsh delay(100);
340 1.1 bsh timo -= 100;
341 1.1 bsh } while (timo > 0);
342 1.1 bsh if (timo <= 0) {
343 1.1 bsh aprint_error_dev(sc->sc_hsc.sc_dev, "%s: reset failed!!\n",
344 1.1 bsh __func__);
345 1.1 bsh return;
346 1.1 bsh }
347 1.1 bsh
348 1.1 bsh return;
349 1.1 bsh }
350 1.1 bsh
351 1.1 bsh void
352 1.1 bsh imxehci_reset(struct imxehci_softc *sc)
353 1.1 bsh {
354 1.1.10.2 yamt uint32_t reg;
355 1.1 bsh int i;
356 1.1 bsh struct ehci_softc *hsc = &sc->sc_hsc;
357 1.1 bsh #define RESET_TIMEOUT 100
358 1.1 bsh
359 1.1 bsh reg = EOREAD4(hsc, EHCI_USBCMD);
360 1.1 bsh reg &= ~EHCI_CMD_RS;
361 1.1 bsh EOWRITE4(hsc, EHCI_USBCMD, reg);
362 1.1 bsh
363 1.1 bsh for (i=0; i < RESET_TIMEOUT; ++i) {
364 1.1 bsh reg = EOREAD4(hsc, EHCI_USBCMD);
365 1.1 bsh if ((reg & EHCI_CMD_RS) == 0)
366 1.1 bsh break;
367 1.1 bsh usb_delay_ms(&hsc->sc_bus, 1);
368 1.1 bsh }
369 1.1 bsh
370 1.1 bsh EOWRITE4(hsc, EHCI_USBCMD, reg | EHCI_CMD_HCRESET);
371 1.1 bsh for (i = 0; i < RESET_TIMEOUT; i++) {
372 1.1 bsh reg = EOREAD4(hsc, EHCI_USBCMD);
373 1.1 bsh if ((reg & EHCI_CMD_HCRESET) == 0)
374 1.1 bsh break;
375 1.1 bsh usb_delay_ms(&hsc->sc_bus, 1);
376 1.1 bsh }
377 1.1 bsh if (i >= RESET_TIMEOUT) {
378 1.1 bsh aprint_error_dev(hsc->sc_dev, "reset timeout (%x)\n", reg);
379 1.1 bsh }
380 1.1 bsh
381 1.1 bsh usb_delay_ms(&hsc->sc_bus, 100);
382 1.1 bsh }
383 1.1 bsh
384 1.1 bsh void
385 1.1 bsh imxehci_host_mode(struct imxehci_softc *sc)
386 1.1 bsh {
387 1.1 bsh struct ehci_softc *hsc = &sc->sc_hsc;
388 1.1 bsh uint32_t reg;
389 1.1 bsh
390 1.1 bsh reg = EOREAD4(hsc, EHCI_PORTSC(1));
391 1.1 bsh reg &= ~(EHCI_PS_CSC | EHCI_PS_PEC | EHCI_PS_OCC);
392 1.1 bsh reg |= EHCI_PS_PP | EHCI_PS_PE;
393 1.1 bsh EOWRITE4(hsc, EHCI_PORTSC(1), reg);
394 1.1 bsh
395 1.1 bsh reg = bus_space_read_4(sc->sc_iot, sc->sc_ioh, IMXUSB_OTGSC);
396 1.1 bsh reg |= OTGSC_IDPU;
397 1.1 bsh reg |= OTGSC_DPIE | OTGSC_IDIE;
398 1.1 bsh bus_space_write_4(sc->sc_iot, sc->sc_ioh, IMXUSB_OTGSC, reg);
399 1.1 bsh
400 1.1 bsh reg = bus_space_read_4(sc->sc_iot, sc->sc_ioh, IMXUSB_OTGMODE);
401 1.1 bsh reg |= USBMODE_HOST;
402 1.1 bsh bus_space_write_4(sc->sc_iot, sc->sc_ioh, IMXUSB_OTGMODE, reg);
403 1.1 bsh }
404